JP3272531B2 - Method for manufacturing compound semiconductor device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

The present invention relates to a method for manufacturing a compound semiconductor device, and more particularly, to a method for manufacturing a compound semiconductor device including a step of selectively epitaxially growing a compound semiconductor single crystal substrate.

[0002]

2. Description of the Related Art In recent years, new electronic devices and optical devices have been realized by forming an epitaxially grown layer on a single-crystal semiconductor substrate and forming the epitaxially grown layer into a multilayer or a heterostructure. In particular, by combining microfabrication technology and heteroepitaxial technology, quantum effect devices that confine electrons in a low-dimensional structure and extract the quantum effect of electrons, and electron wave interference logic devices that use the properties of electron waves have been devised. These are called quantized functional elements and are expected to be put to practical use in the near future as new electronic devices.

As an epitaxial technique in these cases, a molecular beam epitaxial growth method (MBE), a metal organic chemical vapor deposition method (MOVPE) and the like are known. The feature of these techniques is that an ultrathin film can be grown with good controllability. In order to supply a molecular beam source material in MBE, a structure in which a metal source is held in a vacuum chamber (crystal growth chamber) is employed. Recently, a gas source molecular beam epitaxial growth method (GSMBE) has been developed, in which a gaseous source containing an organometallic compound is provided outside a vacuum chamber and the source is introduced into the vacuum chamber through a gas introduction valve. Is active. GSMBE is MOMBE (M
etalorganic MBE) or CBE (Chemical Beam Ep)
itaxy).

[0004] MBE, MOVPE or GSMBE used as a heteroepitaxial technique has a characteristic in a growth process on a semiconductor substrate. In particular, formation of a mask for patterning on a semiconductor substrate and growth of a heteroepitaxial layer on the surface of the substrate will be described below. (1) Since the growth principles of MBE MBE method is close to the physical vapor deposition, for example, when patterning the compound semiconductor layer using a mask made from SiN _x on a GaAs substrate, a GaAs or AlGaAs is on the GaAs single crystal surface A single crystal layer can be grown.

On the other hand, a polycrystalline GaAs or AlGaAs layer is laminated on the SiN _x film. The control of the thickness of the single crystal layer does not depend on the size or shape of the window of the mask, but is determined by the intensity of the molecular beam reaching the surface of the mask or the single crystal layer. This is an advantageous point when fabricating a fine structure. The polycrystalline layer formed on the mask can be used as an insulating layer, but if a heterostructure or an electrode is formed in a region next to the single crystal layer, the polycrystalline layer must be removed by a lift-off method or the like. Becomes

(2) MOVPE In the MOVPE method, the feature of selective growth on a substrate changes depending on whether the gas pressure in a growing furnace is normal pressure or reduced pressure. In the case of normal pressure MOVPE, a polycrystalline or amorphous film is deposited on an insulating film (for example, a SiN _x film) used as a mask. Further, a single crystal film grows on the single crystal plane. However, the growth rate on the single crystal surface changes depending on the area ratio between the region where the insulating film is formed and the region where the single crystal layer exists, or the growth speed increases in a region of the single crystal surface near the insulating film. It is known that a so-called edge effect occurs.

In the case of reduced pressure MOVPE, as the pressure is reduced, it becomes difficult to deposit a polycrystalline or amorphous film on the insulating film, but the growth rate changes due to the area ratio between the insulating film and the single crystal plane, and the edge effect. Becomes noticeable. The edge effect is described in the following document. [1] Kenji HIRUMA et al., Journal of Crystal Grow
th 102, pp.717-724,1990 (3) GSMBE In the GSMBE method, for example, when GaAs is grown with a mask made of SiN _x (insulating film) formed on a GaAs substrate, nothing is left on the mask. No deposition occurs, and no change in growth rate or edge effect due to the area ratio between the insulating film and the single crystal is observed. This is because the GSMBE method is a growth based on a surface reaction mechanism between a molecular beam material and a solid surface.

[0008] The good growth selectivity of GSMBE is
This is very effective in producing a quantized functional element by heteroepitaxial growth on a semiconductor substrate. However, as in the case of MBE, there is a combination of a molecular beam material and an insulating film such that a polycrystalline film or an amorphous film is deposited on the insulating film. For example, when an AlGaAs single crystal is selectively grown on a GaAs surface using a patterning mask made of SiN _x , an AlGaAs polycrystalline or amorphous film is deposited on the mask. This is because the organometallic material containing Al is very active and causes a decomposition reaction even on the SiN _x film and the insulating film. An AlGaAs single crystal layer or a single crystal layer having an Al composition is a very important layer for producing a GaAs-based electronic device, and there is a great demand for technology development for selectively growing these layers.

[0009] In the following document, AlGa is formed by MOVPE.
By adding hydrogen chloride gas (HCl) during As growth,
It is shown that the AlGaAs layer can be selectively grown without depositing a polycrystalline or amorphous film on the SiN _x patterning mask film. [2] Kenji Shimoyama, Katsushi Fujii, Yuichi Inoue, Hideki Goto, Japan Society of Applied Physics, Applied Electronic Properties Subcommittee Research Report (AP922227),
No.445, pp.15-20, 1992 As a model of the role of HCl gas in improving the selectivity, they proposed that the dangling bonds on the SiN _x film surface were terminated with Cl, and the growth species containing Al When
This is because the reaction with the SiN _x film is suppressed.

[0010]

Even if the method of adding HCl gas during growth by the MOVPE method is employed, it is not possible to completely eliminate the area ratio effect and the edge effect of the pattern described above. In forming the pattern of the structure, the controllability of the growth rate is not good. According to the area ratio effect, there is a problem that it is difficult to obtain uniform element characteristics in one semiconductor integrated circuit. In addition, since the semiconductor layer is curved according to the edge effect, there is a problem that the carrier traveling property of the electronic device is deteriorated and the light confinement of the optical device is deteriorated.

Further, since the HCl gas becomes an etching gas for GaAs or AlGaAs, it is difficult to control the growth rate of the semiconductor by adding HCl, and it is difficult to obtain uniform element characteristics when forming an electronic device or an optical device. There is also a problem. The present invention has been made in view of such a problem, and a compound semiconductor epitaxial growth method capable of controlling the thickness of a selectively grown compound semiconductor layer with good control and forming the compound semiconductor layer flat. ,
It is an object of the present invention to provide a compound semiconductor epitaxial growth apparatus and a method for forming a compound semiconductor device capable of forming a compound semiconductor layer flatly and with good film thickness controllability.

[0012]

In order to solve the above-mentioned problems, the invention according to claim 1 relates to a method for manufacturing a compound semiconductor device, and as shown in FIG. 4 and FIG. 24, 42, a first insulating mask 25,
Forming the first compound semiconductor layer 2
Irradiating the surface of each of the first and second insulating masks 25 and 44 with radical particles that do not become an etchant of the first compound semiconductor layers 24 and 42; A gas source is supplied over the first compound semiconductor layers 24 and 42 that are not covered with the first and second compound semiconductor layers 26, 27, 45 and 48.
Epitaxially growing, a step of removing the first insulating masks 25 and 44, and a second insulating mask 28 which selectively covers the upper surfaces of the second compound semiconductor layers 26, 27, 45 and 48. , 49, and that the surfaces of the second insulating masks 28, 49 and the surfaces of the first compound semiconductor layers 24, 42 do not function as an etchant for the first compound semiconductor layers 24, 42. A step of irradiating with radical particles and the second insulating mask (2
8, 49) not covered with the first compound semiconductor layer 2
A step of epitaxially growing third compound semiconductor layers 29 and 50 on the first and second insulating masks 4 and 42;
And a step of removing 8,49.

According to a second aspect of the present invention, the second compound semiconductor layers 26, 27, 45, and 48 are grown by irradiating a source gas and radical particles. In the invention according to claim 3, at least one of the second compound semiconductor layers 26, 27, 45, and 48 and the third compound semiconductor layers 29 and 50 functions as an etchant for the compound semiconductor together with the source gas for the compound semiconductor. It is characterized in that it is grown while irradiating radical particles that do not.

According to a fourth aspect of the present invention, at least one of the second compound semiconductor layers 26, 27, 45, and 48 and the third compound semiconductor layers 29 and 50 includes a source gas of the compound semiconductor and a compound semiconductor. It is characterized in that radical particles not functioning as an etchant are alternately supplied. In the invention according to claim 5, at least one of the first insulating masks 25 and 44 and the second insulating masks 28 and 49 is formed of an oxide film formed by light irradiation in an oxygen atmosphere. It is characterized by being.

In the invention according to claim 6, the first insulating masks 25 and 44 and the second insulating masks 28 and
At least one of 49 is characterized by being patterned by drawing an electron beam on an insulating film in an etching molecular gas atmosphere. In the invention according to claim 7,
At least one of the first insulating masks 25, 44 and the second insulating masks 28, 49 is provided in the first compound semiconductor layer 24, 42 or the second compound semiconductor layer 26 in an oxygen atmosphere. 27, 45, and 48 are formed by drawing an electron beam.

In the invention according to claim 8, the first insulating masks 25 and 44 and the second insulating masks 28 and
At least one of 49 is removed by heating in an As atmosphere. The invention according to claim 9 is characterized in that the radical particles are a hydrogen radical, an argon radical or a nitrogen radical.

[0017]

[0018]

[0019]

[0020]

[0021]

According to the present invention, a compound gas is grown before, simultaneously with, or intermittently with, the introduction of a source gas for growing a compound semiconductor on a first compound semiconductor layer not covered with an insulating mask. The first compound semiconductor layer and the insulating mask are irradiated with radical particles that do not become a semiconductor etchant.

Thus, the dangling bond on the insulating mask is terminated without substantially etching the first and second compound semiconductor layers, and the decomposition reaction of the molecular beam source material on the insulating film surface can be suppressed. In addition, according to the gas source molecular beam epitaxial growth, the selectively grown compound semiconductor layer is formed flat. Radical particles can be generated by ECR plasma, RF plasma, collision of thermoelectrons, or the like. In a vacuum having a large mean free path, the radical particles thus generated are taken out in a beam form and grown. Can be irradiated.

The radical particles themselves are very active, and have the property of exchanging electrons by colliding with other particles or substances to become stable neutral particles. Therefore, when the radical particles approach the dangling bonds on the insulating film, they share the electrons of the dangling bonds or absorb and neutralize the electrons. On the surface of the insulating film where the dangling bonds are terminated, the organometallic molecules no longer fly, and even when approached, the electrons required to decompose the molecules are not supplied, so the molecules must be decomposed as they are. Without elimination. On the other hand, organometallic molecules arriving on the surface of the single crystal substrate due to the existence of free electrons are decomposed, only metal atoms contribute to the growth, and the organic groups are re-evaporated and eliminated, whereby crystal growth is performed. .

Therefore, by supplying the organometallic material to the single crystal substrate patterned with the insulating film while intermittently irradiating the radical particles, nothing is deposited on the insulating film, and the A single crystal can be grown at a growth rate corresponding to the strength of the organometallic material supplied only above. Also, particularly when the radical particles are hydrogen radicals,
It is also known that the semiconductor crystal surface has a cleaning effect, and it becomes possible to grow a high-quality epitaxial film having an extremely small interface state on a patterned single crystal surface.

In particular, the effect is great for the selective growth of an epitaxial film containing an active constituent element such as Al.

[0026]

Embodiments of the present invention will be described below with reference to the drawings. FIG. 1 is a plan view showing a schematic configuration of a compound semiconductor selective growth apparatus according to an embodiment of the present invention. The compound semiconductor selective growth apparatus 1 includes a load lock chamber 2 for loading and unloading wafers, a sample exchange chamber 3 for relaying wafers, and a sample exchange chamber 3 via a vacuum tunnel 4a.
A GSMBE apparatus 5 connected to the sample chamber, a photo oxide film forming chamber 6 connected to the sample exchange chamber 3 via the vacuum tunnel 4b,
An electron beam irradiation chamber 7 is connected to the sample exchange chamber 3 via the vacuum tunnel 4c. Note that reference numerals 8a to 8d in FIG.
Indicates a shutter.

The crystal growth chamber 5a of the GSMBE apparatus 5 includes:
As shown in FIG. 2A, a wafer support 5b on which a wafer w is mounted, a heater 5c for heating the wafer support 5b,
A thermocouple 5d for measuring the temperature of the heater 5c, an electron gun 5e for irradiating the surface of the wafer w with electrons, an RHEED 5f for receiving electrons reflected from the wafer w, and a crystal growth chamber 5
There is an exhaust system 5g for depressurizing the inside of a. In the crystal growth chamber 5a, a plurality of molecular beam source nozzles 9a to 9c for introducing an organometallic gas and a pyrolysis cell 10a are provided.
A molecular beam source nozzle 9d for introducing the inorganic gas decomposed by the thermal decomposition, and molecular beam source nozzles 9e and 9f for introducing the impurity gas decomposed by the thermal decomposition cells 10c and 10d are attached. The tips of the molecular beam source nozzles are directed to the wafer w, and the molecular beam source nozzles 9a to
A molecular beam source shutter (not shown) that can be opened and closed is disposed in front of the front end of 9f. Further, an ECR plasma generation source 1 for generating radicals is provided in the crystal growth chamber 5a.
1 is attached.

As shown in FIG. 2 (b), the ECR plasma generation source 11 includes a microwave introduction pipe 11a and a gas introduction pipe 1
1b is connected to the plasma chamber 11c;
and a magnet coil 11d surrounding the plasma chamber 11c.
And a gas discharge port 11e for discharging a gas toward the wafer w from the shutter 11f.
Is arranged.

The GSMBE apparatus 5 further includes a mass spectrometer (not shown), an Auger spectrometer, a nude ion gauge, and the like. The above-mentioned electron beam irradiation room 7
Has an electron beam column (not shown) having a differential pumping structure for irradiating the wafer w with an electron beam, and has a structure capable of introducing a gas such as chlorine or oxygen into the EB drawing chamber.

The above-described photo-oxide film forming chamber has a structure in which oxygen can be introduced into a chamber in which a wafer is installed. By irradiating light in an oxygen atmosphere in the chamber, the surface of a compound semiconductor layer such as GaAs is formed. A photo oxide film is formed. Next, an example of a process of manufacturing an electronic device and an optical device using the above-described compound semiconductor selective growth apparatus 1 will be described.

(First Embodiment) This embodiment describes a method for manufacturing a high-performance power FET having a heteroepitaxial structure by making full use of the selective growth technique of the present invention. Hereinafter, the manufacturing process of the power FET will be described based on the flowchart shown in FIG. 3 and the sectional views shown in FIGS.

A semi-insulating GaAs substrate (wafer) 21 having a (100) plane is used as a compound semiconductor substrate on which a power FET is formed. First, the GaAs substrate 21 is transferred into the GSMBE apparatus 5 through the load lock chamber 2 and the sample exchange chamber 3 shown in FIG. Then, the GaAs substrate 21 mounted on the wafer support table 5b of the crystal growth chamber 5a of GSMBE device 5, entering the MBE growth step (in Fig. 3 S _1).

As a gas source material for epitaxial growth introduced into the crystal growth chamber 5a, triethyl gallium (TEG: Ga (C ₂ H ₅ ) ₃ ) and triethyl aluminum (TE
A: Al (C ₂ H ₅ ) ₃ ) was converted to first and second molecular beam source nozzles 9a,
9b into the crystal growth chamber 5a and arsine (As
H ₃ ) is converted to a fourth molecular beam source cell 9 d with a pyrolysis cell 10 a
Into the crystal growth chamber 5a. Further, disilane (Si ₂ H ₆ ) as an n-type dopant is introduced into the crystal growth chamber 5a through a fifth molecular beam source cell 9e having a pyrolysis cell 10b.

The flow rates of these gas sources are independently adjusted by a mass flow controller (not shown).
Irradiation is performed toward the GaAs substrate 21 in the crystal growth chamber 5a. However, arsine gas has a high temperature (90
0 ° C.) are decomposed by pyrolysis cell 10a of irradiated on the substrate surface as As and H _2. Similarly, the disilane gas is also decomposed into Si and H ₂ by the pyrolysis cell 10b and irradiated on the substrate surface.

After the semi-insulating GaAs substrate 21 is introduced into the crystal growth chamber, the shutter of the molecular beam source nozzle is opened and closed in the following order to form a compound semiconductor layer as shown in FIG. First, the shutter of the fourth molecular beam source nozzle 9d is opened, and while the arsine is irradiated on the surface of the GaAs substrate 21 at a flow rate of 5 sccm, the GaAs substrate 21 is heated to about 6 by the heater 5d.
Heat at a temperature of 00 ° C or higher. Thereby, the GaAs substrate 2
The natural oxide film on one surface is removed. Subsequently, the substrate temperature is lowered to a growth temperature of 550 ° C., and this temperature is maintained.

Thereafter, the shutter of the molecular beam source nozzle 9a for introducing the TEG is opened, and the i-GaAs
To start growing. The flow rate of TEG is 1.6 sccm.
After the i-GaAs layer 22 is grown on the GaAs substrate 21 by about 4000 °, the shutter of the second molecular beam source nozzle 9b is opened and T
An EA gas is irradiated toward the GaAs substrate 21, whereby Al
The growth of GaAs is started, and the i-AlGaAs layer 23 is grown by about 1000 °. The flow rate of the TEA gas is 0.24 sccm.

Thereafter, the shutter of the molecular beam source nozzle 9d for introducing disilane is opened, and at the same time, the shutter of the molecular beam source nozzle 9b for introducing TEA is closed.
Is grown on the i-AlGaAs layer 23 to a thickness of 0.2 μm. The impurity concentration of the n-GaAs layer 24 is set to 1.5 × 10 ¹⁷ cm ⁻³ . Thereafter, the shutters of the molecular beam source nozzles other than the arsine-introducing molecular beam source nozzle 9d are closed, and then the substrate temperature is gradually lowered. When the substrate temperature becomes 300 ° C. or lower, the shutter of the molecular beam source nozzle 9d for introducing arsine is closed. Thus, the first growth of the compound semiconductor layer is completed.

Next, into the in situ (IN-SITU) lithographic process as shown in step S ₂ in FIG.
First, the GaAs substrate 21 is placed in the crystal growth chamber 5 of the GSMBE apparatus 1.
Then, the sample is taken out from a, and is carried into the photo-oxide film forming chamber 6 through the vacuum tunnels 4a and 4b and the sample exchange chamber 3. And FIG.
As shown in (b), the inside of the photo-oxide film forming chamber 6 is several Torr to several tens.
A GaAs oxide film 25 is formed on the surface of the n-GaAs layer 24 by irradiating light to the surface of the n-GaAs layer 24 on the GaAs substrate 21 in an oxygen atmosphere having a pressure in the Torr range (FIG. 3). step S _21). In this case, a xenon lamp is used as a light source.

Thereafter, the GaAs substrate 21 is taken out of the photo-oxide film formation chamber 6 and introduced into the electron beam irradiation chamber 7 through the vacuum tunnels 4b and 4c and the sample exchange chamber 3. In the electron beam irradiation chamber 7, while irradiating the GaAs substrate 21 with chlorine gas, an electron beam extracted from an electron beam column having a differential pumping structure (not shown) is applied to a channel region of the power FET (a region other than the ohmic formation region). irradiating the GaAs oxide film 25 in) (Fig. 3 step S _22). As a result, as shown in FIG. 4C, the GaAs oxide film 25 irradiated with the electron beam is removed, and the n-GaAs layer 24 is exposed therefrom.

Next, the GaAs substrate 21 is taken out of the electron beam irradiation chamber 7 and introduced again into the crystal growth chamber 5a of the GSMBE apparatus 5 through the vacuum tunnels 4c and 4a and the sample exchange chamber 3. Hydrogen gas is introduced into the ECR plasma generation source 11 of the GSMBE apparatus 5, and emits hydrogen radicals into the crystal growth chamber 5a. In the crystal growth chamber 5a First, as shown in step S ₂₃ and 4 of FIG. 3 (d),
The n-GaAs layer 24 and the GaAs oxide film 25 on the GaAs substrate 21 are irradiated with hydrogen radicals extracted from the ECR plasma generation source 11. At this time, the inside of the crystal growth chamber 5a was on the order of 10 ^-4 Torr, and the flow rate of hydrogen introduced into the ECR plasma generation source 11 was 2 sccm. Thus, the surface of the single-crystal n-GaAs layer 24 is cleaned, and the dangling bonds on the surface of the GaAs oxide film 25 are terminated with hydrogen.

Next, after stopping the hydrogen radical irradiation, FIG.
Entering the MBE regrowth steps as shown in Step S ₃ of.
First, the substrate temperature is raised to 550 ° C. while irradiating arsine toward the GaAs substrate 21 from the fourth molecular beam source nozzle 9d, and the temperature is maintained. Subsequently, molecular beam source nozzles 9a, 9b, 9e for introducing TEG, TEA and disilane.
5A, the n ^-- AlGaAs layer 26 is grown to a thickness of 500 DEG on the n-GaAs layer 24 not covered with the GaAs oxide film 25, as shown in FIG. n
^- the impurity concentration of the silicon in -AlGaAs layer 26 is 5 × 10
¹⁶ cm ^-3 Then, TEA and molecular beam source nozzle 9b for disilane introduced, and only the closed 9e shutter, as shown in FIG. ^{5 (a), n - i} -G on the -AlGaAs layer 26
The aAs layer 27 was grown to a thickness of 1500 °.

As described above, the n ⁻ -AlGaAs layer 2 selectively grown by GSMBE using the GaAs oxide film 25 as a mask
6. When the i-GaAs layer 27 was observed, no edge effect and no insulating film / semiconductor layer area ratio effect occurred. next,
And remain open only shutter molecular beam source nozzles 9d for arsine introduction, by heating the substrate temperature to 600 ° C. or higher, as shown in FIG. 5 (b) and 3 Step S _4, used as a mask The GaAs oxide film 25 that has been removed is removed.

Next, as shown in step S ₅ of FIG 2
Enter the second in-situ lithography process. First, the GaAs substrate 25 is introduced into the electron beam irradiation chamber 7 again. While irradiating O ₂ gas in place of Cl ₂ gas described above in that the electron beam irradiation chamber 7, only to draw the electron beam on the upper surface of the i-GaAs layer 27 is selectively grown, GaAs oxide film 28 on the surface thereof To form

Subsequently, the GaAs substrate 21 is introduced again into the crystal growth chamber 5a of the GSMBE apparatus 5, in which radical hydrogen is irradiated to the GaAs oxide film 28 and the i-GaAs layer 24 to clean the i-GaAs layer 24. and, terminating (terminate) with hydrogen GaAs oxide film 28 surface (Fig. 3 step S _52). next,
In the same GSMBE apparatus 5, the shutters of the molecular beam source nozzles 9a, 9d and 9e for introducing TEG, arsine and disilane are opened, and as shown in FIG.
8 as a mask, n ⁺ -GaAs layer 2 only in ohmic region
9 selective growth (FIG. 3 Step S _6). The silicon concentration of the n ⁺ -GaAs layer 29 is set to 2 × 10 ¹⁸ cm ⁻³ , and the thickness thereof is set to be substantially the same as the GaAs oxide film 28.

Thereafter, the GaAs oxide film 28 used as the mask is removed in the same manner as the first GaAs oxide film 25. Next, the GaAs substrate 21 is taken out of the GSMBE apparatus 5 through the vacuum chamber 4a, the sample exchange chamber 3, and the load lock chamber 2. Then, as shown in FIG. 5D, an opening is formed by patterning the i-GaAs layer 27 in the first selective growth layer portion, a buried gate electrode 30 is formed therein, and the second selective growth layer is formed. source electrode 31 on the upper surface of the n ⁺ -GaAs layer 29 grown layer portion, by forming the drain electrode 32, the power FET is completed (FIG. 3 step S _7).

In the FET structure thus manufactured, the ohmic contact resistance of the source and drain electrode portions was reduced, and thus good FET characteristics were realized. By the way, in the above process, before the compound semiconductor is selectively grown, the surface of the semiconductor layer is cleaned using hydrogen radical particles, so that a high quality epitaxial layer having an extremely small interface state can be formed on a single crystal plane. Layer grows.

According to the hydrogen radicals, dangling bonds on the GaAs oxide films (insulating films) 25 and 28 are terminated, so that the decomposition reaction of the molecular beam source material on the surfaces of the insulating films 25 and 28 is suppressed. Is done. In this case, the hydrogen radical Ga
The etching rate for As and AlGaAs is extremely small,
It is not necessary to precisely control the hydrogen radical. As a result, the GaAs layer 24, which is not covered with the GaAs insulating films 25, 28,
Since the film thickness of 27 is formed with good controllability, there is no variation in device characteristics.

The radical particles themselves are very active, and have the property of exchanging electrons by colliding with other particles or substances to become stable neutral particles. Therefore, when the radical particles approach the dangling bonds on the insulating film, they share the electrons of the dangling bonds or absorb and neutralize the electrons. On the surface of the insulating film where the dangling bonds are terminated, the organometallic molecules no longer fly, and even when approached, the electrons required to decompose the molecules are not supplied, so the molecules must be decomposed as they are. Without elimination. On the other hand, organometallic molecules arriving on the surface of the single crystal substrate due to the existence of free electrons are decomposed, only metal atoms contribute to the growth, and the organic groups are re-evaporated and eliminated, whereby crystal growth is performed. .

Therefore, by supplying the organometallic material while intermittently irradiating radical particles onto the single crystal substrate patterned with the insulating film, nothing is deposited on the insulating film, and the A single crystal can be grown at a growth rate corresponding to the strength of the organometallic material supplied only above. Also, GaAs or AlGaAs is used by using the GaAs oxide films 25 and 28 as a mask.
When GaAs or AlGaAs is selectively grown, an edge effect does not occur or the film thickness does not depend on the area of the mask, and the GaAs layer serving as a channel region is formed flat. As a result, in the FET, the traveling properties of carriers are improved, and good transistor characteristics are obtained.

(Second Embodiment) This embodiment describes a method for manufacturing a semiconductor laser having a DH structure by making full use of the selective growth technique of the present invention on an InP substrate. Hereinafter, the manufacturing process of the semiconductor laser will be described with reference to the cross-sectional views shown in FIGS.

An n-InP substrate (wafer) having a (100) plane is used as a compound semiconductor substrate on which a semiconductor laser is formed. First, the GaAs substrate 21 is transferred into the GSMBE apparatus 5 through the load lock chamber 2 and the sample exchange chamber 3 shown in FIG. Then, the n-InP substrate 41 is mounted on the wafer support 5b in the crystal growth chamber 5a of the GSMBE apparatus 5.

As a gas source material for epitaxial growth introduced into the crystal growth chamber 5a, triethyl gallium (TEG: Ga (C ₂ H ₅ ) ₃ ) and triethyl indium (TE
I: In (C ₂ H ₅ ) ₃ ) was converted to the first and second molecular beam source nozzles 9a,
9b into the crystal growth chamber 5a and arsine (As
H ₃ ) and phosphine (PH ₃ ) are converted into pyrolysis cells 10a and 10c.
It is introduced into the crystal growth chamber 5a through the attached fourth and sixth molecular beam source cells 9d and 9f. Further, disilane (Si ₂ H ₆ ) as an n-type dopant is introduced into the crystal growth chamber 5a through a fifth molecular beam source cell 9e having a pyrolysis cell 10b, and dimethyl zinc (DMZ: Zn ( C
H ₃ ) ₂ ) is passed through the third molecular beam source cell 9 c to the crystal growth chamber 5.
a.

The flow rates of these gas sources are independently adjusted by a mass flow controller (not shown).
Irradiation is performed toward the n-InP substrate 41 in the crystal growth chamber 5a. However, arsine gas and phosphine are decomposed in a high-temperature (900 ° C)
As ₂ and H ₂ is applied to the substrate surface. Similarly, the disilane gas is also decomposed into Si and H ₂ by the thermal decomposition cell and is irradiated on the substrate surface.

Then, the n-InP substrate 41 is placed in the crystal growth chamber 5a.
After the introduction, the shutter of the molecular beam source nozzle is opened and closed in the following order to form a compound semiconductor layer as shown in FIG. First, after introducing the n-InP substrate 41 into the crystal growth chamber 5a, the substrate temperature is heated to about 530 ° C. or higher while arsenic (As) is irradiated on the surface of the n-InP substrate 4a.
After removing the natural oxide film on one surface, the substrate temperature is lowered to a growth temperature of 480 ° C., and this temperature is maintained. Then, TE
The shutters of the molecular beam source nozzles 9b, 9f and 9e for introducing I, phosphine and disilane are opened to start the growth of n-InP, and the n-InP layer 42 is formed on the n-InP substrate 41 by about 300 nm.
Grow 0Å.

After closing the shutters of the molecular beam source nozzles 9b, 9f and 9e of TEI, phosphine and disilane, the molecular beam source nozzle 9d of arsine and the molecular beam source nozzle 9b of TEA are opened to open several atomic layers. A GaAs layer 43 is grown. Subsequently, the shutters of the molecular beam source nozzles other than the molecular beam source nozzle 9d for introducing arsine are closed, and then the substrate temperature is gradually lowered. When the substrate temperature becomes 300 ° C. or lower, the molecular beam source shutter for arsine is closed. Thus, the first growth of the compound semiconductor layer is completed.

Next, the n-InP substrate 41 is placed in the GSMBE device 5.
From the vacuum tunnels 4a and 4b, and the sample exchange chamber 3.
Then, it is carried into the photo-oxide film forming chamber 6. And FIG.
As shown in (b), the inside of the photo-oxide film forming chamber 6 is several Torr to several tens.
An GaAs oxide film 44 is formed by irradiating the surface of the GaAs layer 43 of several atoms on the n-InP substrate 41 with light to oxidize the atmosphere in an oxygen atmosphere having a pressure in the Torr range. In this case, a xenon lamp is used as a light source.

Next, the n-InP substrate 41 is placed in the photo-oxide film forming chamber 6.
From the vacuum tunnels 4b and 4c, the sample exchange chamber 3
Through to the electron beam irradiation chamber 7. In the electron beam irradiation chamber 7, chlorine (Cl ₂ ) gas is supplied as shown in FIG.
An electron beam is irradiated on the GaAs oxide film 44 in the semiconductor laser waveguide region while irradiating the electron beam toward the n-InP substrate 41. The GaAs oxide film 44 irradiated with the electron beam is removed, and n-
The upper surface of the InP layer 41 is exposed.

Next, the n-InP substrate 41 is taken out of the electron beam irradiation chamber 7, and the vacuum tunnels 4c and 4a and the sample exchange chamber 3 are removed.
Through the GSMBE apparatus 5 again. GSMB
In the crystal growth chamber 5a of the E apparatus 5, first, as shown in FIG. 6D, hydrogen radicals extracted from the ECR plasma generation source 11 are converted into n-InP layers 42 and GaAs oxide films 44 on an n-InP substrate 41. Irradiation.

At this time, the growth chamber was set at a level of 10 ⁻⁴ Torr, and the flow rate of hydrogen introduced into the ECR plasma generation source 11 was 2
sccm. In this manner, dangling bonds on the surface of the GaAs oxide film 44 are terminated with hydrogen, and the surface of the single crystal n-InP layer 42 is cleaned. Since the surface of the n-InP layer 42 is not deeply etched by the hydrogen radical, it is not necessary to precisely control the amount of the introduced hydrogen radical.

Next, after stopping the irradiation of hydrogen radicals, a second crystal growth is performed to form a layer structure as shown in FIG. First, while irradiating arsine toward the n-InP substrate 41 from the fourth molecular beam source nozzle 9d, the substrate temperature is reduced to 5%.
The temperature is raised to 50 ° C. and maintained at this temperature. Then, TE
Molecular beam source nozzle 9 for introducing I, phosphine and disilane
The shutters b, 9e and 9f are simultaneously opened to grow an n-InP cladding layer 45 to a thickness of 5000 ° on the n-InP layer 42 not covered by the GaAs oxide film 44. The impurity concentration of silicon in the n-InP cladding layer 45 is set to 5 × 10 ¹⁷ cm ⁻³ .

Thereafter, the shutters of the molecular beam source nozzles 9e and 9f for introducing disilane and phosphine are closed, and then the shutters of the molecular beam source nozzles 9a and 9d for introducing TEG and arsine are opened, and the n-InP cladding is opened. An InGaAs active layer 46 is grown on layer 45 to a thickness of 20 °. After the growth of the InGaAs active layer 46, the shutters of the molecular beam source nozzles 9a and 9d for TEG and arsine are closed.

Subsequently, the shutters of the electron beam source nozzles 9c and 9f for introducing DMZ and phosphine are opened to open p-In.
A P cladding layer 47 is grown to a thickness of 5000 °. At this time, the p-type impurity concentration is 5 × 10 ¹⁷ cm ⁻³ . Further, the shutter of the electron beam source nozzle 9f for phosphine is closed and TE
The shutters of the electron beam source nozzles 9a and 9d for G and arsine are opened to form a p-InGaAs cap layer 48. As described above, the n-InP cladding layer 45, the InGaAs active layer 46, the p-InP cladding layer 47, and the p-InGaAs cap layer 4 selectively grown along the waveguide region using the GaAs oxide film 44 as a mask.
No edge effect or insulating film / semiconductor layer area ratio effect occurs in 8.

Next, a molecular beam source nozzle 9 for introducing arsine
d Keep the shutter open and set the substrate temperature to 60
By heating to 0 ° C. or higher, the GaAs oxide film 44 used as the mask is removed as shown in FIG.
Subsequently, the n-InP substrate 41 is introduced again into the electron beam irradiation chamber 7 to form an oxide film on the uppermost surface of the selectively grown p-InGaAs cap layer 48. In the electron beam irradiation chamber 7,
An electron beam is drawn only on the upper surface of the selectively grown p-InGaAs cap layer 48 while irradiating the O ₂ gas instead of the Cl ₂ gas described above, thereby forming an InGaAs oxide film 49 on the surface.

Next, the n-InP substrate 41 is again introduced into the growth chamber 5a of the GSMBE apparatus 5, and radical hydrogen is introduced therein.
Irradiation is performed on the GaAs oxide film 49 and the n-InP layer 42. This cleans the n-InP layer 42 on both sides of the waveguide region and terminates dangling bonds on the surface of the InGaAs oxide film 49 with hydrogen. Thereafter, the electron beam source shutter of TEI and phosphine is opened, and i-InP is grown only on the n-InP layer 42 on both sides of the n-InP cladding layer 45. An i-InP high resistance current confinement layer 50 having a height is formed. No edge effect occurs in this growth step, and the i-InP high-resistance current confinement layer 50 is formed flat.

Thereafter, the shutters of the electron beam source nozzles 9b and 9f of TEI and phosphine are closed, and the InGaAs oxide film 49 used as a mask is removed by heating to 600 ° C. in an arsine atmosphere. Then, the electron beam source nozzles 9b, 9c, 9f of TEI, DMZ and phosphine are opened to open the shutter.
p-InGaAs cap layer 48 and i-InP high resistance current confinement layer 50
A p ⁺ -InP layer 51 as shown in FIG.

Next, the n-InP substrate 41 is placed in the GSMBE device 5
From the vacuum chamber 4a, the sample exchange chamber 3, and the load lock chamber 2 to the outside. Thereafter, an n-electrode 52 is formed on the lower surface of the n-InP substrate 41, and a p-electrode 53 is formed on the p ⁺ -InP layer 51, thereby completing the DH semiconductor laser. In the semiconductor laser fabricated in this manner, the n-InP cladding layer 45, the InGaAs active layer 46, and the p-cladding layer 47 are formed flat, so that the InGaAs active layer 46 does not bend and light confinement does not deteriorate. In addition, since the interface states generated on the side surfaces of the selectively grown InGaAs active layer 46 and the InP clad layers 45 and 47 are almost negligible, the leakage current does not increase, thereby reducing the threshold current and increasing the luminous efficiency. Characteristics are obtained.

On the other hand, the process which has already been used is to form the n-InP substrate 61 on the n-InP substrate 61 as shown in FIG.
After forming the P cladding layer 62, the InGaAs active layer 63, the p-InP cladding layer 64, and the p-InGaAs cap layer 65,
An O ₂ mask 66 is formed along the waveguide region, and the portions from the p-InGaAs cap layer 65 to the n-InP clad layer 62 on both sides of the SiO ₂ mask 66 are removed by etching. Thereafter, as shown in FIG. 8 (b), a current confinement layer (or pnp buried layer) 67 is formed on both sides of the waveguide region.
As shown in (c), a p ⁺ -InP contact layer 68 is formed.

According to such a conventional manufacturing process, the active layer 6 is formed by etching when patterning the semiconductor layer.
Light emission centers are formed on the side surface 4 and the side surfaces of the cladding layers 63 and 65, so that the light emission efficiency is reduced and the leak current is increased. As a result, there has been a problem that the threshold current increases and the characteristics deteriorate. The leakage current is shown in FIG.
As shown by the dashed line, the current flows from the p-InP cladding layer 65 to the buried layer (or current confinement layer) 67 on both sides thereof.

In this embodiment, when InP or InGaAs is selectively grown, the etching rate of InGaAs or InP by hydrogen radicals is extremely small, so that the thickness of the compound semiconductor layer is controlled with high precision. Also, GaAs
Nothing is deposited on the insulating film by supplying an organometallic material while intermittently irradiating radical particles onto the single crystal layer patterned using an oxide film or InGaAs oxide film as a mask. Instead, the single crystal grows flat at a growth rate corresponding to the strength of the organometallic material supplied only on the single crystal face. As a result, the control of the device film thickness is facilitated, and the device characteristics are made uniform.

(Other Embodiments) In the first embodiment, the selective growth of a compound semiconductor using radical particles was performed using power FE.
However, the feature of the present invention is most suitable for the fabrication of a quantized functional element that brings out the properties of a quantum effect and an electron wave by combining it with a technique for forming a fine pattern using an EB drawing technique.

In the first and second embodiments, the gas source MBE method is used as the crystal growth technique. However, as another example, the MOVPE method in which the crystal is grown in a vacuum vessel can be used. In addition, if the semiconductor growth chamber can transfer a substrate to another processing chamber through a vacuum tunnel, there is no need to limit the structure of the apparatus. However, the growth source material needs to be an organometallic compound.

The radical particles may be generated not only by the above-mentioned ECR plasma but also by RF plasma or the collision of thermoelectrons. In a vacuum having a large mean free path, the radical particles thus generated are beam-formed. It is possible to take out and irradiate the growth substrate. Radical particles may be simultaneously irradiated during selective growth of a compound semiconductor such as GaAs, InGaAs, or AlGaAs, or compound semiconductor growth and irradiation of radical particles may be performed alternately.

The radical particles include argon radicals and nitrogen radicals in addition to hydrogen radicals, but do not include chlorine and fluorine which serve as etching gases for compound semiconductors.

[0074]

As described above, according to the present invention, before or simultaneously with the introduction of the source gas for growing the compound semiconductor on the first compound semiconductor layer not covered with the insulating mask. Or, intermittently, the first compound semiconductor layer and the insulating mask are irradiated with radical particles that do not become an etchant of the compound semiconductor, so that the first and second compound semiconductor layers are almost etched. The dangling bond on the insulating mask can be terminated without any problem, and the decomposition reaction of the molecular beam source material on the insulating film surface can be suppressed. In addition, according to the gas source molecular beam epitaxial growth, the compound semiconductor layer selectively grown can be formed flat.

In particular, the effect is great for the selective growth of an epitaxial film containing an active constituent element such as Al.

[Brief description of the drawings]

FIG. 1 is a plan view showing an outline of a compound semiconductor epitaxial selective growth apparatus according to an embodiment of the present invention.

FIG. 2 is a cross-sectional view showing a crystal growth chamber of a compound semiconductor epitaxial growth apparatus according to an embodiment of the present invention and a radical particle generation source mounted inside the crystal growth chamber.

FIG. 3 is a flowchart showing a manufacturing process of the electronic device according to the first embodiment of the present invention.

FIG. 4 is a cross-sectional view (part 1) illustrating a process for manufacturing the electronic device according to the first embodiment of the present invention.

FIG. 5 is a sectional view (No. 2) showing a step of manufacturing the electronic device according to the first example of the present invention.

FIG. 6 is a sectional view (1) showing a step of manufacturing a semiconductor laser according to a second embodiment of the present invention.

FIG. 7 is a sectional view (No. 2) showing a step for manufacturing the semiconductor laser according to the second embodiment of the present invention.

FIG. 8 is a sectional view showing a typical manufacturing process of a conventional semiconductor laser.

[Explanation of symbols]

21 GaAs substrate 22 i-GaAs layer 23 i-AlGaAs layer 24 n-GaAs layer 25 GaAs oxide films (insulating mask) 26 n ^- - AlGaAs layer 27 i-GaAs layer 28 GaAs oxide films (insulating mask) 29 n ⁺ -GaAs layer 41 n-InP substrate 42 n-InP layer 43 GaAs layer 44 GaAs oxide film (insulating mask) 45 n-InP cladding layer 46 InGaAs active layer 47 p-InP cladding layer 48 p-InGaAs cap layer 49 InGaAs oxidation Film (insulating mask) 50 InP layer

Continuation of the front page (56) References JP-A-4-62917 (JP, A) JP-A-4-192323 (JP, A) JP-A-5-21356 (JP, A) JP-A-5-109670 (JP JP-A-5-243150 (JP, A) JP-A-5-299352 (JP, A) (58) Fields investigated (Int. Cl. ⁷ , DB name) H01L 21/205 C30B 23/08 H01L 21/203 H01S 5/30

Claims (9)

(57) [Claims] 1. A step of forming a first insulating mask (25, 44) on a first compound semiconductor layer (24, 42); and a surface of the first compound semiconductor layer (24, 42). And irradiating the surface of the first insulating mask (25, 44) with radical particles that do not become an etchant of the first compound semiconductor layer (24, 42); A gas source is supplied over the first compound semiconductor layer (24, 42) not covered by the second compound semiconductor layer (26, 2).
7, 45, 48), a step of removing the first insulating mask (25, 44), and a step of removing the second compound semiconductor layer (26, 27, 45, 48).
A second insulating mask (28, 4) for selectively covering the upper surface of
9) forming a first compound semiconductor layer (24, 42) on the surface of the second insulating mask (28, 49) and the surface of the first compound semiconductor layer (24, 42); A) irradiating radical particles that do not function as an etchant; and a third compound semiconductor on the first compound semiconductor layer (24, 42) not covered with the second insulating mask (28, 49). A method for manufacturing a compound semiconductor device, comprising: a step of epitaxially growing a layer (29, 50); and a step of removing the second insulating mask (28, 49). 2. The second compound semiconductor layer (26, 2).
7. The method according to claim 1, wherein the growth is performed by irradiating a source gas and radical particles. 3. The second compound semiconductor layer (26, 2).
7, 45, 48) and the third compound semiconductor layer (2
9. The method according to claim 1, wherein at least one of (9, 50) is grown while irradiating a compound semiconductor source gas with radical particles that do not function as an etchant for the compound semiconductor. 4. The second compound semiconductor layer (26, 2).
7, 45, 48) and the third compound semiconductor layer (2
9. The method according to claim 1, wherein at least one of (9, 50) is grown by alternately supplying a source gas of the compound semiconductor and radical particles that do not function as an etchant of the compound semiconductor. The manufacturing method of the compound semiconductor device of the above. 5. The first insulating mask (25, 44).
2. The compound semiconductor device according to claim 1, wherein at least one of the second insulating mask and the second insulating mask is formed of an oxide film formed by light irradiation in an oxygen atmosphere. Production method. 6. The first insulating mask (25, 44).
2. The compound according to claim 1, wherein at least one of the second insulating masks (28, 49) is patterned by drawing an electron beam on the insulating film in an etching gas atmosphere. 3. A method for manufacturing a semiconductor device. 7. The first insulating mask (25, 44).
And at least one of the second insulating masks (28, 49) is provided in the oxygen atmosphere in the first compound semiconductor layer (24, 42) or the second compound semiconductor layer (26, 49).
2. The method according to claim 1, wherein the semiconductor device is formed by drawing an electron beam on (27, 45, 48). 8. The first insulating mask (25, 44).
2. The method according to claim 1, wherein at least one of the second insulating mask and the second insulating mask is removed by heating in an As atmosphere. 3. 9. The method according to claim 1, wherein the radical particles are hydrogen radicals, argon radicals, or nitrogen radicals.