JPH07254565A - Compound semiconductor epitaxial growth method, its growth equipment and formation of compound semiconductor device - Google Patents

Abstract

PURPOSE:To accurately control the thickness of a compound semiconductor layer selectively grown and form said layer flat with respect to the compound semiconductor epitaxial growth method performing epitaxial growth selectively on a compound semiconductor single crystal substrate. CONSTITUTION:This method comprises a process for forming an insulating mask 25 on a first compound semiconductor layer 24 and a process of radiating radical particles, which do not become the etchant of the first compound semiconductor layer 24, to the surface of insulating mask 25 and the surface of the first compound semiconductor layer 24. Moreover, there is another process of supplying a source gas of the compound semiconductor to the surface of the first compound semiconductor layer 24, to which the radical particles were radiated, thereby supplying the source gas to the top of the first compound semiconductor layer 24 in the region not covered with the insulating mask 25 for giving epitaxial growth selectively to the second compound semiconductor layer 26.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a compound semiconductor epitaxial growth method, a compound semiconductor epitaxial growth apparatus, and a compound semiconductor device formation method, and more specifically, a compound semiconductor epitaxial growth method for selectively performing epitaxial growth on a compound semiconductor single crystal substrate. The present invention relates to a compound semiconductor epitaxial growth apparatus and a method for manufacturing a compound semiconductor device including the epitaxial growth step.

[0002]

2. Description of the Related Art In recent years, new electronic devices and optical devices have been realized by forming an epitaxial growth layer on a single crystal semiconductor substrate and making the epitaxial growth layer multi-layered or by forming a heterostructure. In particular, by combining microfabrication technology and heteroepitaxial technology, quantum effect elements that confine electrons in a low-dimensional structure and bring out the quantum effect of electrons, and electron wave interference logic elements that utilize the properties of electron waves have been devised. These are called quantization functional elements and are expected to be put to practical use in the near future as new electronic devices.

As an epitaxial technique in these cases, a molecular beam epitaxial growth method (MBE), a metal organic chemical vapor deposition method (MOVPE), etc. are known. The feature of these techniques is that an ultrathin film can be grown with good controllability. In order to supply the molecular beam source material in MBE, a structure in which a metal source is held in a vacuum chamber (crystal growth chamber) is adopted. Recently, a gas source molecular beam epitaxial growth method (GSMBE) has been developed which employs a gas introduction method in which a gaseous source containing an organometallic compound is provided outside the vacuum chamber and the source is introduced into the vacuum chamber through a gas introduction valve. Is becoming active. GSMBE is MOMBE (M
etalorganic MBE) or CBE (Chemical Beam Ep)
Itaxy) is also called.

MBE, MOVPE, or GSMBE used as a heteroepitaxial technique is characterized by a growth process on a semiconductor substrate. In particular, forming a patterning mask on a semiconductor substrate and growing a heteroepitaxial layer on the substrate surface will be described below. (1) MBE Since the growth principle of the MBE method is close to physical vapor deposition, for example, when a compound semiconductor layer is patterned on a GaAs substrate using a mask made of SiN _x , GaAs or AlGaAs on the GaAs single crystal surface is patterned. It is possible to grow a single crystal layer.

On the other hand, a polycrystalline GaAs or AlGaAs layer is laminated on the SiN _x film. The control of the thickness of the single crystal layer does not depend on the size and shape of the window of the mask, but is determined by the intensity of the molecular beam reaching the surface of the mask or the single crystal layer. This is an advantage when manufacturing a fine structure. The polycrystalline layer formed on the mask can be used as an insulating layer, but when forming a heterostructure or an electrode in the region next to the single crystal layer, it is necessary to remove the polycrystalline layer by a lift-off method or the like. Becomes

(2) MOVPE In the MOVPE method, the characteristics of selective growth on the substrate also change depending on whether the gas pressure in the growing furnace is atmospheric pressure or reduced pressure. In the case of atmospheric pressure MOVPE, a polycrystalline or amorphous film is deposited on the insulating film (eg, SiN _x film) used as a mask. Further, a single crystal film grows on the single crystal plane. However, the growth rate on the single crystal plane changes depending on the area ratio between the area where the insulating film is formed and the area where the single crystal layer is present, and the growth rate is high in the area near the insulating film on the single crystal surface. It is known that a so-called edge effect occurs.

In the case of reduced pressure MOVPE, as the pressure is reduced, it becomes difficult to deposit a polycrystalline or amorphous film on the insulating film, while the change in the growth rate and the edge effect due to the area ratio of the insulating film and the single crystal surface. Becomes noticeable. The edge effect is described in the following document. [1] Kenji HIRUMA et al., Journal of Crystal Grow
th 102, pp.717-724, 1990 (3) GSMBE In the GSMBE method, for example, when GaAs is grown with a mask made of SiN _x (insulating film) formed on a GaAs substrate, nothing appears on the mask. No deposition, no change in growth rate due to the area ratio between the insulating film and the single crystal, and no edge effect were observed. This is because the GSMBE method is growth by the surface reaction mechanism between the molecular beam material and the solid surface.

The good growth selectivity of GSMBE is as follows.
This is very effective when a quantum functional device is produced by heteroepitaxial growth on a semiconductor substrate. However, as in the case of MBE, there is a combination of a molecular beam material and an insulating film that causes a polycrystalline film or an amorphous film to be deposited on the insulating film. For example, when an AlGaAs single crystal is selectively grown on a GaAs surface using a patterning mask made of SiN _x , an AlGaAs polycrystalline or amorphous film is deposited on the mask. This is because the organometallic material containing Al is very active and causes a decomposition reaction also on the SiN _x film and the insulating film. An AlGaAs single crystal layer or a single crystal layer having a composition of Al is a very important layer for manufacturing a GaAs-based electronic device, and there is a great demand for technological development for selectively growing these layers.

In the following reference, AlGa was obtained by the MOVPE method.
By adding hydrogen chloride gas (HCl) during As growth,
It has been shown that the AlGaAs layer can be selectively grown without depositing a polycrystalline or amorphous film on the SiN _x patterning mask film. [2] Kenji Shimoyama, Katsuji Fujii, Yuichi Inoue, Hideki Goto, Japan Society of Applied Physics, Applied Electronics Physics Subcommittee Research Report (AP922227),
No.445, pp.15-20, 1992 As a model for the role of HCl gas in improving selectivity, they proposed that the dangling bonds on the SiN _x film surface were terminated with Cl (termination) and the growth species contained Al. When
This is because the reaction with the SiN _x film is suppressed.

[0010]

Even if the method of adding HCl gas during the growth by MOVPE method is adopted, the above-mentioned area ratio effect and edge effect of the pattern cannot be completely removed, and the fine pattern cannot be removed. The controllability of the growth rate is poor in forming the structural pattern. According to the area ratio effect, it is difficult to obtain uniform device characteristics in one semiconductor integrated circuit. Further, since the semiconductor layer is curved due to the edge effect, there is a problem that carrier traveling property of the electronic device is deteriorated and light confinement of the optical device is deteriorated.

Further, since HCl gas serves as an etching gas for GaAs and AlGaAs, it is difficult to control the growth rate of a semiconductor by adding HCl, and it is difficult to obtain uniform element characteristics when forming an electronic device or an optical device. There is also a problem. The present invention has been made in view of such a problem, and is a method for epitaxially growing a compound semiconductor, which can control the thickness of a compound semiconductor layer to be selectively grown well and can form the compound semiconductor layer flatly. ,
An object of the present invention is to provide a compound semiconductor epitaxial growth apparatus and a method for forming a compound semiconductor device capable of forming a compound semiconductor layer flatly with good film thickness controllability.

[0012]

[Means for Solving the Problems]
As illustrated in FIG. 5, (1) the first compound semiconductor layer 2
A step of forming insulating masks 25, 44 on 4, 42, and the first compound semiconductor layer 24 on the surfaces of the insulating masks 25, 44 and the surfaces of the first compound semiconductor layers 24, 42. , 42, a step of irradiating the radical particles that do not become an etchant, and the source gas of the compound semiconductor is supplied to the surface of the first compound semiconductor layers 24, 42 irradiated with the radical particles, and the insulating mask 25, A compound characterized by comprising a step of supplying a source gas onto the first compound semiconductor layers 24, 42 in a region not covered by 44 to selectively epitaxially grow the second compound semiconductor layers 26, 45. This is solved by a semiconductor epitaxial growth method.

(2) A step of forming insulating masks 25, 44 on the first compound semiconductor layers 24, 42, and the surfaces of the first compound semiconductor layers 24, 42 and the insulating masks 25, 44. To
Source gas of compound semiconductor and the first compound semiconductor layer
Radical particles that do not serve as etchants of 24 and 42 are simultaneously irradiated, and a source gas is selectively supplied onto the first compound semiconductor layers 24 and 42 in the regions not covered by the insulating masks 25 and 44. This is solved by a compound semiconductor epitaxial growth method, which comprises a step of epitaxially growing the second compound semiconductor layers 26 and 45.

(3) A step of forming insulating masks 25 and 44 on the first compound semiconductor layers 24 and 42, the surface of the insulating masks 25 and 44, and the first compound semiconductor layers 24 and 42. The surface of the first compound semiconductor layer 24, 42 is alternately irradiated with radical particles not functioning as an etchant for the first compound semiconductor layer and an organometallic compound source, and the first compound semiconductor not covered with the insulating masks 25, 44. A method for epitaxially growing a compound semiconductor, which comprises the step of supplying a source gas onto the layers 24 and 42 to selectively epitaxially grow the second compound semiconductor layers 25 and 44.

(4) Molecular beam sources 9a to 9f for irradiating a substrate with a source gas for growing a compound semiconductor,
A compound semiconductor epitaxial growth apparatus including a radical particle generation source 11 that emits radical particles that do not function as an etchant for a compound semiconductor layer. (5) A step of forming first insulating masks 25, 44 on the first compound semiconductor layers 24, 42, a surface of the first compound semiconductor layers 24, 42 and the first insulating mask The step of irradiating the surface of the first compound semiconductor layers 24, 42 with radical particles that do not serve as an etchant for the first compound semiconductor layers 24, 42, and the first compound semiconductor layers not covered by the first insulating masks 25, 44. A step of supplying a gas source on 24, 42 to selectively epitaxially grow the second compound semiconductor layers 26, 27, 45, 48, and a step of removing the first insulating masks 25, 44. This is solved by a method for manufacturing a semiconductor device, which has the above feature.

(6) The second compound semiconductor layers 26, 27,
45 and 48 are solved by irradiating a source gas and radical particles, and solved by the method of manufacturing a semiconductor device of (5). (7) After removing the first insulating masks 25 and 44,
A step of forming second insulating masks 28, 49 selectively covering the upper surfaces of the second compound semiconductor layers 26, 27, 45, 48, and the surfaces of the second insulating masks 28, 49 and the first insulating masks 28, 49. On the surface of the one compound semiconductor layer 24, 42, the first compound semiconductor layer 24,
Irradiation with radical particles that do not function as an etchant for 42, and epitaxial growth of third compound semiconductor layers 29, 50 on the first compound semiconductor layers 24, 42 not covered by the second insulating masks 28, 49. And a step of removing the second insulating masks 28 and 49. The method for manufacturing a semiconductor device according to (5) is solved.

(8) The second compound semiconductor 26, 27, 4
5, 48, and at least one of the third compound semiconductor layers 29, 50 is grown while irradiating radical particles that do not function as an etchant of the compound semiconductor with the source gas of the compound semiconductor (5) or (7)
This is solved by a method of manufacturing a semiconductor device. (9) At least one of the second compound semiconductors 26, 27, 45, 48 and the third compound semiconductor layers 29, 50 alternates between the source gas of the compound semiconductor and the radical particles that do not function as an etchant of the compound semiconductor. (5) or (7) which is characterized in that the semiconductor device is grown by being supplied to the semiconductor device.

(10) At least one of the first insulating masks 25 and 44 and the second insulating masks 28 and 49 is composed of an oxide film formed by light irradiation in an oxygen atmosphere. (5) or (7) which is characterized by the above. (11) At least one of the first insulating masks 25 and 44 and the second insulating masks 28 and 49 is patterned by drawing an electron beam on an insulating film in an etching molecular gas atmosphere. (5) or (7) which is characterized by the above.

(12) At least one of the first insulative masks 25, 44 and the second insulative masks 28, 49 is formed in the oxygen atmosphere in the first compound semiconductor layers 24, 42 or the second compound semiconductor layers 24, 42. The compound semiconductor layers 26, 27, 45, and 48 are formed by drawing an electron beam on the compound semiconductor layers 26, 27, 45, and 48 to solve the problem (5) or (7). (13) At least one of the first insulating masks 25 and 44 and the second insulating masks 28 and 49 is removed by heating in an As atmosphere (5)
Alternatively, the problem can be solved by the semiconductor device manufacturing method of (7).

(14) The radical particles are hydrogen radicals, argon radicals or nitrogen radicals, the compound semiconductor epitaxial growth method of (1), (2) or (3), and the compound semiconductor epitaxial growth of (4). This is solved by the device or the method of manufacturing a semiconductor device according to (5) or (7).

[0021]

[Operation] According to the present invention, a compound gas is introduced before, simultaneously with, or intermittently, a source gas for growing a compound semiconductor on the first compound semiconductor layer not covered with the insulating mask. The first compound semiconductor layer and the insulating mask are irradiated with radical particles that do not serve as an etchant for the semiconductor.

As a result, the dangling bond on the insulating mask is terminated with almost no etching of the first and second compound semiconductor layers, and the decomposition reaction of the molecular beam source material on the surface of the insulating film can be suppressed. Moreover, the compound semiconductor layer selectively grown by the gas source molecular beam epitaxial growth is formed flat. The radical particles can be generated by ECR plasma, RF plasma, collision of thermoelectrons, or the like. In a vacuum having a large mean free path, the radical particles thus generated are taken out in a beam shape and grown. Can be irradiated.

The radical particles are very active themselves and have the property of colliding with other particles or substances to exchange electrons and become stable neutral particles. Therefore, when the radical particles approach the dangling bonds on the insulating film, they share electrons of the dangling bonds or absorb the electrons and are neutralized. On the surface of the insulating film where the dangling bonds are terminated, organometallic molecules will no longer flow, and even if they approach, the molecules will not be supplied with the electrons necessary for decomposition, so the molecules will decompose as they are. Without re-desorption. On the other hand, on the surface of the single crystal substrate, the organometallic molecules that arrive due to the existence of free electrons are decomposed, only the metal atoms contribute to the growth, and the organic groups are re-evaporated and desorbed, whereby crystal growth is performed. .

Therefore, by supplying the organometallic material to the single crystal substrate patterned with the insulating film while intermittently irradiating the radical particles, nothing is deposited on the insulating film, and the single crystal plane is formed. A single crystal can be grown at a growth rate according to the strength of the organometallic material supplied only above. Further, especially when the radical particles are hydrogen radicals,
It is also known that the semiconductor crystal surface has a cleaning effect, and it becomes possible to grow a good-quality epitaxial film having an extremely small interface state on the patterned single crystal surface.

In particular, the effect is great for selective growth of an epitaxial film containing an active constituent element such as Al.

[0026]

Embodiments of the present invention will be described below with reference to the drawings. FIG. 1 is a plan view showing a schematic configuration of a compound semiconductor selective growth apparatus according to an embodiment of the present invention. The compound semiconductor selective growth apparatus 1 includes a load lock chamber 2 for loading and unloading wafers, a sample exchange chamber 3 for relaying wafers, and a sample exchange chamber 3 via a vacuum tunnel 4a.
A GSMBE apparatus 5 connected to the sample exchange chamber 3, a photo-oxide film forming chamber 6 connected to the sample exchange chamber 3 via a vacuum tunnel 4b,
It has an electron beam irradiation chamber 7 connected to the sample exchange chamber 3 via a vacuum tunnel 4c. In addition, reference numerals 8a to 8d in the drawing
Indicates a shutter.

In the crystal growth chamber 5a of the GSMBE apparatus 5,
As shown in FIG. 2 (a), a wafer support 5b on which the wafer w is placed, a heater 5c for heating the wafer support 5b,
A thermocouple 5d for measuring the temperature of the heater 5c, an electron gun 5e for irradiating the surface of the wafer w with electrons, an RHEED 5f for receiving electrons reflected from the wafer w, and a crystal growth chamber 5
There is an exhaust system 5g for decompressing the inside of a. Further, in the crystal growth chamber 5a, a plurality of molecular beam source nozzles 9a to 9c for introducing an organometallic gas, and a thermal decomposition cell 10a.
A molecular beam source nozzle 9d for introducing the inorganic gas decomposed by and the molecular beam source nozzles 9e, 9f for introducing the impurity gas decomposed by the thermal decomposition cells 10c, 10d are attached. The tips of the molecular beam source nozzles are directed to the wafer w, and the molecular beam source nozzles 9a to 9a.
An openable / closable molecular beam source shutter (not shown) is arranged in front of the tip of 9f. Further, in the crystal growth chamber 5a, an ECR plasma generation source 1 for generating radicals
1 is attached.

As shown in FIG. 2 (b), the ECR plasma generation source 11 includes a microwave introduction pipe 11a and a gas introduction pipe 1
Plasma chamber 11c to which 1b is connected, and plasma chamber 11
magnet coil 11d surrounding c and plasma chamber 11c
A gas discharge port 11e for discharging the gas toward the wafer w from the shutter 11f.
Are arranged.

In addition to the GSMBE device 5, a mass spectrometer, an Auger spectroscopic analysis device, a nude ion gauge, etc., which are not shown, are attached. Electron beam irradiation chamber 7 described above
Has an electron beam column (not shown) having a differential pumping structure for irradiating the wafer w with an electron beam, and has a structure capable of introducing gases such as chlorine and oxygen into the EB drawing chamber.

The above-mentioned photo-oxide film forming chamber has a structure in which oxygen can be introduced into the chamber in which the wafer is placed. By irradiating light in an oxygen atmosphere in the chamber, the surface of the compound semiconductor layer such as GaAs is exposed. A photo oxide film is formed. Next, an example of a process of manufacturing an electronic device and an optical device using the compound semiconductor selective growth apparatus 1 described above will be described.

(First Embodiment) This embodiment is an explanation of a method of manufacturing a high performance power FET having a heteroepitaxial structure by making full use of the selective growth technique of the present invention. The manufacturing process of the power FET will be described below based on the flow chart shown in FIG. 3 and the sectional views shown in FIGS.

A semi-insulating GaAs substrate (wafer) 21 having a (100) plane is used as a compound semiconductor substrate on which a power FET is formed. First, the GaAs substrate 21 is transferred into the GSMBE apparatus 5 through the load lock chamber 2 and the sample exchange chamber 3 shown in FIG. Then, the GaAs substrate 21 is mounted on the wafer support 5b in the crystal growth chamber 5a of the GSMBE apparatus 5, and the MBE growth step (S _{1 in} FIG. 3) is started.

Triethylgallium (TEG: Ga (C ₂ H ₅ ) ₃ ) and triethylaluminum (TE) are used as gas source materials for epitaxial growth introduced into the crystal growth chamber 5a.
A: Al (C ₂ H ₅ ) ₃ ) is used for the first and second molecular beam source nozzles 9a,
It is introduced into the crystal growth chamber 5a through 9b, and arsine (As
H ₃ ) is a fourth molecular beam source cell 9d with a pyrolysis cell 10a
Through the crystal growth chamber 5a. Further, disilane (Si ₂ H ₆ ) as an n-type dopant is introduced into the crystal growth chamber 5a through the fifth molecular beam source cell 9e with the thermal decomposition cell 10b.

The flow rates of these gas sources are independently adjusted by a mass flow controller (not shown),
The GaAs substrate 21 in the crystal growth chamber 5a is irradiated with the light. However, arsine gas has a high temperature (90
It is decomposed in a pyrolysis cell 10a at 0 ° C. and is irradiated onto the substrate surface as As and H ₂ . Similarly, the disilane gas is decomposed into Si and H ₂ by the thermal decomposition cell 10b and irradiated on the substrate surface.

After introducing the semi-insulating GaAs substrate 21 into the crystal growth chamber, the shutter of the molecular beam source nozzle is opened and closed in the following order to form a compound semiconductor layer as shown in FIG. 4 (a). First, the shutter of the fourth molecular beam source nozzle 9d is opened, and while the arsine is applied to the surface of the GaAs substrate 21 at a flow rate of 5 sccm, the heater 5d moves the GaAs substrate 21 to approximately 6
Heat at a temperature of 00 ° C. or higher. This allows the GaAs substrate 2
1 Remove the native oxide film on the surface. Then, the substrate temperature is lowered to the growth temperature of 550 ° C. and kept at this temperature.

After that, the shutter of the molecular beam source nozzle 9a for introducing the TEG is opened, and the i-GaAs is placed on the GaAs substrate 21.
Start to grow. The flow rate of TEG is 1.6 sccm.
After the i-GaAs layer 22 is grown on the GaAs substrate 21 by about 4000 Å, the shutter of the second molecular beam source nozzle 9b is opened and T
Irradiate the EA gas toward the GaAs substrate 21, thereby
The growth of GaAs is started, and the i-AlGaAs layer 23 is grown to about 1000Å. The flow rate of TEA gas is 0.24 sccm.

Thereafter, the shutter of the molecular beam source nozzle 9d for introducing disilane is opened, and at the same time, the shutter of the molecular beam source nozzle 9b for introducing TEA is closed.
An n-GaAs layer 24 doped with is grown on the i-AlGaAs layer 23 to a thickness of 0.2 μm. The impurity concentration of the n-GaAs layer 24 is 1.5 × 10 ¹⁷ cm ^-3 . Then, the shutters of the molecular beam source nozzles other than the molecular beam source nozzle 9d for introducing arsine are closed, and then the substrate temperature is gradually lowered. When the substrate temperature becomes 300 ° C. or lower, the shutter of the molecular beam source nozzle 9d for introducing arsine is closed. This completes the first growth of the compound semiconductor layer.

Next, an in-situ (IN-SITU) lithography process as shown in step S _{2 of} FIG. 3 is started.
First, the GaAs substrate 21 is placed in the crystal growth chamber 5 of the GSMBE apparatus 1.
It is taken out from a, and is carried into the photo-oxide film forming chamber 6 through the vacuum tunnels 4a and 4b and the sample exchange chamber 3. And FIG.
As shown in (b), the inside of the photo-oxide film forming chamber 6 is set to several Torr to several tens.
By irradiating the surface of the n-GaAs layer 24 on the GaAs substrate 21 with light in an oxygen atmosphere having a pressure in the Torr range, a GaAs oxide film 25 is formed on the surface of the n-GaAs layer 24 (FIG. 3). Step S ₂₁ ). In this case, a xenon lamp is used as the light source.

After this, the GaAs substrate 21 is taken out from the photo-oxide film forming chamber 6 and introduced into the electron beam irradiation chamber 7 through the vacuum tunnels 4b and 4c and the sample exchange chamber 3. In the electron beam irradiation chamber 7, while irradiating the GaAs substrate 21 with chlorine gas, the electron beam extracted from the electron beam column of the differential exhaust structure (not shown) is applied to the channel region of the power FET (region other than the ohmic formation region). irradiating the GaAs oxide film 25 in) (Fig. 3 step S _22). As a result, as shown in FIG. 4C, the GaAs oxide film 25 irradiated with the electron beam is removed, and the n-GaAs layer 24 is exposed therefrom.

Next, the GaAs substrate 21 is taken out of the electron beam irradiation chamber 7, and again introduced into the crystal growth chamber 5a of the GSMBE apparatus 5 through the vacuum tunnels 4c and 4a and the sample exchange chamber 3. Hydrogen gas is introduced into the ECR plasma generation source 11 of the GSMBE apparatus 5 to release hydrogen radicals into the crystal growth chamber 5a. In the crystal growth chamber 5a First, as shown in step S ₂₃ and 4 of FIG. 3 (d),
The n-GaAs layer 24 and the GaAs oxide film 25 on the GaAs substrate 21 are irradiated with hydrogen radicals extracted from the ECR plasma generation source 11. At this time, the inside of the crystal growth chamber 5a was on the order of 10 ⁻⁴ Torr, and the flow rate of hydrogen introduced into the ECR plasma generation source 11 was 2 sccm. In this way, the surface of the single crystal n-GaAs layer 24 is cleaned and the dangling bond on the surface of the GaAs oxide film 25 is terminated by hydrogen.

Next, after stopping the irradiation of hydrogen radicals, as shown in FIG.
The MBE re-growth process as shown in step S ₃ of FIG.
First, the substrate temperature is raised to 550 ° C. while irradiating the GaAs substrate 21 with arsine from the fourth molecular beam source nozzle 9d, and this temperature is maintained. Then, the shutters of the molecular beam source nozzles 9a, 9b and 9e for introducing TEG, TEA and disilane are simultaneously opened to remove GaAs as shown in FIG. 5 (a).
On the n-GaAs layer 24 not covered with the oxide film 25, n ^-- AlG
The aAs layer 26 is grown to a thickness of 500Å. n ^-- AlGaAs
The silicon concentration in layer 26 is 5 × 10 ¹⁶ cm ⁻³ .
Then, a molecular beam source nozzle 9 for introducing TEA and disilane
Only the shutters b and 9e are closed, and an i-GaAs layer 27 is formed on the n ^-- AlGaAs layer 26 as shown in FIG. 5 (a).
Å grew to a thickness.

In this way, the n ^-- AlGaAs layer 2 selectively grown by GSMBE using the GaAs oxide film 25 as a mask.
6. Observation of the i-GaAs layer 27 showed that no edge effect or insulating film / semiconductor layer area ratio effect occurred. next,
Using only the shutter of the molecular beam source nozzle 9d for introducing arsine and heating the substrate temperature to 600 ° C. or higher, the mask is used as shown in FIG. 5 (b) and step S ₄ in FIG. The GaAs oxide film 25 that had been removed is removed.

Next, as shown in step S _{5 of} FIG.
Enter the second in-situ lithography process. First, the GaAs substrate 25 is again introduced into the electron beam irradiation chamber 7. In the electron beam irradiation chamber 7, while irradiating O ₂ gas instead of Cl ₂ gas described above, an electron beam is drawn only on the upper surface of the selectively grown i-GaAs layer 27, and a GaAs oxide film 28 is formed on the surface. To form.

Subsequently, the GaAs substrate 21 is again introduced into the crystal growth chamber 5a of the GSMBE apparatus 5, and radical hydrogen is irradiated therein to the GaAs oxide film 28 and the i-GaAs layer 24 to clean the i-GaAs layer 24. and, terminating (terminate) with hydrogen GaAs oxide film 28 surface (Fig. 3 step S _52). next,
In the same GSMBE apparatus 5, the shutters of the molecular beam source nozzles 9a, 9d and 9e for introducing TEG, arsine and disilane are opened, and as shown in FIG.
N ⁺ -GaAs layer 2 only in ohmic region with mask 8
9 is selectively grown (step S _{6 in} FIG. 3). The concentration of silicon contained in the n ⁺ -GaAs layer 29 is set to 2 × 10 ¹⁸ cm ^-3, and its thickness is set to be almost the same as that of the GaAs oxide film 28.

After this, the GaAs oxide film 28 used as the mask is removed in the same manner as the GaAs oxide film 25 of the first layer. Next, the GaAs substrate 21 is taken out from the GSMBE device 5 through the vacuum chamber 4a, the sample exchange chamber 3, and the load lock chamber 2 to the outside. Then, as shown in FIG. 5D, the i-GaAs layer 27 in the first selective growth layer portion is patterned to form an opening, and the embedded gate electrode 30 is formed in the opening, and the second selection is performed. By forming the source electrode 31 and the drain electrode 32 on the upper surface of the n ⁺ -GaAs layer 29 in the growth layer portion, the power FET is completed (step S _{7 in} FIG. 3).

In the FET structure thus manufactured, the source,
Since the ohmic contact resistance of the drain electrode portion is reduced, good FET characteristics are realized. By the way, since the surface of the semiconductor layer is cleaned by using hydrogen radical particles before the selective growth of the compound semiconductor in the above steps, a high-quality epitaxial layer having a very small sea level on the single crystal plane is thereby obtained. Grows.

Further, since the dangling bonds on the GaAs oxide films (insulating films) 25 and 28 are terminated by the hydrogen radicals, the decomposition reaction of the molecular beam source material on the surfaces of the insulating films 25 and 28 is suppressed. To be done. In this case, the hydrogen radical Ga
The etching rate for As and AlGaAs is extremely small,
It is not necessary to precisely control the hydrogen radicals. As a result, the GaAs layer 24 not covered with the GaAs insulating films 25, 28,
Since the film thickness of 27 is formed with good controllability, variations in device characteristics are eliminated.

The radical particles themselves are very active, and have the property of colliding with other particles or substances to exchange electrons and become stable neutral particles. Therefore, when the radical particles approach the dangling bonds on the insulating film, they share electrons of the dangling bonds or absorb the electrons and are neutralized. On the surface of the insulating film where the dangling bonds are terminated, organometallic molecules will no longer flow, and even if they approach, the molecules will not be supplied with the electrons necessary for decomposition, so the molecules will decompose as they are. Without re-desorption. On the other hand, on the surface of the single crystal substrate, the organometallic molecules that arrive due to the existence of free electrons are decomposed, only the metal atoms contribute to the growth, and the organic groups are re-evaporated and desorbed, whereby crystal growth is performed. .

Therefore, by supplying the organometallic material onto the single crystal substrate patterned with the insulating film while intermittently irradiating the radical particles, nothing is deposited on the insulating film and the single crystal surface is formed. A single crystal can be grown at a growth rate according to the strength of the organometallic material supplied only above. Also, using the GaAs oxide films 25 and 28 as a mask, GaAs or AlGaAs
When GaAs is selectively grown, an edge effect does not occur in those GaAs and AlGaAs, and the film thickness does not depend on the area of the mask, and the GaAs layer that becomes the channel region is formed flat. As a result, the carrier travelability of the FET is improved, and good transistor characteristics are obtained.

(Second Embodiment) This embodiment describes a method of manufacturing a semiconductor laser having a DH structure by making full use of the selective growth technique of the present invention on an InP substrate. The manufacturing process of the semiconductor laser will be described below with reference to the sectional views shown in FIGS.

An n-InP substrate (wafer) having a (100) plane is used as a compound semiconductor substrate on which a semiconductor laser is formed. First, the GaAs substrate 21 is transferred into the GSMBE apparatus 5 through the load lock chamber 2 and the sample exchange chamber 3 shown in FIG. Then, the n-InP substrate 41 is mounted on the wafer support 5b in the crystal growth chamber 5a of the GSMBE apparatus 5.

Triethylgallium (TEG: Ga (C ₂ H ₅ ) ₃ ) and triethylindium (TE) are used as gas source materials for epitaxial growth introduced into the crystal growth chamber 5a.
I: In (C ₂ H ₅ ) ₃ ) as the first and second molecular beam source nozzles 9a,
It is introduced into the crystal growth chamber 5a through 9b, and arsine (As
H ₃₎ and phosphine (PH ₃₎ a thermal decomposition cell 10a, 10c
It is introduced into the crystal growth chamber 5a through the attached fourth and sixth molecular beam source cells 9d and 9f. Further, disilane (Si ₂ H ₆ ) as an n-type dopant is introduced into the crystal growth chamber 5a through the fifth molecular beam source cell 9e with the thermal decomposition cell 10b, and dimethyl zinc (DMZ: Zn (DMZ: Zn (d C
H ₃ ) ₂ ) is passed through the third molecular beam source cell 9c and the crystal growth chamber 5
Introduced into a.

The flow rates of these gas sources are independently adjusted by a mass flow controller (not shown),
Irradiation is performed toward the n-InP substrate 41 in the crystal growth chamber 5a. However, arsine gas and phosphine are decomposed in a pyrolysis cell at high temperature (900 ° C) and then As
_The surface of the substrate is irradiated with ₂ and H ₂ . Similarly, disilane gas is decomposed into Si and H ₂ by the thermal decomposition cell and irradiated on the substrate surface.

Then, the n-InP substrate 41 is placed in the crystal growth chamber 5a.
After the introduction, the shutter of the molecular beam source nozzle is opened and closed in the following order to form a compound semiconductor layer as shown in FIG. 6 (a). First, after introducing the n-InP substrate 41 into the crystal growth chamber 5a, the substrate temperature is heated to about 530 ° C. or higher while irradiating the surface of the n-InP substrate with arsenic (As), and the n-InP substrate 4 is heated.
After removing the natural oxide film on the first surface, the substrate temperature is lowered to the growth temperature of 480 ° C. and kept at this temperature. Then TE
The n-InP growth is started by opening the shutters of the molecular beam source nozzles 9b, 9f, 9e for introducing I, phosphine, and disilane, and the n-InP layer 42 is formed on the n-InP substrate 41 by about 300 nm.
0Å grow.

After that, after closing the shutters of the molecular beam source nozzles 9b, 9f and 9e of TEI, phosphine and disilane, the molecular beam source nozzle 9d of arsine and the molecular beam source nozzle 9b of TEA are opened to form several atomic layers. The GaAs layer 43 is grown. Subsequently, the shutters of the molecular beam source nozzles other than the molecular beam source nozzle 9d for introducing arsine are closed, and then the substrate temperature is gradually lowered. The molecular beam source shutter for arsine is closed when the substrate temperature becomes 300 ° C. or lower. This completes the first growth of the compound semiconductor layer.

Next, the n-InP substrate 41 is attached to the GSMBE device 5
From the vacuum tunnel 4a, 4b, sample exchange chamber 3
It is carried into the photo-oxidized film forming chamber 6 through. And FIG.
As shown in (b), the inside of the photo-oxide film forming chamber 6 is set to several Torr to several tens.
An oxygen atmosphere with a pressure in the Torr range is set, and the surface of the GaAs layer 43 of several atoms on the n-InP substrate 41 is irradiated with light to be oxidized to form a GaAs oxide film 44. In this case, a xenon lamp is used as the light source.

Next, the n-InP substrate 41 is placed in the photo-oxide film forming chamber 6
From the vacuum tunnel 4b, 4c, sample exchange chamber 3
Through the electron beam irradiation chamber 7. In the electron beam irradiation chamber 7, chlorine (Cl ₂ ) gas is supplied as shown in FIG. 6 (c).
While irradiating toward the n-InP substrate 41, an electron beam is irradiated onto the GaAs oxide film 44 in the semiconductor laser waveguide region. The GaAs oxide film 44 irradiated with the electron beam is removed, and n-
The upper surface of the InP layer 41 is exposed.

Next, the n-InP substrate 41 is taken out from the electron beam irradiation chamber 7, and the vacuum tunnels 4c and 4a and the sample exchange chamber 3 are taken out.
And is again introduced into the GSMBE apparatus 5. GSMB
In the crystal growth chamber 5a of the E apparatus 5, first, as shown in FIG. 6 (d), the hydrogen radicals taken out from the ECR plasma generation source 11 are transferred to the n-InP layer 42 and the GaAs oxide film 44 on the n-InP substrate 41. To irradiate.

At this time, the growth chamber is set at the level of 10 ⁻⁴ Torr, and the flow rate of hydrogen introduced into the ECR plasma generation source 11 is 2
It was sccm. In this manner, the dangling bonds on the surface of the GaAs oxide film 44 are terminated with hydrogen and the surface of the single crystal n-InP layer 42 is cleaned. Since the hydrogen radicals do not deeply etch the surface of the n-InP layer 42, it is not necessary to precisely control the amount of hydrogen radicals introduced.

Next, after stopping the hydrogen radical irradiation, a second crystal growth is performed to form a layer structure as shown in FIG. 7 (a). First, the substrate temperature is increased to 5 while irradiating the n-InP substrate 41 with arsine from the fourth molecular beam source nozzle 9d.
The temperature is raised to 50 ° C. and maintained at this temperature. Then TE
Molecular beam source nozzle 9 for introducing I, phosphine and disilane
The shutters b, 9e and 9f are simultaneously opened to grow the n-InP clad layer 45 on the n-InP layer 42 not covered with the GaAs oxide film 44 to a thickness of 5000Å. The impurity concentration of silicon in the n-InP clad layer 45 is set to 5 × 10 ¹⁷ cm ⁻³ .

Thereafter, the shutters of the molecular beam source nozzles 9e and 9f for introducing disilane and phosphine are closed, and then the molecular beam source nozzles 9a and 9d for introducing TEG and arsine are opened to open the n-InP clad. An InGaAs active layer 46 is grown on the layer 45 to a thickness of 20Å. After growing the InGaAs active layer 46, the shutters of the molecular beam source nozzles 9a and 9d for TEG and arsine are closed.

Subsequently, the shutters of the electron beam source nozzles 9c and 9f for introducing DMZ and phosphine are opened to p-In.
The P clad layer 47 is grown to a thickness of 5000Å. The p-type impurity concentration at this time is 5 × 10 ¹⁷ cm ⁻³ . Further, the shutter of the electron beam source nozzle 9f for phosphine is closed, and TE
The shutters of the electron beam source nozzles 9a and 9d for G and arsine are opened to form the p-InGaAs cap layer 48. As described above, the n-InP clad layer 45, the InGaAs active layer 46, the p-InP clad layer 47, and the p-InGaAs cap layer 4 selectively grown along the waveguide region using the GaAs oxide film 44 as a mask.
8 has no edge effect or insulating film / semiconductor layer area ratio effect.

Next, a molecular beam source nozzle 9 for introducing arsine
d Keep the shutter open and set the substrate temperature to 60
By heating at 0 ° C. or higher, the GaAs oxide film 44 used as the mask is removed as shown in FIG. 7 (b).
Then, the n-InP substrate 41 is again introduced into the electron beam irradiation chamber 7 in order to form an oxide film on the uppermost surface of the selectively grown p-InGaAs cap layer 48. In the electron beam irradiation room 7,
An InGaAs oxide film 49 is formed on the surface of the selectively grown p-InGaAs cap layer 48 by drawing an electron beam only while irradiating O ₂ gas instead of the Cl ₂ gas.

Next, the n-InP substrate 41 is again introduced into the growth chamber 5a of the GSMBE apparatus 5, and radical hydrogen is introduced into the growth chamber 5a.
Irradiate the GaAs oxide film 49 and the n-InP layer 42. As a result, the n-InP layer 42 on both sides of the waveguide region is cleaned, and the dangling bonds on the surface of the InGaAs oxide film 49 are terminated by hydrogen. After that, the electron beam source shutter of TEI and phosphine is opened, and i-InP is grown only on the n-InP layer 42 on both sides of the n-InP cladding layer 45, whereby the p-InGaAs cap layer 48 is almost the same. An i-InP high resistance current confinement layer 50 having a height is formed. The edge effect does not occur in this growth step, and the i-InP high resistance current confinement layer 50 is formed flat.

After that, the shutters of the electron beam source nozzles 9b and 9f for TEI and phosphine are closed, and the InGaAs oxide film 49 used as the mask is heated to 600 ° C. in an arsine atmosphere to be removed. Subsequently, the electron beam source nozzles 9b, 9c, 9f of TEI, DMZ and phosphine are opened to open them.
p-InGaAs cap layer 48 and i-InP high resistance current confinement layer 50
A p ⁺ -InP layer 51 as shown in FIG. 7 (d) is formed on top of this with a thickness of 3000 Å.

Next, the n-InP substrate 41 is attached to the GSMBE device 5
Through the vacuum chamber 4a, the sample exchange chamber 3, and the load lock chamber 2 to the outside. After that, the n electrode 52 is formed on the lower surface of the n-InP substrate 41, and the p electrode 53 is formed on the p ⁺ -InP layer 51, whereby the DH type semiconductor laser is completed. In the semiconductor laser thus manufactured, the n-InP clad layer 45, the InGaAs active layer 46, and the p-clad layer 47 are formed flat, so that the InGaAs active layer 46 does not bend and the optical confinement does not deteriorate. Moreover, since the interface states generated on the side surfaces of the selectively grown InGaAs active layer 46 and the InP clad layers 45 and 47 are almost negligible, the leak current does not increase, and thus the threshold current is small and the luminous efficiency is large. The characteristics are obtained.

On the other hand, the steps that have been already used are, as shown in FIG. 8A, n-InP on the n-InP substrate 61.
After forming the P clad layer 62, the InGaAs active layer 63, the p-InP clad layer 64 and the p-InGaAs cap layer 65, the Si
An O ₂ mask 66 is formed along the waveguide region, and the p-InGaAs cap layer 65 to the n-InP cladding layer 62 on both sides of the SiO ₂ mask 66 are removed by etching. After that, as shown in FIG. 8 (b), a current confinement layer (or pnp buried layer) 67 is formed on both sides of the waveguide region.
As shown in (c), ap ⁺ -InP contact layer 68 is formed.

According to such a conventional manufacturing process, the active layer 6 is formed by etching during patterning of the semiconductor layer.
A light emission center is formed on the side surface of No. 4 and the side surfaces of the clad layers 63 and 65, which reduces the light emission efficiency and increases the leak current. As a result, there is a problem that the threshold current increases and the characteristics deteriorate. The leakage current is shown in Fig. 8 (c).
As indicated by the broken line, the current flows from the p-InP clad layer 65 to the buried layers (or current confinement layers) 67 on both sides thereof.

Further, in this embodiment, when InP or InGaAs is selectively grown, the etching rate of InGaAs or InP due to hydrogen radicals is extremely small, so that the thickness of the compound semiconductor layers can be accurately controlled. Also, GaAs
Nothing is deposited on the insulating film by supplying the organometallic material while intermittently irradiating radical particles onto the patterned single crystal layer using the oxide film or InGaAs oxide film as a mask. Instead, the single crystal grows flat at a growth rate according to the strength of the organometallic material supplied only on the single crystal plane. These facilitate control of the film thickness of the device and make the device characteristics uniform.

(Other Embodiments) In the first embodiment, the power FE is used for the selective growth of the compound semiconductor using radical particles.
However, the feature of the present invention is most suitable for the production of a quantization functional element which brings out the quantum effect and the properties of an electron wave by combining with the technique of forming a fine pattern using the EB drawing technique.

In the first and second embodiments, the gas source MBE method is used as the crystal growth technique, but as another example, the MOVPE method in which the growth is performed in a vacuum container is also possible. Further, the semiconductor growth chamber does not need to limit the structure of the device as long as the substrate can be transferred to another processing chamber through the vacuum tunnel. However, the growth source material must be an organometallic compound.

The radical particles may be generated not only by the ECR plasma described above but also by RF plasma, collision of thermoelectrons, or the like. In a vacuum with a large mean free path, the radical particles thus generated are beamed. The growth substrate can be taken out and irradiated on the growth substrate. Further, the radical particles may be simultaneously irradiated during the selective growth of the compound semiconductor such as GaAs, InGaAs, AlGaAs, or the growth of the compound semiconductor and the irradiation of the radical particles may be alternately performed.

As the radical particles, there are argon radicals, nitrogen radicals and the like in addition to hydrogen radicals, but chlorine and fluorine, which are etching gases for compound semiconductors, are not included.

[0074]

As described above, according to the present invention, before or simultaneously with the introduction of the source gas for growing the compound semiconductor on the first compound semiconductor layer not covered with the insulating mask. Alternatively, since the first compound semiconductor layer and the insulating mask are intermittently irradiated with radical particles that do not serve as an etchant of the compound semiconductor, it is possible to almost etch the first and second compound semiconductor layers. It is possible to terminate the dangling bond on the insulating mask without having to do so and suppress the decomposition reaction of the molecular beam source material on the surface of the insulating film. Moreover, by the gas source molecular beam epitaxial growth, the selectively grown compound semiconductor layer can be formed flat.

In particular, the effect is great for the selective growth of an epitaxial film containing an active constituent element such as Al.

[Brief description of drawings]

FIG. 1 is a plan view showing an outline of a compound semiconductor epitaxial selective growth apparatus according to an embodiment of the present invention.

FIG. 2 is a cross-sectional view showing a crystal growth chamber of a compound semiconductor epitaxial growth apparatus according to an embodiment of the present invention and a radical particle generation source mounted inside the crystal growth chamber.

FIG. 3 is a flowchart showing manufacturing steps of the electronic device of the first embodiment of the present invention.

FIG. 4 is a cross-sectional view (No. 1) showing the manufacturing process of the electronic device according to the first example of the invention.

FIG. 5 is a cross-sectional view (2) showing the manufacturing process of the electronic device according to the first example of the invention.

FIG. 6 is a sectional view (1) showing a process for manufacturing a semiconductor laser according to a second embodiment of the present invention.

FIG. 7 is a cross-sectional view (No. 2) showing the manufacturing process of the semiconductor laser according to the second embodiment of the present invention.

FIG. 8 is a cross-sectional view showing a typical manufacturing process of a conventional semiconductor laser.

[Explanation of symbols]

21 GaAs substrate 22 i-GaAs layer 23 i-AlGaAs layer 24 n-GaAs layer 25 GaAs oxide films (insulating mask) 26 n ^- - AlGaAs layer 27 i-GaAs layer 28 GaAs oxide films (insulating mask) 29 n ⁺ -GaAs layer 41 n-InP substrate 42 n-InP layer 43 GaAs layer 44 GaAs oxide film (insulating mask) 45 n-InP clad layer 46 InGaAs active layer 47 p-InP clad layer 48 p-InGaAs cap layer 49 InGaAs oxide Membrane (insulating mask) 50 InP layer

Claims (14)

[Claims] 1. A step of forming an insulating mask (25, 44) on a first compound semiconductor layer (24, 42), a surface of the insulating mask (25, 44) and the first compound. A step of irradiating the surface of the semiconductor layer (24, 42) with radical particles that are not an etchant of the first compound semiconductor layer (24, 42); and the first compound semiconductor layer irradiated with the radical particle ( 24, 42) is supplied with a source gas of a compound semiconductor, and the source gas is supplied onto the first compound semiconductor layer (24, 42) in a region not covered with the insulating mask (25, 44). A method for epitaxially growing a compound semiconductor, comprising the step of supplying and selectively epitaxially growing a second compound semiconductor layer (26, 45). 2. A step of forming an insulating mask (25, 44) on the first compound semiconductor layer (24, 42), the first compound semiconductor layer (24, 42) and the insulating mask. The surface of the compound (25, 44) is simultaneously irradiated with the source gas of the compound semiconductor and the radical particles which are not the etchant of the first compound semiconductor layer (24, 42) and covered with the insulating mask (25, 44). A step of supplying a source gas onto the first compound semiconductor layer (24, 42) in an unexposed region to selectively epitaxially grow the second compound semiconductor layer (26, 45). Compound semiconductor epitaxial growth method. 3. A step of forming an insulating mask (25, 44) on a first compound semiconductor layer (24, 42), a surface of the insulating mask (25, 44) and the first compound. The surface of the semiconductor layer (24, 42) is alternately irradiated with radical particles that do not function as an etchant of the first compound semiconductor layer (24, 42) and an organometallic compound source, and the insulating mask (25, 44). ), The step of supplying a source gas onto the first compound semiconductor layer (24, 42) not covered with the second compound semiconductor layer (25, 44) to selectively epitaxially grow the second compound semiconductor layer (25, 44). Compound semiconductor epitaxial growth method. 4. A molecular beam source (9a to 9f) for irradiating a substrate with a source gas for growing a compound semiconductor, and a radical particle generation source (11) for emitting radical particles that do not function as an etchant for a compound semiconductor layer. ) And a compound semiconductor epitaxial growth apparatus. 5. A step of forming a first insulating mask (25, 44) on the first compound semiconductor layer (24, 42), and a surface of the first compound semiconductor layer (24, 42). And irradiating the surface of the first insulating mask (25, 44) with radical particles that are not an etchant of the first compound semiconductor layer (24, 42), and the first insulating mask (25 , 44) and the second compound semiconductor layer (26, 27, 45, 48) is selectively supplied by supplying a gas source onto the first compound semiconductor layer (24, 42).
And a step of removing the first insulating mask (25, 44), a method of manufacturing a semiconductor device. 6. The second compound semiconductor layer (26, 27, 45,
The method of manufacturing a semiconductor device according to claim 5, wherein the step (48) is grown by irradiating a source gas and radical particles. 7. A second insulating mask which selectively covers the upper surface of the second compound semiconductor layer (26, 27, 45, 48) after removing the first insulating mask (25, 44). (28, 49), the first compound semiconductor layer (24, 42) on the surface of the second insulating mask (28, 49) and the surface of the first compound semiconductor layer (24, 42). 24, 42) of irradiating radical particles that do not function as an etchant, and the third compound is applied to the first compound semiconductor layer (24, 42) not covered by the second insulating mask (28, 49). The method for manufacturing a semiconductor device according to claim 5, further comprising a step of epitaxially growing a semiconductor layer (29, 50) and a step of removing the second insulating mask (28, 49). 8. The second compound semiconductor (26, 27, 45,
48), at least one of the third compound semiconductor layers (29, 50) is grown while irradiating radical particles that do not function as an etchant of the compound semiconductor with the source gas of the compound semiconductor. Or 7
A method for manufacturing a semiconductor device as described above. 9. The second compound semiconductor (26, 27, 45,
48), at least one of the third compound semiconductor layers (29, 50) is grown by alternately supplying a source gas of the compound semiconductor and radical particles that do not function as an etchant of the compound semiconductor. 8. The method for manufacturing a semiconductor device according to claim 5, wherein. 10. At least one of the first insulating mask (25, 44) and the second insulating mask (28, 49)
8. The method of manufacturing a semiconductor device according to claim 5, wherein the semiconductor device is composed of an oxide film formed by light irradiation in an oxygen atmosphere. 11. At least one of the first insulating mask (25, 44) and the second insulating mask (28, 49) comprises:
8. The method for manufacturing a semiconductor device according to claim 5, wherein the insulating film is patterned by drawing an electron beam in an etching molecular gas atmosphere. 12. At least one of the first insulating mask (25, 44) and the second insulating mask (28, 49) comprises:
It is formed by drawing an electron beam on the first compound semiconductor layer (24, 42) or the second compound semiconductor layer (26, 27, 45, 48) in an oxygen atmosphere. A method of manufacturing a semiconductor device according to claim 5 or 7. 13. At least one of the first insulating mask (25, 44) and the second insulating mask (28, 49) comprises:
8. The method for manufacturing a semiconductor device according to claim 5, wherein the semiconductor device is removed by heating in an As atmosphere. 14. The compound semiconductor epitaxial growth method according to claim 1, 2 or 3, wherein the radical particles are hydrogen radicals, argon radicals or nitrogen radicals, or the compound semiconductor epitaxial growth apparatus according to claim 4. A method of manufacturing a semiconductor device according to claim 5 or 7.