JP3260617B2 - Switching power supply drive circuit - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

The present invention relates to a driving circuit for a switching power supply, and more particularly to a driving circuit for a switching power supply using an FET as a switching element.

[0002]

Conventionally, the drive circuit of such switching power supply are those shown in FIG. 3, for example. Figure 3 is Hei 1
-170114: This is described in a field effect transistor drive circuit.

The drive circuit 20 receives a power supply 12, and has an input capacitor 13, a switching FET 3, a transformer 4, a rectifier diode 5, a fly-hole diode 6, a choke coil 7 and a capacitor 8 for smoothing, and a control for stabilizing an output voltage. It is used for a forward type switching power supply composed of the circuit 10.

The drive circuit 20 includes a transistor 201, which is turned on / off by an output signal of the control circuit 10, and a primary winding N.
a transformer 202 which outputs one end of p and the other end via the transistor 201 to the drive circuit power supply 11 and outputs a voltage generated in the primary winding Np to the secondary windings Ns2 and Ns3 as a drive pulse in accordance with the turns ratio; The diode 203 for transmitting the ON-cycle drive pulse generated in the secondary winding Ns2 to the switching FET 3, and the gate and source of the switching FET 3 are short-circuited during the OFF-cycle of the drive pulse to discharge the accumulated charge during this period and forcibly switch the switching FET 3. , A Zener diode 205 for clamping a voltage generated at both ends of the secondary winding Ns3,
206.

The operation of this switching FET drive circuit is as follows. The output signal from the control circuit 10 is converted into a drive pulse of a predetermined voltage by the transistor 201 and the transformer 202, and is applied from the secondary winding Ns2 of the transformer 202 to the gate and source of the switching FET 3 via the diode 203. At the time of the ON cycle in which the transistor 201 is turned on, the secondary winding Ns of the transformer 202
2, Ns3 generates a positive voltage, the FET 204 is turned off, the diode 203 is turned on, and the switching FET is turned on.
3 turns on. In the off cycle where the transistor 201 is turned off, a flyback voltage in the reverse direction is generated in the secondary windings Ns2 and Ns3, and the FET 204 is turned on to short-circuit the gate and source of the switching FET3. As a result, the accumulated charge between the gate and the source is released, and the switching FET is turned off.

The Zener diode 205 has a secondary winding Ns
2, limit the flyback voltage generated in Ns3 and FET
204 is clamped to a predetermined voltage by preventing an overvoltage from being applied. The Zener diode 206 also clamps the drive pulse voltage during the ON cycle to a predetermined value.

[0007]

As described above, in the conventional driving circuit for a switching power supply, the flyback voltage generated during the off cycle of the driving transformer is clamped by using a Zener diode. Occurs. In addition, there is a problem that the high-frequency impedance of the Zener diode affects the conversion efficiency of the entire switching power supply because the falling characteristic of the driving pulse has a slope and the switching loss of the switching FET increases.

[0008]

According to the present invention, there is provided a driving circuit for a switching power supply, which receives a pulse signal output from a control circuit for stabilizing an output voltage and outputs a driving pulse for driving a main switching FET. A first transistor for applying the pulse signal to a base, grounding an emitter and performing on / off operation in accordance with the pulse signal; a first power supply having a winding start end of a primary winding and a first power supply having the other end connected to the first transistor; A transformer having secondary windings respectively connected to the collector, a clamping capacitor having one end connected to a winding start end of the primary winding of the transformer, and a first transistor which adds the pulse signal to a base and adds an emitter to the first transistor And a collector for clamp discharge, which is connected to the other end of the capacitor and turns on and off alternately with the first transistor. And second transistor, the emitter and collector of said second transistor cathode - a first diode for clamping charging connected in parallel with the collector side de, anode - de the secondary winding of the transformer A second diode having a cathode connected to the gate of the main switching FET at the beginning of winding and a cathode connected to the other end of the secondary winding of the transformer and an anode connected to the source of the main switching FET, respectively. a third diode connected, the gate third diode cathode - the third diode source to de Ano - and accumulated charge discharge FET for the switching FET connected respectively to de, the one end FET A first resistor having the other end connected to the anode of the second diode, and a first end connected to the drain of the FET and the other end connected to the drain of the FET, respectively. And a second resistor connected respectively to the cathode of the diode.

The secondary winding of the transformer and the second
The drive pulse output circuit composed of a diode and the FET includes a transformer having the secondary winding as one winding, and an anode having a cathode at a winding start end of the secondary winding of the transformer. A second diode and an anode respectively connected to the gate of the main switching FET are connected to the other end of the secondary winding of the transformer, and the cathode is connected to the main switching FET.
A third diode respectively connected to the source of ET;
FE having a gate connected to the anode of the third diode and a source connected to the cathode of the third diode, respectively.
T and a first resistor having one end connected to the gate of the FET and the other end connected to the anode of the second diode, respectively.
A second resistor having one end connected to the drain of the FET and the other end connected to the cathode of the second diode may be used.

Further, each of the first and second transistors may be replaced with an FET.

[0011]

Next, embodiments of the present invention will be described with reference to the drawings. FIG. 1 is a circuit diagram showing an embodiment.

In FIG. 1, a drive circuit 2 receives a power supply 12 as an input, an input capacitor 13, and a switching FET.
3, a transformer 4, a rectifying diode 5, a flyhole diode 6, a smoothing choke coil 7 and a capacitor 8, and a control circuit 10 for stabilizing the output voltage. .

[0013] The driving circuit 2, the control transistor 2 1 operates on and off by the output signal from the circuit 10, transistor <br/> motor 2 1 relays the output pulse transformer 2 8 for outputting a drive pulse transformer Add a driving pulse on cycle of the output of the 2 8 switching FET3 diode 2 9, 34 and turned on by the drive pulse off cycle that the output of the resistor 30 and 32 and the transformer 2 8 between the gate and source of the switching FET3 through a resistor 31 short-circuited, this FET 33 turns off, the transformer 2 8 capacitors 2 7 for absorbing the flyback current which is generated when the off-cycle operation, for flowing the flyback current to the capacitor 2 7 diode 2 6, capacitor
Transistor 2 5 for discharging the 2 7, the control circuit 1
Transformer 23 for adding the output signal from the 0 is inverted to the transistor 2 5, and a reversing circuit of a capacitor 22 and 24.

[0014] Next, FIG. 1, the operation of this circuit will be described with reference to FIG. FIG. 2 is a waveform chart showing the waveform of the operation of each unit in FIG. Output signal VCL of control circuit 10
Is a pulse signal shown. This output signal VCL is applied to the transistor 2 1, transistor 2 1 operates on and off, its collector-emitter voltage VDSP
Has the waveforms shown . That voltage during off cycle is clamped flyback voltage of the transformer 2 8 and applied approximately 2Vi to Vi of the drive circuit power supply voltage.

[0015] The transformer 2 is a transistor 2 1 of the load
A drive pulse of the illustrated voltage VNS is generated in the two secondary windings 8. During the ON cycle of VNS, FET 33
Is off, the diodes 29 and 34 are on, and a positive drive pulse is applied to the switching FET 3 to turn it on. During the off cycle of VNS, the FET 33 is turned on, the gate and source of the switching FET 3 are short-circuited via the resistor 31, and the charge accumulated during this operation is released to turn off. At this time, the voltages between the gate and source of the switching FET 3 and the FET 33 have waveforms of Vg1 and Vg2, respectively.

The above flyback voltage generated in the transformer 2 8 during off cycle of the switching operation are clamped by the capacitor 2 7. That flyback current generated during off cycle the capacitor 2 7 connected to the primary winding of the transformer 2 8 flows through the diode 26. It also was discharged by the transistor 2 5 operates, and regenerating the driving circuit power supply side. The clamp voltage is set substantially equal to the drive circuit power supply voltage Vi.
Note that flows into the condenser 2 7, current ic flowing are shown in <br/> waveform.

The resistors 30, 31, and 32 are used in a drive circuit.
The insertion improves the waveform at the time of switching, thereby reducing switching loss.

The implementation of embodiments that further above described two positions of the transistors are used but, FET them respectively
May be substituted.

[0019]

As described above, the drive circuit for a switching power supply according to the present invention absorbs flyback generated in the drive transformer by the capacitor on the primary side of the drive transformer, discharges the flyback to the power supply side, and discharges the flyback voltage. , The flyback power loss does not occur, the waveform at the time of the fall of the drive pulse is improved, and the switching F
This has the effect of improving the conversion efficiency of the switching power supply, for example, by reducing the loss of ET.

[Brief description of the drawings]

FIG. 1 is a circuit diagram showing an embodiment of the present invention.

FIG. 2 is a waveform chart showing operation waveforms of respective units in FIG.

FIG. 3 is a circuit diagram showing a conventional example.

[EXPLANATION OF SYMBOLS] 2,20 drive circuit 3 switching FET 4 trans 5,6 diode 7 a choke coil 8 capacitor 9 resistor 10 control circuit 11 drive circuit power source 12 a DC power source 21, 25 transistors 13,22,24,27 capacitor 26, 29, 34 diode 3 3 FET 2 3,28 transformers 30, 31, 32 resistor

Claims (1)

(57) [Claims] 1. A driving circuit which receives a pulse signal output from a control circuit for stabilizing an output voltage and outputs a driving pulse for driving a main switching FET. A first transistor that performs an on / off operation in accordance with the following, a transformer having a secondary winding having the winding start end of the primary winding connected to the positive power supply and the other end connected to the collector of the first transistor, A clamping capacitor having one end connected to a winding start end of a primary winding of the transformer, an emitter connected to the collector of the first transistor, and a collector connected to the other end of the capacitor, in addition to the pulse signal; A second transistor for clamp discharge that alternately turns on and off with the first transistor, and an emitter of the second transistor A cathode between the collector - and de the clamp charging connected in parallel with the collector side the first diode, anode - cathode a de to the winding starting end of the transformer secondary windings - the main switching FET to de A second diode and a cathode respectively connected to the gate of the main switching F are connected to the other end of the secondary winding of the transformer.
A third diode respectively connected to the source of ET;
The gate is connected to the cathode of the third diode, and the source is connected to the anode of the third diode.
A switching charge storage FET, a first resistor having one end connected to the gate of the FET and the other end connected to the anode of the second diode, and one end connected to the drain of the FET and the other end connected to the drain of the FET. And a second resistor respectively connected to the cathodes of the two diodes.