JP3256951B2 - Light emitting diode - Google Patents
Light emitting diodeInfo
- Publication number
- JP3256951B2 JP3256951B2 JP29114795A JP29114795A JP3256951B2 JP 3256951 B2 JP3256951 B2 JP 3256951B2 JP 29114795 A JP29114795 A JP 29114795A JP 29114795 A JP29114795 A JP 29114795A JP 3256951 B2 JP3256951 B2 JP 3256951B2
- Authority
- JP
- Japan
- Prior art keywords
- light emitting
- substrate
- emitting chip
- light
- wiring pattern
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/42—Wire connectors; Manufacturing methods related thereto
- H01L24/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
- H01L24/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
- H01L2224/321—Disposition
- H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/32225—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
- H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
- H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
- H01L2224/45001—Core members of the connector
- H01L2224/45099—Material
- H01L2224/451—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
- H01L2224/45138—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
- H01L2224/45144—Gold (Au) as principal constituent
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73251—Location after the connecting process on different surfaces
- H01L2224/73265—Layer and wire connectors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
- H01L2224/8338—Bonding interfaces outside the semiconductor or solid-state body
- H01L2224/83385—Shape, e.g. interlocking features
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01047—Silver [Ag]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/12—Passive devices, e.g. 2 terminal devices
- H01L2924/1204—Optical Diode
- H01L2924/12041—LED
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/181—Encapsulation
Landscapes
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Led Device Packages (AREA)
Description
【０００１】[0001]
【産業上の利用分野】本発明は、基板上に発光チップを
実装した発光ダイオードに関するものである。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a light emitting diode having a light emitting chip mounted on a substrate.
【０００２】[0002]
【従来の技術】従来の発光ダイオードは、一般に図４に
示すような構造をとる。すなわち、ガラスエポキシ樹脂
等の基板３１表面に配線パターン３２を形成し、次にそ
の配線パターン３２上に発光チップ３３を接着剤３４を
介してダイボンドした後、金線等のボンディングワイヤ
３５により、発光チップ３３と配線パターン３２とを電
気的に接続し、最後に発光チップ３３周辺を透光性の樹
脂３６でモールドすることにより構成されている。2. Description of the Related Art A conventional light emitting diode generally has a structure as shown in FIG. That is, a wiring pattern 32 is formed on the surface of a substrate 31 made of glass epoxy resin or the like, and then a light emitting chip 33 is die-bonded on the wiring pattern 32 via an adhesive 34, and then the light emitting chip 33 is bonded by a bonding wire 35 such as a gold wire. The chip 33 and the wiring pattern 32 are electrically connected, and finally, the periphery of the light emitting chip 33 is molded with a translucent resin 36.
【０００３】前記配線パターン３２としては、一般に金
属の下地層上に金または銀等の貴金属のメッキが施され
たものが用いられる。しかしながら、このような貴金属
のメッキは接着力が弱く、上記に示すような従来の発光
ダイオードでは、前記メッキが基板３１から剥離し易い
ため、配線パターン３２上にダイボンドされた発光チッ
プ３３の固定が損なわれるという問題があった。As the wiring pattern 32, generally, a metal base layer plated with a noble metal such as gold or silver is used. However, such a noble metal plating has a weak adhesive force, and in the conventional light emitting diode as described above, since the plating is easily peeled off from the substrate 31, it is difficult to fix the light emitting chip 33 die-bonded on the wiring pattern 32. There was a problem of being damaged.
【０００４】また、上記配線パターンは発光チップから
の発光を発光観測面側へ反射するための反射層としての
役目も兼ねているため、発光チップを配線パターンが施
されていない基板上にダイボンドすると、発光チップ直
下の反射面が無くなるので、発光チップからの発光の外
部への取出効率が低下し、発光出力の低下を招くという
問題がある。Further, since the above wiring pattern also serves as a reflection layer for reflecting light emitted from the light emitting chip toward the light emission observation surface side, if the light emitting chip is die-bonded to a substrate on which no wiring pattern is provided. In addition, since there is no reflective surface immediately below the light emitting chip, there is a problem that the efficiency of extracting light emitted from the light emitting chip to the outside is reduced, and the light emission output is reduced.
【０００５】[0005]
【発明が解決しようとする課題】従って、本発明は上記
問題を解決するために成されたものであり、その目的と
するところは、発光チップの基板への固着強度を高め
て、しかも発光出力を低下させることなく、信頼性の向
上した発光ダイオードを提供するところにある。SUMMARY OF THE INVENTION Accordingly, the present invention has been made to solve the above-mentioned problem, and an object of the present invention is to increase the strength of fixing a light emitting chip to a substrate and to further increase the light output. It is an object of the present invention to provide a light emitting diode with improved reliability without reducing the light emitting diode.
【０００６】[0006]
【課題を解決するための手段】本発明の発光ダイオード
は、発光チップの発光を反射する基板と、基板の表面に
予め形成された配線パターンと、同一面側に正と負の電
極が設けられた発光チップと、発光チップの正と負の電
極と配線パターンとをそれぞれ電気的に接続するボンデ
ィングワイヤとを有する発光ダイオードであって、配線
パターンは貴金属又は貴金属のメッキが施されていると
共に、発光チップは接着剤を介して基板と配線パターン
上とに跨ってダイボンドされていることを特徴とする。According to the present invention, there is provided a light emitting diode comprising : a substrate for reflecting light emitted from a light emitting chip;
Positive and negative currents on the same side as the wiring pattern formed in advance
A light-emitting chip with poles and the positive and negative
Bonders that electrically connect the poles and wiring patterns
A light emitting diode having a wiring
If the pattern is precious metal or plated with precious metal
In both cases, the light emitting chip is connected to the substrate via an adhesive
It is characterized by being die-bonded over the upper part .
【０００７】図１は本発明の理解を助けるために示す参
考的な発光ダイオードを発光観測面側から見た平面図で
あり、図２は図１の発光ダイオードの模式断面図であ
る。尚、図１において、モールド樹脂は図示していな
い。図１及び図２において、表面が発光チップ３の発光
を反射する基板１上には配線パターン２が形成されてお
り、発光チップ３は前記基板１上の配線パターン２が施
されていない部分にダイボンドされ、前記発光チップ３
の正負一対の電極は配線パターン２とボンディングワイ
ヤ５で電気的に接続される。図３は本発明の発光ダイオ
ードを示す模式断面図であり、発光チップ１３は基板１
１に形成された配線パターン１２上と、基板１１上の配
線パターン１２が施されていない部分とに跨ってダイボ
ンドされる。その他は、図１及び図２で示した発光ダイ
オードと同じ構成である。このように、本発明の発光ダ
イオードにおいて、図３に示したように発光チップが部
分的に基板に直接ダイボンドされている。 FIG. 1 is a reference to aid understanding of the present invention.
Is a plan view of the considered specific light-emitting diodes from the light emission observing surface side, FIG. 2 is a schematic cross-sectional view of a light emitting diode of FIG. In FIG. 1, the mold resin is not shown. In FIGS. 1 and 2, a wiring pattern 2 is formed on a substrate 1 whose surface reflects light emitted from a light emitting chip 3. The light emitting chip 3 is disposed on a portion of the substrate 1 where the wiring pattern 2 is not provided. The light emitting chip 3 is die-bonded.
Are electrically connected to the wiring pattern 2 and the bonding wires 5 . Figure 3 is a schematic sectional view showing a light emitting diode of the present invention, the light-emitting chip 13 is the substrate 1
The die bonding is performed over the wiring pattern 12 formed on the substrate 1 and a portion of the substrate 11 where the wiring pattern 12 is not formed. Other configurations are the same as those of the light emitting diode shown in FIGS. Thus, in the light emitting diode of the present invention, the light emitting chips as shown in FIG. 3 is die-bonded directly to partially substrate.
【０００８】表面が発光チップ３の発光を反射する基板
としては、白色基板や表面が鏡面状とされた基板が用い
られる。例えば白色のセラミック、白色の液晶ポリマー
樹脂、或いは、アルミニウム等の銀色をした金属上に、
光反射性または光透過性で且つ母材への付着強度の高い
薄膜状絶縁性被膜、例えばアルマイト被膜を形成したも
のも基板として使用できる。As a substrate whose surface reflects light emitted from the light emitting chip 3, a white substrate or a substrate having a mirror-finished surface is used. For example, on white ceramic, white liquid crystal polymer resin, or silver-colored metal such as aluminum,
A thin film-like insulating film which is light-reflective or light-transmissive and has a high adhesion strength to a base material, for example, a film formed with an alumite film can also be used as the substrate.
【０００９】更に、前記基板としては熱伝導率の良いも
のを用いることが好ましく、例えばセラミックや、前記
に示した金属上に薄膜状絶縁性被膜を形成したものを用
いることが好ましい。Further, it is preferable to use a substrate having good thermal conductivity as the substrate, for example, a ceramic or a metal having the above-mentioned metal and a thin film-like insulating film formed thereon.
【００１０】[0010]
【作用】従来の発光ダイオードでは、発光チップが基板
上に形成された配線パターン上にダイボンドされてお
り、前記配線パターンは基板との接着性が弱いため、基
板から剥離し、従って配線パターン上にダイボンドされ
た発光チップの固定が損なわれていた。In a conventional light emitting diode, a light emitting chip is die-bonded on a wiring pattern formed on a substrate, and the wiring pattern is peeled off from the substrate because the adhesiveness with the substrate is weak. The fixation of the die-bonded light emitting chip was impaired.
【００１１】本発明の発光ダイオードは、発光チップ底
面の一部が配線パターンにかかり、基板と配線パターン
とに跨るようにしてダイボンドされているため、基板に
固着された部分は固着強度が高くなるので、従来のよう
に発光チップの固定が損なわれることがない。 [0011] The light emitting diode of the present invention has a light emitting chip bottom.
Part of the surface covers the wiring pattern, and the board and the wiring pattern
Die- bonded so as to straddle the
Fixed portions than the bonding strength is high, never fixed as in the prior art light emitting chip is impaired.
【００１２】しかも、本発明の発光ダイオードは、反射
面の役目を有する配線パターンが発光チップ直下に施さ
れていないにもかかわらず、基板表面で発光チップから
の発光を発光観測面側に反射することができるので、発
光チップからの発光の外部取出効率が高くなり、発光出
力も向上する。Moreover, the light emitting diode of the present invention reflects light emitted from the light emitting chip toward the light emission observing surface side on the substrate surface, even though the wiring pattern serving as a reflecting surface is not provided immediately below the light emitting chip. As a result, the efficiency of extracting light emitted from the light emitting chip to the outside is increased, and the light output is also improved.
【００１３】また、配線パターン表面は、一般に金、銀
等の貴金属のメッキが施されるが、金メッキの場合、発
光チップの発光波長により反射率は大きく変動する。例
えば青色発光チップの場合、青色発光が配線パターン表
面の金メッキで吸収され、発光出力が低下してしまうと
いう問題があった。しかし、本発明の発光ダイオードで
は、発光チップ直下まで配線パターンを延設する必要が
ないので、基板表面に形成される配線パターンの面積を
極めて小さくすることができる。従って、従来問題とな
っていた金メッキの発光吸収による発光出力の低下も防
止することが可能となる。The surface of the wiring pattern is generally plated with a noble metal such as gold or silver. In the case of gold plating, the reflectance greatly varies depending on the emission wavelength of the light emitting chip. For example, in the case of a blue light emitting chip, there is a problem that blue light is absorbed by gold plating on the surface of the wiring pattern, and the light emission output is reduced. However, in the light-emitting diode of the present invention, since it is not necessary to extend the wiring pattern right below the light-emitting chip, the area of the wiring pattern formed on the substrate surface can be extremely reduced. Therefore, it is possible to prevent a decrease in the light emission output due to the light emission absorption of the gold plating, which has conventionally been a problem.
【００１４】更に、上記に示したように配線パターンの
面積を小さくすることにより、次のような利点もある。
配線パターンとしては、金、銀等の貴金属が用いられる
が、従来に比べ配線パターンの面積が小さいため、その
分高価な貴金属の使用量を低減でき非常に経済的であ
る。Further, by reducing the area of the wiring pattern as described above, there are the following advantages.
As the wiring pattern, a noble metal such as gold or silver is used. However, since the area of the wiring pattern is smaller than before, the amount of expensive noble metal used can be reduced correspondingly, which is very economical.
【００１５】また、従来の配線パターン上に発光チップ
がダイボンドされた発光ダイオードにおいては、通電に
より生じる発光チップの発熱は、基板の熱伝導率が悪く
ても発光チップから配線パターンに伝導、放熱されてい
た。本発明の発光ダイオードでは、前記に示したセラミ
ックや或いは金属上に薄膜状絶縁性被膜が形成されたも
の等の熱伝導率の良い基板を用いることにより、通電に
よる発光チップの発熱は速やかに基板に伝導、放熱され
るため、発光チップ直下に配線パターンが施されていな
くても従来と同等の放熱性が確保される。Further, in a conventional light emitting diode in which a light emitting chip is die-bonded on a wiring pattern, heat generated by the light emitting chip due to energization is transmitted and radiated from the light emitting chip to the wiring pattern even if the thermal conductivity of the substrate is poor. I was In the light-emitting diode of the present invention, by using a substrate having good thermal conductivity such as the above-described ceramic or metal having a thin-film insulating film formed on the metal, heat generation of the light-emitting chip by energization is quickly caused by the substrate. Therefore, even if a wiring pattern is not provided immediately below the light emitting chip, the same heat radiation as that of the related art is secured.
【００１６】[0016]
【実施例】本発明の発光ダイオードを実施例に基づき説
明する。［参考例 １］ 図１は参考例の発光ダイオードを示す平面図であり、図
２は図１の発光ダイオードの模式断面図である。符号１
は基板で、電気絶縁性の高強度部材よりなり、且つ基板
表面で発光チップからの発光を反射することのできる、
例えば白色のセラミック等で形成される。基板１表面に
は配線パターン２が形成されており、配線パターン２は
金、銀等の貴金属よりなるか、或いはニッケル、タング
ステン等の金属の下地層上に前記貴金属のメッキが施さ
れたものを用いる。発光チップ３は基板１上に、銀ペー
ストまたはエポキシ樹脂等の接着剤４を介してダイボン
ドされる。更に発光チップ３表面に形成された正負一対
の電極と配線パターン２とが、金線等のボンディングワ
イヤ５により電気的に接続され、発光チップ３周辺は透
光性の樹脂６によりモールドされて構成されている。DESCRIPTION OF THE PREFERRED EMBODIMENTS A light emitting diode according to the present invention will be described based on embodiments. Reference Example 1 FIG. 1 is a plan view showing a light emitting diode of a reference example , and FIG. 2 is a schematic sectional view of the light emitting diode of FIG. Sign 1
Is a substrate, which is made of an electrically insulating high-strength member, and can reflect light emitted from the light emitting chip on the surface of the substrate,
For example, it is formed of white ceramic or the like. A wiring pattern 2 is formed on the surface of the substrate 1. The wiring pattern 2 is made of a noble metal such as gold or silver, or a noble metal plated on a base layer of a metal such as nickel or tungsten. Used. The light emitting chip 3 is die-bonded on the substrate 1 via an adhesive 4 such as a silver paste or an epoxy resin. Further, a pair of positive and negative electrodes formed on the surface of the light emitting chip 3 and the wiring pattern 2 are electrically connected by a bonding wire 5 such as a gold wire, and the periphery of the light emitting chip 3 is molded with a translucent resin 6. Have been.
【００１７】本参考例では、図に示すように発光チップ
３は配線パターン２が備えられていない基板１表面に直
接ダイボンドされる。このようにして得られた発光ダイ
オードは、発光チップ３が高強度部材である基板１上に
直接ダイボンドされているので、発光チップ３の基板へ
の固着強度が高くなるため、発光チップが配線パターン
ごと剥離するといった事もない。更に本参考例で得られ
た発光ダイオードは、基板１表面で発光チップ３からの
発光を発光観測面側に反射することができるので、外部
への光取出効率が高くなり、発光出力も向上する。In this embodiment , as shown in the figure, the light emitting chip 3 is directly die-bonded to the surface of the substrate 1 on which the wiring pattern 2 is not provided. The thus obtained light-emitting diode, since light emitting chip 3 is die-bonded directly on the substrate 1 is a high-strength member, since the bonding strength to the substrate of the light emitting chip 3 becomes higher, light emission chip wiring There is no peeling of the entire pattern. Further, the light emitting diode obtained in the present reference example can reflect light emitted from the light emitting chip 3 on the surface of the substrate 1 toward the light emission observing surface side, so that the efficiency of light extraction to the outside is increased and the light emission output is improved. .
【００１８】［実施例１］ 図３は本実施例の発光ダイオードを示す模式断面図であ
る。基板１１としては、アルミニウム等の銀色をした金
属上に薄膜状絶縁性被膜を形成したものを用いる。また
発光チップ１３は、基板１１上と貴金属のメッキが施さ
れた配線パターン１２上とに跨るようにしてダイボンド
されている。その他は、参考例１と同様にして本実施例
の発光ダイオードを得る。Embodiment 1 FIG. 3 is a schematic sectional view showing a light emitting diode of this embodiment. As the substrate 11, a substrate in which a thin insulating film is formed on a silver metal such as aluminum is used. The light emitting chip 13 is die-bonded so as to extend over the substrate 11 and the wiring pattern 12 plated with a noble metal. Otherwise , the light-emitting diode of this embodiment is obtained in the same manner as in the first embodiment.
【００１９】本実施例の発光ダイオードでは、発光チッ
プ１３が基板１１と配線パターン１２上とに跨るように
してダイボンドされているため、部分的にでも発光チッ
プ１３が高強度部材である基板１１に固着されているの
で、発光チップ１３の基板１１への固着強度が高くな
り、従来のように発光チップの固定が損なわれる事もな
い。また、参考例１と同様に発光チップからの発光の光
取出効率も高く、発光出力の向上した発光ダイオードが
得られる。In the light emitting diode of this embodiment, since the light emitting chip 13 is die-bonded so as to straddle the substrate 11 and the wiring pattern 12, the light emitting chip 13 is partially connected to the substrate 11 which is a high-strength member. Since the light emitting chip 13 is fixed, the fixing strength of the light emitting chip 13 to the substrate 11 is increased, and the fixing of the light emitting chip is not impaired unlike the related art. In addition , as in Reference Example 1 , the light extraction efficiency of light emitted from the light emitting chip is high, and a light emitting diode with an improved light emission output can be obtained.
【００２０】[0020]
【発明の効果】以上説明したように、本発明の発光ダイ
オードは、発光チップが従来のように基板への接着力の
弱い配線パターン上でなく、高強度部材である基板上に
直接ダイボンドされているため発光チップの固着強度が
高くなるので、発光チップの固定が損なわれるのを防止
でき、信頼性が向上するという利点がある。しかも、本
発明の発光ダイオードは、基板表面で発光チップからの
発光を発光観測面側に反射できるので、発光チップから
の発光の光取出効率は高くなり、発光出力は向上する。As described above, in the light emitting diode of the present invention, the light emitting chip is die-bonded directly to the substrate, which is a high-strength member, instead of the wiring pattern having a weak adhesive force to the substrate as in the prior art. Therefore, the fixing strength of the light emitting chip is increased, so that the fixing of the light emitting chip can be prevented from being damaged, and there is an advantage that the reliability is improved. Moreover, since the light emitting diode of the present invention can reflect the light emitted from the light emitting chip toward the light emission observing surface on the substrate surface, the light extraction efficiency of the light emitted from the light emitting chip is increased, and the light emitting output is improved.
【００２１】また、本発明の発光ダイオードは、配線パ
ターンの面積が従来に比べて小さいので、その分配線パ
ターンに用いる高価な貴金属の使用量を低減することが
でき非常に経済的である。Further, since the light emitting diode of the present invention has a smaller wiring pattern area than the conventional one, the amount of expensive noble metal used for the wiring pattern can be reduced correspondingly, which is very economical.
【図１】 参考のための発光ダイオードを示す平面図。FIG. 1 is a plan view showing a light emitting diode for reference.
【図２】 参考のための発光ダイオードを示す模式断面
図。FIG. 2 is a schematic sectional view showing a light emitting diode for reference .
【図３】 本発明の発光ダイオードを示す模式断面図。FIG. 3 is a schematic sectional view showing a light emitting diode of the present invention.
【図４】 従来の発光ダイオードを示す模式断面図。FIG. 4 is a schematic sectional view showing a conventional light emitting diode.
１、１１・・・・基板 ２、１２・・・・配線パターン ３、１３・・・・発光チップ ４、１４・・・・接着剤 ５、１５・・・・ボンディングワイヤ ６、１６・・・・透光性モールド樹脂 1, 11 ... substrate 2, 12 ... wiring pattern 3, 13 ... light emitting chip 4, 14 ... adhesive 5, 15 ... bonding wire 6, 16 ...・ Translucent mold resin
Claims (1)
基板の表面に予め形成された配線パターンと、同一面側
に正と負の電極が設けられた発光チップと、該発光チッ
プの正と負の電極と前記配線パターンとをそれぞれ電気
的に接続するボンディングワイヤとを有する発光ダイオ
ードであって、 前記配線パターンは貴金属又は貴金属のメッキが施され
ていると共に、前記発光チップは接着剤を介して前記基
板と前記配線パターン上とに跨ってダイボンドしている
ことを特徴とする発光ダイオード。1. A substrate that reflects light emitted from a light-emitting chip, a wiring pattern formed in advance on the surface of the substrate, a light-emitting chip provided with positive and negative electrodes on the same surface, And a bonding wire for electrically connecting the negative electrode and the wiring pattern respectively, wherein the wiring pattern is plated with a noble metal or a noble metal, and the light emitting chip is provided with an adhesive. A light-emitting diode, which is die-bonded across the substrate and the wiring pattern via a substrate.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP29114795A JP3256951B2 (en) | 1995-11-09 | 1995-11-09 | Light emitting diode |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP29114795A JP3256951B2 (en) | 1995-11-09 | 1995-11-09 | Light emitting diode |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH09135040A JPH09135040A (en) | 1997-05-20 |
| JP3256951B2 true JP3256951B2 (en) | 2002-02-18 |
Family
ID=17765059
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP29114795A Expired - Lifetime JP3256951B2 (en) | 1995-11-09 | 1995-11-09 | Light emitting diode |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP3256951B2 (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2004207655A (en) * | 2002-12-26 | 2004-07-22 | Matsushita Electric Ind Co Ltd | Metallic base substrate and light-emitting unit |
| US9240535B2 (en) | 2011-03-24 | 2016-01-19 | Murata Manufacturing Co., Ltd. | Light-emitting-element mount substrate and LED device |
Families Citing this family (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6121637A (en) * | 1997-10-03 | 2000-09-19 | Rohm Co., Ltd. | Semiconductor light emitting device with increased luminous power |
| JP2000348517A (en) * | 1999-06-07 | 2000-12-15 | Stanley Electric Co Ltd | Light emitting device |
| KR200299491Y1 (en) * | 2002-09-02 | 2003-01-03 | 코리아옵토 주식회사 | A Surface mounting type light emitting diode |
| DE102005059524A1 (en) * | 2005-09-30 | 2007-04-05 | Osram Opto Semiconductors Gmbh | Housing for an electromagnetic radiation-emitting optoelectronic component, component and method for producing a housing or a component |
| JP2011049608A (en) * | 2010-12-07 | 2011-03-10 | Hitachi Chem Co Ltd | Substrate for mounting light emitting element and manufacturing method of the same |
-
1995
- 1995-11-09 JP JP29114795A patent/JP3256951B2/en not_active Expired - Lifetime
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2004207655A (en) * | 2002-12-26 | 2004-07-22 | Matsushita Electric Ind Co Ltd | Metallic base substrate and light-emitting unit |
| US9240535B2 (en) | 2011-03-24 | 2016-01-19 | Murata Manufacturing Co., Ltd. | Light-emitting-element mount substrate and LED device |
Also Published As
| Publication number | Publication date |
|---|---|
| JPH09135040A (en) | 1997-05-20 |
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