JP3250484B2 - Voltage controlled oscillator - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

The present invention relates to a voltage controlled oscillator used in a phase locked loop.

[0002]

SUMMARY OF THE INVENTION A phase locked loop (hereinafter, referred to as a phase locked loop)
Voltage-controlled oscillation circuit (hereinafter referred to as PLL)
VCO), there is a variation in the constants of the elements that make up the VCO, so it is necessary to correct the free-running oscillation frequency of the output signal. Conventionally, the correction has been very time-consuming, such as preparing an adjustment element and adjusting a constant or adjusting the element value itself by laser trimming.

[0003] Japanese Patent Application Laid-Open No. 7-122996 discloses an example in which correction can be performed automatically without such trouble. In this method, an error voltage between a control voltage of a VCO and a predetermined reference voltage is applied to a varicap to change its capacitance, thereby automatically correcting the free-running oscillation frequency of an LC oscillation circuit in the VCO. Things.

In the above-mentioned Japanese Patent Application Laid-Open No. 7-122996, a lock range in which a PLL operates and a variation in element constants are absorbed by a change in capacitance of a varicap. I have. Therefore, in order to sufficiently adjust the free-running oscillation frequency including these, it is necessary to widen the range of the voltage applied to the varicap.
However, for that purpose, it is necessary to increase the power supply voltage, and it is difficult to adopt the current situation in which the operating voltage is often reduced due to the demand for low power consumption.

Conversely, it is conceivable to use a varicap having a high capacitance change rate, that is, a high voltage sensitivity without increasing the power supply voltage. In this case, however, the sensitivity to noise also increases, so that the PLL is used. A new problem arises in that the C / N ratio (level ratio between signal and noise) is deteriorated.

SUMMARY OF THE INVENTION The present invention has been made in view of the above circumstances, and it is an object of the present invention to provide an automatic self-running oscillation without increasing the power supply voltage and without deteriorating the C / N ratio of a phase locked loop circuit. An object of the present invention is to provide a voltage controlled oscillation circuit capable of correcting a frequency.

[0007]

According to the voltage controlled oscillation circuit of the first aspect, the comparing means is provided in the phase-locked loop according to the difference between the frequency of the input signal and the oscillation frequency of the output signal of the phase-locked loop. Is compared with the reference voltage, and the connection switching unit switches the connection of the correction inductor to the inductor of the parameter that determines the oscillation frequency of the output signal according to the comparison result of the comparison unit. line
U. Specifically, the comparing unit compares the control bias voltage with the upper limit value and the lower limit value as the reference voltage, and the connection switching unit sets the correction inductor in parallel with the inductor when the control bias voltage becomes equal to or higher than the upper limit value. connected to, if the control bias voltage becomes less than the lower limit value to connect the correction inductor in series with the inductor.

With such a configuration, for example, if the inductance of the correction inductor is set to a value corresponding to the accuracy error of the inductor, even if the accuracy error of the inductor is maximized, the correction inductor Can be connected to correct the accuracy error, and the free-running oscillation frequency of the output signal of the phase locked loop can be corrected to an appropriate value.

Therefore, the correction can be performed automatically within a sufficient range without using particularly high-precision elements for the inductor and other circuit elements constituting the oscillation circuit. Further, even when a varicap is used for the circuit element, it is not necessary to increase the power supply voltage in order to secure a sufficient correction range only by a change in the capacitance of the varicap, and furthermore, the C / N ratio of the phase locked loop is reduced. No worse.

According to the voltage controlled oscillator circuit according to claim 2, since the inductor and the correction inductor stripline, when the oscillation frequency is set relatively high form the inductor and the correction inductor Therefore, the entire circuit can be made compact without requiring a large area.

[0011]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment in which the present invention is applied to a local oscillator of a radio device will be described below with reference to the drawings. FIG. 1 is a diagram showing an electrical configuration of a PLL (phase locked loop). In FIG. 1, PLLIC1 is:
Frequency f of input signal (received signal) given from outside
r and the frequency fo of the output signal of the VCO 2 as the voltage controlled oscillator circuit are appropriately divided, for example, M, N (M, N
N is an arbitrary natural number) after frequency division,
A charge pump output corresponding to the comparison result is supplied to a low-pass filter (LPF) 3.

The low-pass filter 3 has a DC level voltage signal V from which the high-frequency component of the charge pump output has been removed.
c is output as a control bias voltage to the VCO 2 and the non-inverting input terminals of the comparators (comparing means) 4a and 4b.

The VCO 2 includes a varicap 6, a correction inductor (inductance L) between the bus 5 and the ground.
1) A series circuit of 7 and a normally open switch (connection switching means) 8 and a series circuit of an inductor (inductance L0) 9 and a correction inductor (inductance L2) 10 are connected to each other. A normally-closed switch (connection switching means) 1 is provided in the correction inductor 10.
1 are connected in parallel. The varicap 6 and the inductors 7, 9, 10 constitute an LC oscillation circuit.

Here, as an example, it is assumed that the inductance L0 of the inductor 9 is 27 nH and the free-running oscillation frequency fs of the VCO 2 is about 130 MHz. The accuracy (tolerance) of the inductor 9 is set to 10% of that of the standard product.
Then, the inductances L1 and L2 of the correction inductors 7 and 10 are set according to the accuracy 10% of the inductor 9 as described later.

The inverting input terminals of the comparators 4a and 4b are supplied with an upper limit value _VH and a lower limit value _VL of the control bias voltage Vc, respectively. The upper limit value _VH and the lower limit value _VL are determined by a PLL 13 as a phase locked loop composed of PLLIC1, VCO2, low-pass filter 3, and the like.
In the feedback loop, the control bias voltage V
c is set to an upper limit and a lower limit of a fluctuating value, that is, corresponds to the upper limit and the lower limit of the lock range (frequency) of the PLL 13. Note that P
The LL 13 operates at a power supply voltage of 3V.

Output terminals of the comparators 4a and 4b are connected to control terminals of switches 8 and 11 in the VCO 2 via signal holding circuits (connection switching means) 12a and 12b, each of which is constituted by, for example, a flip-flop. I have. Opening and closing of the switches 8 and 11 are controlled in accordance with the output signals of the comparators 4a and 4b.

Next, the operation of the present embodiment will be described.
As an initial state, the switch 8 is open and the switch 11 is closed. As is well known, when the frequency fr of the input signal is within the lock range, the operation as the PLL 13 is performed with the frequency fr and the frequency f of the output signal of the VCO 2.
A control bias voltage Vc corresponding to the frequency difference between the control voltage Vc and the free running oscillation frequency fs in the initial state is applied to the VCO 2,
CO2 changes the frequency fo of the output signal according to the control bias voltage Vc.

The frequency fo of the output signal of the VCO 2 finally becomes f
o = (N / M) · fr, and the frequency fr of the input signal
Follows the frequency of (N / M). The output signal of such a VCO 2 is an input signal (received signal)
It is used for frequency conversion.

When power is supplied to the PLL 13, the VCO
2 oscillates at the free-running oscillation frequency fs due to parallel resonance of the varicap 6 and the inductor 9 (inductance L0). In this case, if there is an error in the constant of the circuit element forming the VCO 2, the free-running oscillation frequency fs will deviate from the initially set value, but the main cause is an error in the inductance of the inductor 9.

If the fluctuation of the free-running oscillation frequency fs due to an error in the inductance of the inductor 9 is small to a certain extent, the control bias voltage Vc changes and the capacitance of the varicap 6 changes, so that the fluctuation can be absorbed. However, even in this case, the lock range of the PLL 13 slightly deviates from the design value.

If the accuracy error of the inductance of the inductor 9 corresponds to, for example, a full 10%, the variation cannot be absorbed only by the capacitance change of the varicap 6. In particular, when the power supply voltage is set to about 3 V, the range of the capacitance change of the varicap 6 is limited.

[0022] In this case, for example, the inductance of the inductor 9 is higher than the design value, when the control bias voltage Vc free-running oscillation frequency fs is greater decreases to become equal to or greater than the upper limit V _H is high the output signal of the comparator 4a is Level. Then, the signal holding circuit 12a detects, for example, a rising edge of the output signal and outputs a high-level control signal to the switch 8.

Then, the switch 8 is closed and the correction inductor 7 is connected in parallel with the inductor 9, so that the resonance inductance of the LC oscillation circuit is reduced from L0 to L0 · L1 / (L0 + L1). Since the free-running oscillation frequency fs increases by an amount corresponding to the decrease in the resonance inductance, the control bias voltage Vc is corrected so as to have a value corresponding to an appropriate lock range.

When the inductance of the inductor 9 is lower than the design value and the free-running oscillation frequency fs rises more than the set value and the voltage signal Vc falls below the lower limit value _VL , the output signal of the comparator 4b becomes high. Level.
Then, the signal holding circuit 12b similarly detects the rising edge of the output signal and outputs a high-level control signal to the switch 11.

Then, the switch 11 is opened and the correction inductor 10 is connected in series to the inductor 9, so that the resonance inductance of the LC oscillation circuit becomes L0.
From (L0 + L2). Then, the free-running oscillation frequency fs decreases by an amount corresponding to the increase in the resonance inductance, and the control bias voltage Vc is corrected.

From the above, the inductances L1 and L2 of the correction inductors 7 and 10 are set as follows. L0
= 27 nH, accuracy 10%, then (1.1 × L0) × L1 / ((1.1 × L0) + L1) = L0 1.1 × L1 = 1.1 × L0 + L1 L1 = 11 × L0 = 11 × 27 = 297 (nH) (1) L2 = 0.1 × L0 = 0.1 × 27 = 2.7 (nH) (2) By setting the inductances L1 and L2 in this manner, the inductor 9 Even when the accuracy error of the above becomes the maximum, the accuracy error can be corrected by connecting the correction inductors 7 and 10.

As described above, according to the present embodiment, the comparators 4a and 4b compare the control bias voltage Vc with the upper limit value V _H and the lower limit value _VL, and compare them with the signal holding circuits 12a and 12L.
b is in accordance with the output signal of the comparator 4a, 4b, a control bias voltage Vc if equal to or more than the upper limit value V _H connected a correction inductor 7 in parallel with the inductor 9, a control bias voltage Vc is lower limit V _L In the following cases, the correction inductor 10 is connected in series to the inductor 9.

Therefore, even if the free-running oscillation frequency fs of the output signal of the PLL 13 changes in accordance with the accuracy error of the inductor 9, the accuracy error is corrected by connecting the correction inductor 7 in parallel or in series. Thus, the free-running oscillation frequency fs can be corrected so as to be in an appropriate range. Therefore, it is possible to automatically perform correction within a sufficient range without using particularly high-precision elements for the inductor 9 and other circuit elements constituting the VCO 2. Also, unlike the conventional varicap 6 that performs correction only,
There is no need to increase the power supply voltage in order to secure a sufficient correction range, and the C / N ratio of the PLL 13 does not deteriorate.

The present invention is not limited to the embodiment described above and shown in the drawings, and the following modifications or extensions are possible. The configuration of the connection switching means is not limited to the illustrated one. For example, a parallel circuit of a correction inductor and a switch may be connected in series to the inductor, and the resonance inductance may be increased or decreased by opening and closing the switches. When the setting of the free-running oscillation frequency is relatively high (for example, 500 MHz or more), the inductor and the correction inductor may be configured by a strip line or the like.
With such a configuration, a large area is not required to form the inductor and the correction inductor, and the entire circuit can be configured to be small. The free-running oscillation frequency fs and other circuit constants are merely examples, and may be changed as appropriate. The inductance value of the correction inductor does not necessarily have to be equivalent to the accuracy error of the inductor. The present invention is not limited to the local oscillator of the wireless device, but can be applied to any circuit using a PLL.

[Brief description of the drawings]

FIG. 1 is an electrical configuration diagram showing one embodiment of the present invention.

[Explanation of symbols]

2 is a VCO (voltage controlled oscillator), 4a and 4b are comparators (comparing means), 7 is a correction inductor, 8 is a switch (connection switching means), 9 is an inductor, 10 is a correction inductor, and 11 is a switch (connection). Switching means), 1
2a, 12b are signal holding circuits (connection switching means), 13
Indicates a PLL (phase locked loop).

Claims (2)

(57) [Claims] 1. A voltage controlled oscillation circuit used in a phase locked loop circuit, comprising: an inductor which is a parameter for determining an oscillation frequency of an output signal; and a frequency of an input signal and an oscillation frequency of the output signal in the phase locked loop circuit. Comparing means for comparing a control bias voltage output according to the difference between the reference voltage and a reference voltage, and connection switching means for switching connection of a correction inductor to the inductor according to a comparison result of the comparing means. , The comparing means sets the control bias voltage to the control bias voltage.
The above-mentioned base set corresponding to the upper and lower limits of the bias voltage
The connection switching unit compares the control bias voltage with the upper limit value and the lower limit value of the reference voltage.
If the value exceeds the limit, the inductor for correction
When the control bias voltage is lower than
If the value falls below the limit value, the inductor for correction
Voltage controlled oscillation characterized by connecting inductors in series
circuit. 2. The inductor and the correction inductor.
Is characterized by being constituted by a strip line.
The voltage controlled oscillation circuit according to claim 1.