JP3236463B2 - Light emitting diode and method of manufacturing the same - Google Patents

Light emitting diode and method of manufacturing the same

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Publication number
JP3236463B2
JP3236463B2 JP942095A JP942095A JP3236463B2 JP 3236463 B2 JP3236463 B2 JP 3236463B2 JP 942095 A JP942095 A JP 942095A JP 942095 A JP942095 A JP 942095A JP 3236463 B2 JP3236463 B2 JP 3236463B2
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JP
Japan
Prior art keywords
diffusion
emitting diode
light emitting
film
region
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
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JP942095A
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Japanese (ja)
Other versions
JPH08204231A (en
Inventor
光彦 荻原
真澄 谷中
孝篤 清水
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Oki Electric Industry Co Ltd
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Oki Electric Industry Co Ltd
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Publication of JPH08204231A publication Critical patent/JPH08204231A/en
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Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【0001】[0001]

【産業上の利用分野】本発明は、発光ダイオード及びそ
の製造方法に関するものである。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a light emitting diode and a method for manufacturing the same.

【0002】[0002]

【従来の技術】従来、このような発光ダイオードアレイ
としては、以下に示すようなものがあった。
2. Description of the Related Art Conventionally, as such a light emitting diode array, there has been the following one.

【0003】図5はかかる従来の発光ダイオードアレイ
の平面図、図6はその発光ダイオードアレイの断面図で
あり、図6(a)は図5のa−a線断面図、図6(b)
は図5のb−b線断面図である。
FIG. 5 is a plan view of such a conventional light-emitting diode array, FIG. 6 is a cross-sectional view of the light-emitting diode array, FIG. 6 (a) is a cross-sectional view taken along the line aa of FIG. 5, and FIG.
FIG. 6 is a sectional view taken along line bb of FIG. 5.

【0004】これらの図に示すように、発光ダイオード
アレイは、選択拡散により基板54上にアレイ状に形成
したp−n接合とp側電極52などから構成される。選
択拡散により形成するP型拡散層53の深さ(接合深
さ)は通常均一な深さである。一般的に発光強度は接合
深さに依存するので光量が最大となるような深さに設定
している。なお、図において、51は拡散防止膜、55
はn側電極である。
As shown in these figures, the light-emitting diode array is composed of a p-n junction and a p-side electrode 52 formed in an array on a substrate 54 by selective diffusion. The depth (junction depth) of the P-type diffusion layer 53 formed by selective diffusion is usually a uniform depth. Generally, the luminous intensity depends on the junction depth, so that the luminous intensity is set to a depth at which the light amount becomes maximum. In the figure, reference numeral 51 denotes a diffusion prevention film;
Is an n-side electrode.

【0005】[0005]

【発明が解決しようとする課題】しかしながら、上記し
た従来のLEDアレイでは、順方向に電圧を印加した場
合、電極直下に電流の多くが供給され電極直下の接合か
らの発光強度が他の領域に比べて強くなる。しかし、電
極直下の接合からの発光は電極により遮光されるので、
外部に取り出す光量には寄与しない。
However, in the above-described conventional LED array, when a voltage is applied in the forward direction, a large amount of current is supplied immediately below the electrodes, and the light emission intensity from the junction immediately below the electrodes is reduced to other regions. Become stronger than compared. However, light emission from the junction directly below the electrode is shielded by the electrode,
It does not contribute to the amount of light taken out.

【0006】また、電極直下に電流が集中する場合に
は、欠陥成長の要因となり寿命が短くなる。
[0006] Further, when current concentrates directly under the electrode, it causes the growth of defects and shortens the life.

【0007】本発明は、上記問題点を除去し、発光ダイ
オードの発光効率と寿命の向上を図り得る発光ダイオー
ド及びその製造方法を提供することを目的とする。
An object of the present invention is to provide a light emitting diode capable of improving the luminous efficiency and life of the light emitting diode, and a method of manufacturing the same, in which the above problems are eliminated.

【0008】[0008]

【課題を解決するための手段】本発明は、上記目的を達
成するために、 (1)n型化合物半導体基板にZnを選択的に拡散して
なる発光ダイオードにおいて、拡散領域内の一部に形成
されるとともに、拡散制御膜により形成され、そのZn
表面濃度N S が5×10 18 cm -3 <N S <1×10 19
-3 である接合深さの浅い拡散層と、この接合深さの浅
い拡散層の周囲に形成される接合深さの深い拡散層と、
前記接合深さの浅い拡散層にコンタクトをとるp側電極
とを具備するようにしたものである。
Means for Solving the Problems The present invention, in order to achieve the above object, (1) in the Zn in the n-type compound semiconductor substrate selectively diffused comprising light emitting diodes, in a part of the diffusion region Formation
And a Zn layer formed by a diffusion control film.
Surface concentration N S is 5 × 10 18 cm −3 <N S <1 × 10 19 c
a diffusion layer having a shallow junction depth of m −3 ,
A diffusion layer with a deep junction formed around the
A p-side electrode contacting the diffusion layer having a shallow junction depth
Are provided .

【0009】()n型化合物半導体基板にZnを選択
的に拡散してなる発光ダイオードの製造方法において、
拡散開口部内に該拡散開口部内の一部に形成される拡散
制御膜を形成し、深さの異なる接合領域を形成するとと
もに、接合深さの浅い領域のZn表面濃度N S を5×1
18 cm -3 <N S <1×10 19 cm -3 となるように拡散
領域を形成する工程と、前記接合深さの浅い領域へp側
電極のコンタクトをとる工程とを施すようにしたもので
ある。
( 2 ) In a method of manufacturing a light emitting diode in which Zn is selectively diffused into an n-type compound semiconductor substrate,
Diffusion formed in a part of the diffusion opening in the diffusion opening
Control film is formed, to form a different junction regions depths DOO
Moni, Zn surface concentration of the shallow region junction depth N S a 5 × 1
Diffusion so that 0 18 cm −3 <N S <1 × 10 19 cm −3
A step of forming a region and a step of contacting a p-side electrode with the region having a small junction depth are performed.

【0010】()n型化合物半導体基板にZnを選択
的に拡散してなる発光ダイオードの製造方法において、
拡散開口部内の中央部に張り出す拡散防止膜を形成し、
この拡散防止膜の幅が拡散深さの2倍より小さい幅であ
り、横方向拡散による拡散層を形成する工程と、前記拡
散防止膜を除去し、この拡散防止膜が除去された領域に
p側電極のコンタクトをとる工程とを施すようにしたも
のである。
( 3 ) In a method for manufacturing a light emitting diode in which Zn is selectively diffused into an n-type compound semiconductor substrate,
Form a diffusion prevention film that protrudes in the center of the diffusion opening,
Forming a diffusion layer by lateral diffusion, removing the diffusion prevention film, and adding p to a region where the diffusion prevention film has been removed. And a step of contacting the side electrodes.

【0011】[0011]

【作用】(A)上記(1)記載の発光ダイオードによれ
ば、拡散領域内の一部に形成されるとともに、拡散制御
膜により形成され、そのZn表面濃度N S が5×10 18
cm -3 <N S <1×10 19 cm -3 である接合深さの浅い
拡散層と、この接合深さの浅い拡散層の周囲に形成され
る接合深さの深い拡散層と、前記接合深さの浅い拡散層
にコンタクトをとるp側電極とを具備するようにしたの
で、p側電極のオーミック抵抗を良好にとることができ
るとともに、p側電極で発光領域をさえぎることなく、
また、効率よく光を取り出すことができ、発光ダイオー
ドの発光効率と寿命の向上を図ることができる。
(A) According to the light emitting diode described in the above (1), the light emitting diode is formed in a part of the diffusion region and controls the diffusion.
A Zn surface concentration N S of 5 × 10 18
cm −3 <N S <1 × 10 19 cm −3 and shallow junction depth
Formed around the diffusion layer and the diffusion layer having a small junction depth.
Diffusion layer having a large junction depth, and a diffusion layer having a small junction depth.
Since so as to comprise a p-side electrode to contact the can take a good ohmic resistance of the p-side electrode
And without blocking the light emitting region with the p-side electrode,
Further, light can be efficiently extracted, and the luminous efficiency and life of the light emitting diode can be improved.

【0012】(B)上記()記載の発光ダイオードの
製造方法によれば、拡散開口部内にこの拡散開口部内の
一部に形成される拡散制御膜を形成し、深さの異なる接
合領域を形成するとともに、接合深さの浅い領域のZn
表面濃度N S を5×10 18 cm -3 <N S <1×10 19
-3 となるように拡散領域を形成する工程と、前記接合
深さの浅い領域p側電極のコンタクトをとる工程とを
施すようにしたので、光が遮光される電極直下の接合よ
りも周囲の接合領域へ電流が流れ、効率よく光を取り出
すことができる。また、電極直下への電流集中も緩和さ
れ、寿命の向上を図ることができる。
(B) According to the method of manufacturing a light emitting diode described in the above ( 2 ), the diffusion opening is formed in the diffusion opening.
Form a diffusion control film that is formed in part,
Forming a combined region and a Zn region having a shallow junction depth.
The surface concentration N S is 5 × 10 18 cm −3 <N S <1 × 10 19 c
forming a diffusion region such that m -3, the junction
And a step to contact the p-side electrode to the shallow region of the depth
Since as applied, current flows to the surrounding joint region than the junction of the electrode directly below the light is blocked, it is possible to take out light efficiently. In addition, current concentration directly below the electrodes is also reduced, and the life can be improved.

【0013】(C)上記(3)記載の発光ダイオードの
製造方法によれば、横方向拡散により拡散開口部内に形
成した相対的にZn濃度の低い部分をp側電極コンタク
ト領域とするので、発光効率の向上と寿命の向上を図る
ことができる。
(C) According to the method for manufacturing a light emitting diode described in the above (3) , the portion having a relatively low Zn concentration formed in the diffusion opening by the lateral diffusion is used as the p-side electrode contact region. It is possible to improve the efficiency and the service life.

【0014】[0014]

【実施例】本発明の実施例について図を参照しながら説
明する。
An embodiment of the present invention will be described with reference to the drawings.

【0015】図1は本発明の第1実施例を示す発光ダイ
オードの平面図、図2はその発光ダイオードの断面図で
ある。
FIG. 1 is a plan view of a light emitting diode showing a first embodiment of the present invention, and FIG. 2 is a sectional view of the light emitting diode.

【0016】これらの図に示すように、p側電極14直
下の接合深さ(xj)1 の浅い拡散層13bと、その周
囲の接合深さ(xj)2 の深い拡散層13aとからなる
Zn拡散層13を有している。
As shown in these figures, Zn consisting of a shallow diffusion layer 13b having a junction depth (xj) 1 immediately below the p-side electrode 14 and a deep diffusion layer 13a having a junction depth (xj) 2 surrounding the diffusion layer 13b. It has a diffusion layer 13.

【0017】例えば、(Xj)iは略1μm、(Xj)sは
略5μmとする。後で述べるように気相拡散によりZn
低濃度拡散した場合、(Xj)sが略5μm程度の均一な
拡散深さのLEDを作製した場合、発光量は最大とな
り、(Xj)i略1μm程度の拡散深さでは約1/10の
発光量となることを実験的に確認している。
For example, (Xj) i is approximately 1 μm, and (Xj) s is approximately 5 μm. As will be described later, Zn by vapor phase diffusion
When the LED is diffused at a low concentration and an LED having a uniform diffusion depth of (Xj) s of about 5 μm is produced, the light emission amount becomes maximum, and (Xj) i is about 1/10 of the diffusion depth of about 1 μm. It has been experimentally confirmed that the light emission amount is obtained.

【0018】このような構造にすることにより、p側電
極14直下に比べ、周辺部位の抵抗が低くなるので、順
方向に電圧を印加した場合、p側電極14より供給する
電流はp側電極14直下の領域よりむしろp側電極14
周辺の領域を流れ易くなる。すなわち、p側電極14に
より遮光されない領域の接合へ効率よくキャリアが注入
されて効率よく光を取り出すことができる。逆に、p側
電極14直下の接合へは供給される電流が減少し、外に
取り出せない光量は減少する。一方、p側電極14直下
に電流が集中することもないので、寿命の観点からも性
能の向上を図ることができる。なお、11はn型GaA
1-X X エピタキシャル基板、12は拡散防止膜(A
2 3 膜)、15はn側電極としてのAu合金電極で
ある。
With such a structure, the resistance of the peripheral portion is lower than that immediately below the p-side electrode 14, so that when a voltage is applied in the forward direction, the current supplied from the p-side electrode 14 is 14 rather than the region directly below 14
It becomes easier to flow in the surrounding area. That is, carriers can be efficiently injected into the junction in a region not shielded by the p-side electrode 14, and light can be extracted efficiently. Conversely, the current supplied to the junction immediately below the p-side electrode 14 decreases, and the amount of light that cannot be extracted outside decreases. On the other hand, since the current does not concentrate directly below the p-side electrode 14, the performance can be improved from the viewpoint of the life. 11 is n-type GaAs
s 1-X P X epitaxial substrate, 12 is a diffusion barrier film (A
1 2 O 3 film) and 15 are Au alloy electrodes as n-side electrodes.

【0019】以下、本発明の第1実施例を示す発光ダイ
オードの製造方法について説明する。
Hereinafter, a method of manufacturing a light emitting diode according to a first embodiment of the present invention will be described.

【0020】図3はその発光ダイオード(発光ダイオー
ドアレイの発光部)の概略平面図、図4はその発光ダイ
オードの製造工程断面図である。
FIG. 3 is a schematic plan view of the light emitting diode (light emitting portion of the light emitting diode array), and FIG. 4 is a sectional view of a manufacturing process of the light emitting diode.

【0021】(1)まず、図4(a)に示すように、n
型化合物半導体基板、例えばn型GaAs1-X X エピ
タキシャル基板21にZn選択拡散のための拡散防止膜
22、例えばAl2 3 膜を2000Å膜付けし、アレ
イ状に拡散開口部22aを形成する。その次に電極パタ
ーンにあわせて、拡散制御膜23、例えばAl2 3
を100Å膜付けし、ホトリソグラフィーによりパター
ニングする。この時、横方向拡散距離を考慮して拡散制
御膜のパターン形成を設定する。
(1) First, as shown in FIG.
An anti-diffusion film 22 for selective diffusion of Zn, for example, an Al 2 O 3 film of 2000 nm is formed on a type compound semiconductor substrate, for example, an n-type GaAs 1-X P X epitaxial substrate 21 to form diffusion openings 22a in an array. I do. Then, a diffusion control film 23, for example, an Al 2 O 3 film is formed to a thickness of 100 ° in accordance with the electrode pattern, and is patterned by photolithography. At this time, the pattern formation of the diffusion control film is set in consideration of the lateral diffusion distance.

【0022】(2)次に、図4(b)に示すように、気
相拡散において基板表面保護のための拡散保護膜24、
例えばPSG膜150Åを膜付けし、Znを含む化合物
あるいは混合物をガス源とし、封管法によりZnを拡散
する。例えば、750℃、6時間のアニールにより、拡
散開口部22aの拡散深さとして約5μm、拡散制御膜
23下の領域で約1μmの拡散深さの接合が形成され
る。この拡散工程ではZn表面濃度に概ね次のような制
限を加えることが望ましい。
(2) Next, as shown in FIG. 4B, a diffusion protective film 24 for protecting the substrate surface in the vapor phase diffusion,
For example, a PSG film 150 ° is deposited, and Zn is diffused by a sealed tube method using a compound or a mixture containing Zn as a gas source. For example, by annealing at 750 ° C. for 6 hours, a junction having a diffusion depth of about 5 μm as a diffusion depth of the diffusion opening 22 a and a diffusion depth of about 1 μm in a region below the diffusion control film 23 is formed. In this diffusion step, it is desirable to substantially limit the Zn surface concentration as follows.

【0023】接合深さの浅い拡散層25bで5×1018
cm-3<NS <1×1019cm-3が望ましい。これは、
電極のオーミックコンタクトが良好にとれ、かつ電極直
下の領域の抵抗が拡散開口部22a内のその他の領域の
抵抗より大きくなるようにするためである。例えば、こ
のような値になるように接合深さの浅い拡散層25bを
形成すれば周囲の接合深さの深い拡散層25aの抵抗に
比べ10倍以上のシート抵抗となり、電極より供給され
る大部分の電流は電極直下以外の接合領域へ流れるよう
にすることができる。
5 × 10 18 with diffusion layer 25b having a shallow junction depth
It is desirable that cm −3 <N S <1 × 10 19 cm −3 . this is,
This is because the ohmic contact of the electrode can be taken satisfactorily, and the resistance of the region immediately below the electrode is higher than the resistance of the other region in the diffusion opening 22a. For example, if the diffusion layer 25b having a shallow junction depth is formed so as to have such a value, the sheet resistance becomes 10 times or more as large as the resistance of the diffusion layer 25a having a deep junction depth around the diffusion layer. Part of the current can flow to the junction region other than immediately below the electrode.

【0024】(3)次に、図4(c)に示すように、拡
散制御膜23と拡散保護膜24を除去した後、接合深さ
の浅い拡散層25bにp側電極であるAl電極26を形
成する。また、基板裏面は研磨後、n側電極であるAu
合金電極27を形成して完成する。
(3) Next, as shown in FIG. 4C, after removing the diffusion control film 23 and the diffusion protection film 24, the diffusion layer 25b having a shallow junction depth is added to the Al electrode 26 serving as a p-side electrode. To form The back surface of the substrate is polished and then the Au electrode serving as the n-side electrode is polished.
The alloy electrode 27 is formed and completed.

【0025】上記実施例では拡散制御膜23により形成
した接合深さの浅い拡散層25bにAl電極26のコン
タクトをとる例を述べたが、電極形状によっては横方向
の拡散を利用することも可能である。
In the above embodiment, the example in which the Al electrode 26 is in contact with the diffusion layer 25b having a small junction depth formed by the diffusion control film 23 has been described. However, depending on the shape of the electrode, lateral diffusion can be used. It is.

【0026】次に、本発明の第2実施例について説明す
る。
Next, a second embodiment of the present invention will be described.

【0027】図7は本発明の第2実施例を示す発光ダイ
オード(発光ダイオードアレイの発光部)の第1工程の
概略平面図、図8はその発光ダイオードの第1製造工程
の断面図であり、図8(a)は図7のa−a線断面図、
図8(b)は図7のb−b線断面図、図9はその発光ダ
イオードの第2製造工程の説明図であり、図9(a)は
図7のa−a線に沿った断面図、図9(a)は図7のb
−b線に沿った断面図、図10はその発光ダイオードの
第3製造工程の説明図であり、図10(a)は図7のb
−b線に沿った断面図、図10(b)は図10(a)の
平面図である。
FIG. 7 is a schematic plan view of a first step of a light emitting diode (light emitting portion of a light emitting diode array) showing a second embodiment of the present invention, and FIG. 8 is a sectional view of a first manufacturing step of the light emitting diode. FIG. 8A is a sectional view taken along line aa of FIG.
8B is a cross-sectional view taken along the line bb of FIG. 7, FIG. 9 is an explanatory diagram of a second manufacturing process of the light emitting diode, and FIG. 9A is a cross section taken along the line aa of FIG. FIG. 9 (a) is a view of FIG.
FIG. 10 is a cross-sectional view taken along the line -b, FIG. 10 is an explanatory view of a third manufacturing process of the light emitting diode, and FIG.
FIG. 10B is a cross-sectional view taken along line -b, and FIG. 10B is a plan view of FIG.

【0028】以下、その発光ダイオードの製造方法を説
明する。
Hereinafter, a method for manufacturing the light emitting diode will be described.

【0029】(1)図8(a)及び図8(b)に示すよ
うに、n型GaAs1-X X エピタキシャル基板31へ
拡散防止膜(Al2 3 膜)32を2000Å膜付け
し、拡散開口部32a及び電極パターン形状にあわせて
拡散防止膜であるAl2 3 膜パターン(張り出し部)
33をホトリソグラフィーにより形成する。この場合
は、電極幅が拡散深さの2倍よりも幅の狭い電極が望ま
しい。
(1) As shown in FIGS. 8 (a) and 8 (b), an anti-diffusion film (Al 2 O 3 film) 32 is formed on an n-type GaAs 1-X P X epitaxial substrate 31 by 2000 μm. An Al 2 O 3 film pattern (extending portion) as a diffusion preventing film according to the diffusion opening 32a and the electrode pattern shape
33 is formed by photolithography. In this case, an electrode whose electrode width is smaller than twice the diffusion depth is desirable.

【0030】(2)次に、図9(a)及び図9(b)に
示すように、拡散保護膜34を膜付けした後、封管法に
よる気相拡散によりZn拡散領域35を形成する。
(2) Next, as shown in FIGS. 9A and 9B, after a diffusion protective film 34 is formed, a Zn diffusion region 35 is formed by vapor phase diffusion by a sealed tube method. .

【0031】(3)次に、図10(a)及び図10
(b)に示すように、拡散保護膜34除去後、前工程で
拡散開口部32a内の一部領域に、横方向拡散により形
成した部分にあわせてp側電極であるAl電極36のコ
ンタクトを形成する。後の工程は第1実施例と同様なの
で省略する。この場合、Al電極36のコンタクト幅は
前記横方向拡散により形成したAl2 3 膜パターン
(張り出し部)33の幅より狭いことが望ましい。
(3) Next, FIGS. 10A and 10
As shown in (b), after removing the diffusion protective film 34, a contact of the Al electrode 36 which is a p-side electrode is made in a partial region in the diffusion opening 32a in the previous step in accordance with the portion formed by the lateral diffusion. Form. Subsequent steps are the same as in the first embodiment, and a description thereof will be omitted. In this case, it is desirable that the contact width of the Al electrode 36 is narrower than the width of the Al 2 O 3 film pattern (extended portion) 33 formed by the lateral diffusion.

【0032】以上、第1及び第2実施例では気相拡散に
よるZn拡散の例を述べたが、固相拡散によるZn拡散
でもよい。
In the first and second embodiments, examples of Zn diffusion by vapor phase diffusion have been described. However, Zn diffusion by solid phase diffusion may be used.

【0033】図11及び図12はその固相拡散によるZ
n拡散の説明図である。
FIG. 11 and FIG.
It is explanatory drawing of n diffusion.

【0034】例えば、図11に示すように、拡散源膜
(ZnドープSiO2 膜)42の下にSiO2 膜41を
設け、n型化合物半導体基板40にZn拡散する。な
お、43はアニールキャップである。あるいは、図12
に示すように、Znドープ量の低い拡散源膜(Si
2 )46を部分的に用いるような例が可能である。な
お、47はZnドープ量の高い拡散源膜(SiO2 )、
48はアニールキャップである。ただし、この場合でも
電極下のn型化合物半導体基板45表面のZn濃度が周
囲のZn濃度より低くなるように条件を選択する必要が
ある。
For example, as shown in FIG. 11, an SiO 2 film 41 is provided under a diffusion source film (Zn-doped SiO 2 film) 42, and Zn is diffused into an n-type compound semiconductor substrate 40. Reference numeral 43 denotes an annealing cap. Alternatively, FIG.
As shown in the figure, a diffusion source film (Si
An example in which O 2 ) 46 is partially used is possible. 47 is a diffusion source film (SiO 2 ) with a high Zn doping amount,
Reference numeral 48 denotes an annealing cap. However, even in this case, it is necessary to select conditions so that the Zn concentration on the surface of the n-type compound semiconductor substrate 45 under the electrode is lower than the surrounding Zn concentration.

【0035】また、上記実施例では電極と基板間に一層
のAl2 3 膜が存在する例について述べたが異種材料
の膜を積層して層間絶縁膜としても効果は変わらないこ
とは明らかである。
In the above embodiment, an example in which one layer of Al 2 O 3 film is present between the electrode and the substrate has been described. However, it is apparent that the effect is not changed even if a film of a different material is laminated as an interlayer insulating film. is there.

【0036】また、n型GaAs1-X X 基板以外のG
aAs、GaP、AlGaAs等の化合物半導体基板へ
Znを拡散して製造するLEDアレイに対しても、本発
明が適用できることも明らかである。
In addition, G other than the n-type GaAs 1-X P X substrate
It is apparent that the present invention can be applied to an LED array manufactured by diffusing Zn into a compound semiconductor substrate such as aAs, GaP, or AlGaAs.

【0037】なお、本発明は上記実施例に限定されるも
のではなく、本発明の趣旨に基づいて種々の変形が可能
であり、これらを本発明の範囲から排除するものではな
い。
It should be noted that the present invention is not limited to the above-described embodiment, and various modifications are possible based on the spirit of the present invention, and these are not excluded from the scope of the present invention.

【0038】[0038]

【発明の効果】以上、詳細に説明したように、本発明に
よれば、以下のような効果を奏することができる。
As described above, according to the present invention, the following effects can be obtained.

【0039】(1)請求項1記載の発明によれば、拡散
領域内の一部に形成されるとともに、拡散制御膜により
形成され、そのZn表面濃度N S が5×10 18 cm -3
S <1×10 19 cm -3 である接合深さの浅い拡散層
と、この接合深さの浅い拡散層の周囲に形成される接合
深さの深い拡散層と、前記接合深さの浅い拡散層にコン
タクトをとるp側電極とを具備するようにしたので、
側電極のオーミック抵抗を良好にとることができるとと
もに、p側電極で発光領域をさえぎることなく、また、
効率よく光を取り出すことができ、発光ダイオードの発
光効率と寿命の向上を図ることができる。
(1) According to the first aspect of the present invention , the diffusion control film is formed on a part of the diffusion region.
Is formed, the Zn surface concentration N S is 5 × 10 18 cm -3 <
A shallow diffusion layer with a junction depth of N S <1 × 10 19 cm −3
And the junction formed around the diffusion layer with a shallow junction depth
The deep diffusion layer and the shallow diffusion layer
Since a p-side electrode for taking tact is provided , p
That the ohmic resistance of the side electrode can be taken well
In addition, without blocking the light emitting region with the p-side electrode,
Light can be efficiently extracted, and the luminous efficiency and life of the light emitting diode can be improved.

【0040】(2)請求項記載の発明によれば、拡散
開口部内にこの拡散開口部内の一部に形成される拡散制
御膜を形成し、深さの異なる接合領域を形成するととも
に、接合深さの浅い領域のZn表面濃度N S を5×10
18 cm -3 <N S <1×10 19 cm -3 となるように拡散領
域を形成する工程と、前記接合深さの浅い領域p側電
極のコンタクトをとる工程とを施すようにしたので、光
が遮光される電極直下の接合よりも周囲の接合領域へ電
流が流れ、効率よく光を取り出すことができる。また、
電極直下への電流集中も緩和され、寿命の向上を図るこ
とができる。
(2) According to the second aspect of the invention, the diffusion
Diffusion control formed in the opening part of this diffusion opening
A control film is formed to form junction regions with different depths.
In addition, the Zn surface concentration N S in the region where the junction depth is shallow is 5 × 10
Diffusion area so that 18 cm -3 <N S <1 × 10 19 cm -3
Forming a band. Thus subjected to a step to contact the p-side electrode to shallow the junction depth region, current flows to the surrounding joint region than the junction of the electrode directly below the light is shielded Light can be extracted efficiently. Also,
The current concentration just below the electrode is also reduced, and the life can be improved.

【0041】(3)請求項記載の発明によれば、拡散
開口部内の中央部に張り出す拡散防止膜を形成し、この
拡散防止膜の幅が拡散深さの2倍より小さい幅であり、
横方向拡散による拡散層を形成する工程と、前記拡散防
止膜を除去し、この拡散防止膜が除去された領域にp側
電極のコンタクトをとる工程とを施すようにしたので、
発光効率の向上と寿命の向上を図ることができる。
[0041] (3) According to the third aspect of the present invention, to form a diffusion preventing film that projects in the central portion of the diffusion opening, than twice the width of the <br/> diffusion preventing film diffusion depth Small width,
Since a step of forming a diffusion layer by lateral diffusion and a step of removing the diffusion prevention film and making contact with a p-side electrode in a region where the diffusion prevention film has been removed are performed ,
The luminous efficiency and the life can be improved.

【図面の簡単な説明】[Brief description of the drawings]

【図1】本発明の第1実施例を示す発光ダイオードの平
面図である。
FIG. 1 is a plan view of a light emitting diode according to a first embodiment of the present invention.

【図2】本発明の第1実施例を示す発光ダイオードの断
面図である。
FIG. 2 is a sectional view of a light emitting diode showing a first embodiment of the present invention.

【図3】本発明の第1実施例を示す発光ダイオード(発
光ダイオードアレイの発光部)の概略平面図である。
FIG. 3 is a schematic plan view of a light emitting diode (light emitting portion of a light emitting diode array) showing a first embodiment of the present invention.

【図4】本発明の第1実施例を示す発光ダイオードの製
造工程断面図である。
FIG. 4 is a cross-sectional view illustrating a manufacturing process of the light emitting diode according to the first embodiment of the present invention.

【図5】従来の発光ダイオードアレイの平面図である。FIG. 5 is a plan view of a conventional light emitting diode array.

【図6】従来の発光ダイオードアレイの断面図である。FIG. 6 is a sectional view of a conventional light emitting diode array.

【図7】本発明の第2実施例を示す発光ダイオード(発
光ダイオードアレイの発光部)の第1工程の概略平面図
である。
FIG. 7 is a schematic plan view of a first step of a light emitting diode (light emitting portion of a light emitting diode array) according to a second embodiment of the present invention.

【図8】本発明の第2実施例を示す発光ダイオードの第
1製造工程の断面図である。
FIG. 8 is a sectional view of a first manufacturing step of a light emitting diode according to a second embodiment of the present invention.

【図9】本発明の第2実施例を示す発光ダイオードの第
2製造工程の説明図である。
FIG. 9 is an explanatory diagram of a second manufacturing process of the light emitting diode according to the second embodiment of the present invention.

【図10】本発明の第2実施例を示す発光ダイオードの
第3製造工程の説明図である。
FIG. 10 is an explanatory diagram of a third manufacturing step of the light-emitting diode according to the second embodiment of the present invention.

【図11】本発明の第3実施例を示す発光ダイオードの
拡散層の形成の説明図である。
FIG. 11 is an explanatory view illustrating formation of a diffusion layer of a light emitting diode according to a third embodiment of the present invention.

【図12】本発明の第4実施例を示す発光ダイオードの
拡散層の形成の説明図である。
FIG. 12 is an explanatory view of forming a diffusion layer of a light emitting diode according to a fourth embodiment of the present invention.

【符号の説明】[Explanation of symbols]

11,21,31 n型GaAs1-X X エピタキシ
ャル基板 12,22,32 拡散防止膜(Al2 3 膜) 13,35 Zn拡散領域 13a,25a 接合深さの深い拡散層 13b,25b 接合深さの浅い拡散層 14 p側電極(Al電極) 15,27 n側電極(Au合金電極) 22a,32a 拡散開口部 23 拡散制御膜(Al2 3 膜) 24,34 拡散保護膜(PSG膜) 26,36 Al電極 33 Al2 3 膜パターン(張り出し部) 40,45 n型化合物半導体基板 41 SiO2 膜 42 拡散源膜(ZnドープSiO2 膜) 43,48 アニールキャップ 46 Znドープ量の低い拡散源膜(SiO2 ) 47 Znドープ量の高い拡散源膜(SiO2
11, 21, 31 n-type GaAs 1-X P X epitaxial substrate 12, 22, 32 Diffusion prevention film (Al 2 O 3 film) 13, 35 Zn diffusion region 13a, 25a Deep diffusion layer 13b, 25b Junction depth Diffusion layer having a shallow depth 14 P-side electrode (Al electrode) 15, 27 n-side electrode (Au alloy electrode) 22a, 32a Diffusion opening 23 Diffusion control film (Al 2 O 3 film) 24, 34 Diffusion protective film (PSG) Film) 26,36 Al electrode 33 Al 2 O 3 film pattern (overhang portion) 40,45 n-type compound semiconductor substrate 41 SiO 2 film 42 Diffusion source film (Zn-doped SiO 2 film) 43,48 Annealing cap 46 Zn doping amount Low diffusion source film (SiO 2 ) 47 High diffusion Zn source film (SiO 2 )

───────────────────────────────────────────────────── フロントページの続き (56)参考文献 特開 昭56−40285(JP,A) 特開 平5−160436(JP,A) 特開 平5−63231(JP,A) 特開 平6−314820(JP,A) 特開 平6−45643(JP,A) (58)調査した分野(Int.Cl.7,DB名) H01L 33/00 ────────────────────────────────────────────────── ─── Continuation of front page (56) References JP-A-56-40285 (JP, A) JP-A-5-160436 (JP, A) JP-A-5-63231 (JP, A) JP-A-5-63231 314820 (JP, A) JP-A-6-45643 (JP, A) (58) Fields investigated (Int. Cl. 7 , DB name) H01L 33/00

Claims (3)

(57)【特許請求の範囲】(57) [Claims] 【請求項1】 n型化合物半導体基板にZnを選択的に
拡散してなる発光ダイオードにおいて、(a) 拡散領域内の一部に形成されるとともに、拡散制
御膜により形成され、そのZn表面濃度N S が5×10
18 cm -3 <N S <1×10 19 cm -3 である接合深さの浅
い拡散層と、 (b)該接合深さの浅い拡散層の周囲に形成される接合
深さの深い拡散層と、 (c)前記接合深さの浅い拡散層にコンタクトをとるp
側電極とを具備 する発光ダイオード。
1. A light emitting diode in which Zn is selectively diffused into an n-type compound semiconductor substrate, comprising: (a) a light emitting diode formed in a part of a diffusion region ;
The Zn surface concentration N S is 5 × 10
Shallow junction depth of 18 cm −3 <N S <1 × 10 19 cm −3
And have diffusion layers, junction formed around the shallow diffusion layer of (b)該接Gofuka of
A deep diffusion layer; and (c) a p contacting the diffusion layer with a shallow junction depth.
A light emitting diode comprising a side electrode .
【請求項2】 n型化合物半導体基板にZnを選択的に
拡散してなる発光ダイオードの製造方法において、 (a)拡散開口部内に該拡散開口部内の一部に形成され
る拡散制御膜を形成し、深さの異なる接合領域を形成す
とともに、接合深さの浅い領域のZn表面濃度N S
5×10 18 cm -3 <N S <1×10 19 cm -3 となるよう
に拡散領域を形成する工程と、 (b)前記接合深さの浅い領域へp側電極のコンタクト
をとる工程とを施すことを特徴とする発光ダイオードの
製造方法。
2. A method for manufacturing a light emitting diode, wherein Zn is selectively diffused into an n-type compound semiconductor substrate, comprising: (a) forming a part of the diffusion opening in the diffusion opening;
Diffusion control film is formed that, to form the different junction regions depths, the Zn surface concentration N S shallow region junction depth
5 × 10 18 cm -3 <to the N S <1 × 10 19 cm -3
Method of manufacturing a light emitting diode for forming a diffusion region, characterized by applying the method to contact the p-side electrode to the (b) shallow region of the junction depth.
【請求項3】 n型化合物半導体基板にZnを選択的に
拡散してなる発光ダイオードの製造方法において、 (a)拡散開口部内の中央部に張り出す拡散防止膜を形
成し、該拡散防止膜の幅が拡散深さの2倍より小さい幅
であり、横方向拡散による拡散層を形成する工程と、 (b)前記拡散防止膜を除去し、該拡散防止膜が除去さ
れた領域にp側電極のコンタクトをとる工程とを施すこ
とを特徴とする発光ダイオードの製造方法。
3. A method for manufacturing a light-emitting diode, wherein Zn is selectively diffused into an n-type compound semiconductor substrate, comprising: (a) forming a diffusion prevention film projecting at a central portion in a diffusion opening; Forming a diffusion layer by lateral diffusion, the step of: (b) removing the diffusion barrier film, and adding a p-side to a region where the diffusion barrier film has been removed. Performing a step of contacting the electrodes.
JP942095A 1995-01-25 1995-01-25 Light emitting diode and method of manufacturing the same Expired - Lifetime JP3236463B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP942095A JP3236463B2 (en) 1995-01-25 1995-01-25 Light emitting diode and method of manufacturing the same

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Application Number Priority Date Filing Date Title
JP942095A JP3236463B2 (en) 1995-01-25 1995-01-25 Light emitting diode and method of manufacturing the same

Publications (2)

Publication Number Publication Date
JPH08204231A JPH08204231A (en) 1996-08-09
JP3236463B2 true JP3236463B2 (en) 2001-12-10

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Country Status (1)

Country Link
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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7768021B2 (en) 2005-12-13 2010-08-03 Canon Kabushiki Kaisha Light emitting element array and image forming apparatus

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7768021B2 (en) 2005-12-13 2010-08-03 Canon Kabushiki Kaisha Light emitting element array and image forming apparatus

Also Published As

Publication number Publication date
JPH08204231A (en) 1996-08-09

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