JP3228247B2 - FET amplifier and spurious optimization method thereof - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an FET (field effect transistor) amplifier and a method for optimizing the spurious thereof, and more particularly, to the optimization of the spurious of an FET amplifier for class-A amplifying an RF (high frequency) signal having a variable range in frequency. The present invention relates to a spurious optimization method for an FET amplifier to be changed.

[0002]

2. Description of the Related Art Conventionally, in order to reduce spurious response of an FET amplifier, it is general to adjust the frequency at the center frequency of an amplification frequency band. In practice, no special optimization circuit is provided. is there. Also, instead of performing class A amplification in order to reduce the spurious of the FET amplifier, a feedforward method is widely used.

[0003]

However, in the FET amplifier which performs spurious adjustment at the center frequency of the amplification frequency band as described above, there is a problem that spurious increases when the frequency is changed. In an amplifier using a feedforward system, in addition to an amplifier for amplifying an RF signal, an F for suppressing spurious is also used.
There is a problem that an ET amplifier is required, and the circuit becomes complicated and expensive.

The present invention has been made in view of the above-mentioned problems of the prior art, and has as its object to optimize spurious response to frequency changes with a simple configuration. An object of the present invention is to provide an FET amplifier and a spurious optimization method thereof.

[0005]

SUMMARY OF THE INVENTION An FET amplifier according to the present invention is an FET amplifier using an FET as an amplifying element, and includes a frequency for generating a frequency signal to be amplified.
PLL (Phase Locked) used for the local oscillator of the converter
Loop) VCO (voltage controlled oscillation) of the synthesizer oscillator
Vessels) using the control voltage, see contains a control means for controlling the drain current of the FET, the control means, spurious
A frequency-voltage characteristic preset to be optimal is obtained.
Voltage conversion means for converting the VCO control voltage so that
And the output of the voltage conversion means is connected to the gate of the FET.
To control the drain current using bias
Characterized in that it was.

[0006]

Further, prior Symbol FET amplifier is characterized by having a class A RF amplification function.

[0008] spurious optimization method according to the present invention is a spurious optimization methods FET amplifier using an FET as an amplifying element, a frequency signal to be amplified
Used for generating frequency converter local oscillator
Using the VCO control voltage of the PLL synthesizer oscillator ,
Look including the step of controlling the drain current of the FET,
The steps are pre-configured to optimize spurs.
VCO control to obtain a specified frequency-voltage characteristic
Converting the control voltage and outputting the converted output to the FE
Controls the drain current using the gate bias of T
And the step of performing .

[0009]

The operation of the present invention will be described. The spurious is optimized by controlling the drain current of the FET element of the RF A-class FET amplifier using a control voltage proportional to the frequency to be amplified. Specifically, a VCO control voltage of a PLL synthesizer oscillator used for a local oscillator is taken out as a control voltage proportional to a frequency to be amplified, and a pre-measured frequency of a gate bias voltage at which spurious of an FET amplifier becomes optimal. The voltage conversion of the VCO control voltage is performed using a voltage conversion circuit that matches the characteristics. By using the converted voltage as the gate bias of the FET amplifier, the drain current of the FET amplifier is controlled and the spurious is optimized.

[0011]

Embodiments of the present invention will be described below with reference to the drawings. FIG. 1 shows the FET of the present invention.
FIG. 1 is a schematic system diagram of a transmitter showing an embodiment of a spurious optimization circuit of an amplifier. As shown in FIG. 1, a modulator 1, a frequency converter 2 for converting this modulation output to an RF frequency, and an F-class amplifier for class-A amplifying this RF signal to obtain a transmission signal
An ET amplifier 3, a PLL synthesizer oscillator 4 functioning as a local oscillator of the frequency converter 2 and capable of outputting a VCO voltage, and converting the VCO voltage into an optimum gate voltage in accordance with spurious frequency characteristics to the FET amplifier 3 And a voltage converter 5 for outputting.

The operation of the spurious optimization circuit of the FET amplifier configured as described above will be described below.
The modulation signal output of the modulator 1 is combined with the local oscillation signal LO of the PLL synthesizer oscillator 4 by the frequency converter 2 and converted into a target RF frequency signal, amplified by the FET amplifier 3 to a desired transmission power, and output. You. The VCO voltage output of the PLL synthesizer oscillator 4 is converted by the voltage converter 5 into a gate voltage that minimizes the spurious of the FET amplifier, which is measured in advance, and is supplied as the gate voltage of the FET amplifier 3. By adjusting the gate voltage, the drain current of the FET amplifier 3 is adjusted.

FIG. 2 shows a measurement example of the frequency versus spurious characteristics of the FET amplifier 3. Generally, the FET amplifier 3 has a spurious characteristic versus frequency as shown in FIG.
It is recognized that the drain current is pushed lower as shown in the IMD characteristic 7 at the time of adjustment, as compared with the IMD characteristic 6 at the time of no adjustment. In addition, “IMD” (IntermodulationDis
tortion) is a two-signal characteristic of an amplifier which is generally used as an index of spurious characteristics.

The gate bias which minimizes the IMD has a frequency characteristic 8 as shown in FIG.
The drain current that minimizes MD has a frequency characteristic 9 as shown in FIG. The VCO voltage of the PLL synthesizer oscillator 4 is proportional to the frequency, and the voltage converter 5
By converting the VCO voltage of the LL synthesizer oscillator 4 so as to match the frequency characteristic 8 of the gate bias and applying the converted voltage as the gate voltage of the FET amplifier 3, the drain current of the FET amplifier 3 is controlled to minimize the IMD. .

[0015]

As described above, according to the present invention,
Utilizing the VCO voltage of the PLL synthesizer oscillator,
By converting the CO voltage to a gate voltage that minimizes the pre-measured FET amplifier spurs, F
There is an effect that the spurious frequency characteristics of the ET amplifier can be optimized. In addition, since the conventional transmitter can be easily realized by adding a voltage conversion circuit, the spurious frequency characteristics of the FET amplifier can be optimized at a low cost.

[Brief description of the drawings]

FIG. 1 is a system diagram of a transmitter to which an embodiment of an FET amplifier according to the present invention is applied.

FIG. 2 is a diagram illustrating frequency versus spurious characteristics of an FET amplifier.

FIG. 3 is a diagram showing a gate bias characteristic that minimizes spurious of an FET amplifier.

FIG. 4 is a diagram showing a drain current characteristic that minimizes spurious of an FET amplifier.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 Modulation signal generator 2 Frequency converter 3 FET amplifier 4 PLL synthesizer oscillator 5 Voltage converter 6 IMD frequency characteristic when drain current is not adjusted 7 Frequency characteristic of IMD when drain current is adjusted 8 Gate bias for minimizing IMD Frequency characteristics 9 Frequency characteristics of drain current to minimize IMD

Claims (3)

(57) [Claims] 1. An FET using an FET as an amplifying element.
Amplifier to generate frequency signal to be amplified
PLL synthesizer used for local oscillator of frequency converter
With VCO control voltage sizer oscillator, look including control means for controlling the drain current of the FET, the control unit may pre-set so spurious becomes optimum
VCO control to obtain a specified frequency-voltage characteristic
A voltage conversion means for converting the control voltage;
Using the output of the stage for the gate bias of the FET,
F, characterized in that the drain current is controlled.
ET amplifier. 2. The FET amplifier has a class A RF amplification function.
Claim 1, wherein the FET amplifier, characterized in that it comprises. 3. An FET using an FET as an amplifying element.
A spurious optimization method for an amplifier,
Localization of frequency converter to generate power frequency signal
Control of PLL Synthesizer Oscillator Used for Vibrator
Controlling the drain current of the FET using a control voltage
And the steps are pre-configured to optimize spurs.
VCO control to obtain a specified frequency-voltage characteristic
Converting the control voltage and outputting the converted output to the FE
Controls the drain current using the gate bias of T
A spurious rejection step.
Optimization method.