JP3224505B2 - Liquid crystal control device and liquid crystal display device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a liquid crystal control device such as a portable personal computer using a liquid crystal display device and a liquid crystal display device.

A liquid crystal display device using a TFT (referred to as a TFT liquid crystal display device) or a liquid crystal display device using an STN liquid crystal (referred to as an STN liquid crystal display device) is used for protecting circuit elements for driving liquid crystal. For this reason, a clock signal (referred to as a clock (CLK)), a data signal (referred to as a data (DATA)), a horizontal synchronizing signal (Hs) within a predetermined time after the application of the liquid crystal driving power supply Vdd (= 5 volts).
sync, a vertical synchronizing signal (referred to as Vsync), and a data enable signal (referred to as DE). In addition, even when the power supply is stopped, it is necessary to stop the supply of the liquid crystal drive power supply Vdd within a predetermined time after the input of the liquid crystal drive signal is completed.

[0003]

2. Description of the Related Art FIG. 10 shows a conventional liquid crystal control device and a conventional liquid crystal display device. In FIG. 10, reference numeral 111 denotes an AC adapter, which converts a 100-volt commercial AC power supply into a 17-volt DC voltage.

Reference numeral 112 denotes a battery (battery voltage varies in the range of 8 to 17 volts). 113 is D
/ D converter that converts an input voltage of 8 volts to 17 volts into a power supply voltage Vdd for driving circuit elements and liquid crystal.
(5 volts) and Vee (30 volts (color) or -20 volts (black and white)) required for the STN type liquid crystal display device and output.

[0005] Reference numeral 114 denotes a liquid crystal display device. Reference numeral 115 denotes a liquid crystal drive circuit. 121 is a liquid crystal control device.

Reference numeral 122 denotes a sequence control circuit, which is a timing for starting supply of the power supply voltage Vdd of the liquid crystal display device and a liquid crystal drive signal (the liquid crystal drive signal is clock, data, H
sync, Vsync, DE, * DISPOFF, etc.)
It also controls the timing of stopping the supply of the power supply voltage Vdd and stopping the liquid crystal drive signal. The sequence control circuit 122 includes a liquid crystal control circuit 123 and a main body logic unit 125.
And the * DISPOFF (display end signal) and the DE signal are generated to control the liquid crystal drive circuit 115.

A liquid crystal control circuit 123 includes a clock,
It controls input of data, Hsync, Vsync, and DE to the liquid crystal display device. Reference numeral 125 denotes a main body logic unit.

The operation of the configuration shown in FIG. 10 will be described. The power switch is turned on, and the D / D converter 113 starts operating. The power supply voltage Vdd (5 V) is supplied from the D / D converter to the liquid crystal drive circuit 115, the main body logic unit 125, the sequence control circuit 122, and the liquid crystal control circuit 123, and each operation starts (in FIG. 10, except for the liquid crystal drive circuit 115). Vdd signal line is omitted). Also,
The liquid crystal control circuit 123 supplies a clock, data, DE, Hsync, and Vsync to the liquid crystal drive circuit 115 under the control of the main body logic unit 125, and displays the data. The main body logic unit 125 sets * DISPOFF to H to activate the liquid crystal drive circuit 115. When the power switch is turned off, the main body logic unit 125 detects this fact, notifies the sequence control circuit 122, and sets * DISPOF.
Let F be L. At the same time, the liquid crystal control circuit 123 is controlled to stop the input of the liquid crystal drive signal from the liquid crystal drive circuit 115 to the liquid crystal display device 114. The sequence control circuit 122 controls the D / D converter 113 so as to stop the supply of Vdd (5 V) to the liquid crystal drive circuit 115 within a certain time after the supply of each drive signal to the liquid crystal drive circuit 115 is stopped. I do.

FIG. 11 is a diagram for explaining the operation of the conventional liquid crystal drive control device (see FIG. 10 in the description of FIGS. 11 (a) and 11 (b)). FIG. 11A is a time chart showing conditions necessary for the operation of the TFT type liquid crystal display device.

Vdd is a power supply voltage supplied to the liquid crystal display device (Vdd is common to a power supply voltage supplied to other circuits such as the main logic unit 125). LCD drive circuit 11
It is necessary that the start time a of the application of the liquid crystal drive signal (clock, data, Hsync, Vsync) after the application of Vdd (5V) to 5 starts is within 10 ms or within 50 ms. When the power supply is stopped, the clock, data, Hsync, Vsync to the liquid crystal drive circuit 115 are supplied.
After the application of c is completed, Vd to the liquid crystal drive circuit 115 is
The time b until the supply of d is stopped is within 10 ms or
It must be within 50 ms.

FIG. 11B is a time chart showing conditions necessary for the operation of the STN type liquid crystal display device. Vdd is a power supply voltage supplied to the liquid crystal display device (common to power supply voltages supplied to other circuit units).

Vee is the voltage applied to the liquid crystal, which is 30 volts for color and -20 volts for black and white. After the application of Vdd to the liquid crystal drive circuit 115 is started, the liquid crystal drive signals (clock, data, Hsync, Vsync)
sync) and the application of Vee must be started (c ≧ 0 ms), and the liquid crystal drive signal (clock, data, H
* DISPOFF needs to be turned off after the start of the application of (sync, Vsync) and Vee (c <
d). When stopping the power supply, first use * DISPO
After the FF is turned off, the application of the liquid crystal drive signals (clock, data, Hsync, Vsync) and Vee to the liquid crystal drive circuit needs to be terminated (e ≦ f). Further, the liquid crystal driving signals (clock, data, Hsync, V
sync) and the application of Vee must be stopped after the application of Vee is stopped (e ≧ 0).
ms). When the power is further turned on, * DISPO is applied after the application of Vdd and Vee to the liquid crystal drive circuit is started.
FF needs to be applied.

[0013]

FIG. 12 is an explanatory diagram of a problem to be solved by the invention. FIG. 12A is a timing chart of supply of each signal to the liquid crystal display device.

After 5 ms from the start of the supply of Vdd, Hsync and Vsync are supplied, and Hsync and Vsync are supplied.
This shows a state in which the supply of clock, DE, and data is started 200 ms after the supply of sync is started. When the power switch is turned off, the clock, DE, data, Hsync,
The supply of Vsync is stopped.

In the case of FIG. 12A, the clock, DE, data, Hsync,
Since the supply of Vsync is stopped, the operation timing when the power supply voltage is off satisfies the timing condition of FIG. However, when the power switch is turned on, the supply of the clock, DE, and data is started after a lapse of 205 ms from the start of the supply of Vdd, so that the conditions for applying each signal in FIG. 11 are not satisfied.

FIG. 12B shows the liquid crystal driving signals (clock, DE, 205) after 205 ms from the start of the supply of Vdd.
Data, Hsync, Vsync), and Vd
The clock, DE, data, Hs
This shows a state in which the supply of sync and Vsync is stopped.

Also in the case of FIG. 12B, the timing of another signal with respect to the stop of the supply of Vdd satisfies the condition of FIG. 11B, but after the start of the supply of Vdd, 205
After ms, the liquid crystal drive signals (clock, DE, data, Hs
(sync, Vsync) is supplied, so that the conditions required for the timing of each signal in FIG. 11 are not satisfied.

When designing an electronic apparatus having a liquid crystal display device, it is necessary to design the main body logic section, the sequence control circuit, and the liquid crystal control circuit so as to satisfy the conditions shown in FIG. As described above, the timing of each signal is given, and the liquid crystal display device may not operate properly or the circuit elements of the liquid crystal display device may be destroyed.

An object of the present invention is to provide a liquid crystal control device that automatically satisfies the above-mentioned operating conditions without considering the above-mentioned conditions in the design of an electronic device having a liquid crystal display device.

[0020]

SUMMARY OF THE INVENTION The present invention relates to a liquid crystal control device for a liquid crystal display device in which a liquid crystal control signal needs to be input within a predetermined time after power supply is started. And a dummy signal generation unit for generating a dummy liquid crystal control signal within the above-mentioned fixed time from the start of power supply to the liquid crystal display and inputting the signal to the liquid crystal display device.

FIG. 1 is a diagram showing a basic configuration of the present invention.
In FIG. 1, reference numeral 1 denotes a power supply unit.

Reference numeral 2 denotes a liquid crystal display device. 3 is a liquid crystal control device. Numeral 4 denotes a dummy signal generator, which is a dummy liquid crystal drive signal (for example, the entire screen is black) so as to satisfy the conditions of the start of the supply of Vdd to the liquid crystal display device 2 and the start of the supply of the liquid crystal drive signal. Signal, etc.).

A liquid crystal controller 5 supplies a liquid crystal driving signal (clock, data, Hsync, Vsync, etc.) to the liquid crystal display device 2. Reference numeral 6 denotes a main body logic unit.

Reference numeral 7 denotes a signal selection unit which receives a dummy liquid crystal drive signal (dummy signal) and an original liquid crystal drive signal (clock, data, Hsync, Vsync, etc.) on the main body side, and receives the original liquid crystal drive signal. When there is no input, a dummy liquid crystal drive signal is output. When there is an input of an original liquid crystal drive signal, an original liquid crystal control signal is selected and output.

The operation of the basic configuration of the present invention shown in FIG. 1 will be described. When the power switch is turned on, the power supply unit 1 starts supplying power (Vdd) to each unit such as the liquid crystal display device 2 and the liquid crystal control device 3.

When the supply of the power supply voltage Vdd is started, the dummy signal generation section 4 satisfies the conditions of the application of the power supply voltage Vdd and the start of the input of the liquid crystal drive signal, for example, a black dummy for the entire screen. A liquid crystal drive signal is generated and supplied to the liquid crystal display device 2. The supply of the dummy signal is stopped when a liquid crystal drive signal is generated from the liquid crystal control unit 5. Alternatively, the output may be continued until the supply of Vdd is stopped. In that case, the color level of the liquid crystal drive signal is adjusted in consideration of the dummy signal. Alternatively, a signal selection unit 7 is provided so that the dummy signal and the original liquid crystal drive signal of the main body are input to the signal selection unit 7, and if there is no input of the original liquid crystal drive signal, the dummy liquid crystal drive signal is output. When there is an input of the original liquid crystal drive signal, the original liquid crystal control signal may be selected, output, and supplied to the liquid crystal display device 2.

When the supply of the power supply voltage Vdd to each unit is stopped by turning off the power switch, the generation of the liquid crystal drive signal and the generation of the dummy signal are also stopped at the same time. FIG. 2 shows an example of a time chart of the operation of the basic configuration of the present invention.

In FIG. 2, Vdd is a power supply voltage for the liquid crystal display device and other circuit portions. The dummy signal is an output of the dummy signal generator 4.

Clock, DE, data, Hsync, V
“sync” is a liquid crystal drive signal output from the liquid crystal control unit 5. In FIG. 2, when the supply of Vdd from the power supply unit 1 is started, the dummy signal generation unit 4 generates a dummy signal and supplies it to the liquid crystal display device 2 or the signal selection unit 7. And V
205 ms after the start of the supply of dd, the clock, DE,
This shows a state where data, Hsync, and Vsync are supplied to the liquid crystal display device 2. Further, the supply of Vdd from the power supply unit 1 is stopped, and the operation of the dummy signal generation unit 4 and the liquid crystal control unit 5 is stopped, so that the dummy signal, clock, DE, data, H
The supply of sync and Vsync is stopped.

In the case of FIG. 2, the relationship between the application timing of Vdd and the application of the timings of clock, DE, data, Hsync, and Vsync does not satisfy the design conditions.
Since the dummy signal satisfies the condition, the liquid crystal display device 2 operates normally.

[0031]

FIG. 3 shows a first embodiment of the present invention.
In FIG. 3, reference numeral 20 denotes a power supply unit.

Reference numeral 21 denotes an AC adapter. 22 is a battery. 23 is a D / D converter.

Reference numeral 24 denotes a liquid crystal display device. 25 is a liquid crystal drive circuit. 31 is a dummy signal generator.

Reference numeral 32 denotes a dummy signal generation circuit which generates a dummy signal. Reference numeral 33 denotes a signal selection circuit (corresponding to the signal selection unit 7 in FIG. 1), which is a liquid crystal drive signal (clock, DE, data, Hsync, Vsync) output from the liquid crystal control circuit 34 (original liquid crystal drive signal).
Is determined, and if there is no original liquid crystal drive signal, a dummy signal output from the dummy signal generation circuit 32 is selected and output. If there is an original liquid crystal drive signal, the original liquid crystal drive signal is output. The signal is selected and output.

A liquid crystal control circuit 34 outputs a liquid crystal drive signal (corresponding to the liquid crystal control unit in FIG. 1). Reference numeral 35 denotes a main body logic unit.

The operation of the configuration of the first embodiment of the present invention shown in FIG. 3 will be described. D / D by turning on power switch (not shown)
Converter 23 converts the output (17 volts) of AC adapter 21 or the output (8 to 17 volts) of battery 22 to Vdd (5 volts) and outputs the same. Further, if necessary, the input voltage is changed to Vee (30 volts or -2 volts).
0 volts) and output.

The power supply voltage Vdd supplied by the D / D converter 23 is controlled by the liquid crystal drive circuit 25, the main body logic unit 35, the liquid crystal control circuit 34, the signal selection circuit 33, and the dummy signal generation circuit 3.
2 and each circuit starts operating. Upon receiving the power supply Vdd, the dummy signal generation circuit 32 generates dummy liquid crystal drive signals (clock, DE, data, Hsyn).
c, Vsync) and outputs it to the signal selection circuit 33. The signal selection circuit 33 outputs a dummy signal to the liquid crystal drive circuit 25 when there is no input of the original liquid crystal drive signal from the liquid crystal control circuit 34.

The main body logic unit 35 and the liquid crystal control circuit 34 have Vd
The operation is started by receiving the supply of d, and the main body logic unit 35 transmits the original liquid crystal drive signals (clock, DE, data,
Hsync, Vsync) and the liquid crystal control circuit 34
Is output to the signal selection circuit 33. When determining the input of the original liquid crystal drive signal from the liquid crystal control circuit 34, the signal selection circuit 33 selects the original liquid crystal drive signal and outputs it to the liquid crystal drive circuit 25.

When the power switch is turned off, the D / D converter 23 stops outputting Vdd (Vee also stops). Therefore, the power supply to each part of the device is stopped, and the generation of the dummy signal and the original liquid crystal drive signal is also stopped.

FIG. 4 shows an embodiment of the dummy signal generator of the present invention. In FIG. 4, reference numeral 23 denotes a D / D converter.

Reference numeral 31 denotes a dummy signal generation unit. 32 is a dummy signal generation circuit. 33 is a signal selection unit.

Reference numeral 34 denotes a liquid crystal control circuit. Reference numeral 35 denotes a main body logic unit. In the signal selection unit 33, reference numeral 38 denotes a determination circuit which determines the input of the original liquid crystal drive signal supplied from the liquid crystal control circuit 34.

Reference numeral 39 denotes a multiplexer which outputs a dummy signal output from the dummy signal generating circuit 32 when there is no input of the original liquid crystal drive signal, and outputs a dummy signal when there is an input of the original liquid crystal drive signal. It selects and outputs an original liquid crystal drive signal.

Reference numeral 41 denotes a crystal oscillator for generating a clock signal. In FIG. 3, Vdd output from the D / D converter 23 is a dummy signal generator 31.
Circuit units (crystal oscillator 41, dummy signal generation circuit 3)
2, the multiplexer 39 and the judgment circuit 38). Vdd is a main body logic unit 35 and a liquid crystal control circuit 34.
(Signal lines for the power supply are not shown).

The operation of the configuration shown in FIG. 4 will be described. When the power switch is turned on, the D / D converter 23 starts operating,
Output Vdd (5 volts) and Vee if necessary. Upon receiving the supply of Vdd generated by the D / D converter 23, each circuit unit (the crystal oscillator 41, the dummy signal generation circuit 3
2, the liquid crystal control circuit 34) starts operation, and inputs a clock generated by the crystal oscillator 41. The dummy signal generation circuit 32 generates a dummy liquid crystal drive signal and inputs the signal to the multiplexer 39. Also, the original liquid crystal drive signals (clock, Hsync, Vs
yn, DE, data) are input to the multiplexer 39.

The determination circuit 38 determines whether or not an original liquid crystal drive signal has been input from the liquid crystal control circuit 34. The multiplexer 39 includes a main body logic unit 35, and the liquid crystal control circuit 34 includes Vdd.
Immediately after is applied and when no liquid crystal driving signal is input, a dummy liquid crystal driving signal is output to the liquid crystal driving circuit (see FIG. 3) in accordance with the result of the judgment by the judgment circuit 38. When a sufficient time has elapsed after the supply of Vdd and the original liquid crystal drive signal is output from the liquid crystal control circuit 34, the judgment circuit 38 judges the input of the original liquid crystal drive signal, and the judgment result According to the multiplexer 3
Reference numeral 9 selects an original liquid crystal drive signal output from the liquid crystal control circuit 34 and outputs it to the liquid crystal drive circuit.

FIG. 5 is a time chart (TFT type liquid crystal display device) according to the first embodiment of the present invention. V represents a voltage of +8 to 17 volts input from the AC adapter or battery to the D / D converter.

Vdd is a power supply voltage (5 volts) output from the D / D converter 23. The dummy signal is a signal output from the dummy signal generation circuit 32.

Clock, DE, data, Hsync, V
“sync” is a liquid crystal drive signal output from the liquid crystal control circuit 34. The judgment circuit output is an output of the judgment circuit 38.

The multiplexer output is the multiplexer 39
Is the output of The power supply voltage Vdd output from the D / D converter 23 is supplied to the liquid crystal drive circuit 34 and the crystal oscillator 4
1, supplied to each circuit section such as the dummy signal generation circuit 32. Then, upon receiving the supply of Vdd, the crystal oscillator 41 starts operating, and the dummy signal generation circuit 32 outputs a dummy liquid crystal drive signal. After that, the main liquid crystal drive signals (clock, DE,
Data, Hsync, Vsync) are output.

When the power switch is turned off and the output of the D / D converter 23 is stopped, each circuit unit stops operating at the same time, and the original liquid crystal drive signal and the dummy liquid crystal drive signal are also turned off.

FIG. 6 is a time chart according to the first embodiment of the present invention (in the case of an STN type liquid crystal display device). In FIG. 6, a signal of V = + 8 to 17 volts, Vdd, crystal oscillator output, dummy signal, clock, DE, data, Hsyn
The signals of c, Vsync, the output of the judgment circuit, and the output of the multiplexer are the same as those in FIG.

In the case of the STN type liquid crystal display device, D / D
At the same time when the supply of Vdd is started by the converter 23, the Vee signal for liquid crystal control (30 volts for a color liquid crystal, -20 volts for a black and white liquid crystal (FIG. 6 shows the case of black and white)) and * DISPOFF (display Control signal for turning on and off).

When the power switch is turned off, the supply of Vdd is stopped and Vee is set to L at the same time.
* DISPOFF is also L. Except for this point, the timing relationship of each signal is the same as in FIG.

FIG. 7 shows a second embodiment of the present invention. FIG. 7 shows a configuration in which a power supply circuit for a liquid crystal display device and a liquid crystal dummy signal generator are provided inside the liquid crystal display device.

In FIG. 7, reference numeral 45 denotes a liquid crystal power supply circuit, which is a power supply circuit of the liquid crystal display device 24. 7, the same reference numerals as those in FIG. 3 or FIG. 4 denote the same parts.

In the operation of the configuration shown in FIG. 7, when the power switch of the main body is turned on, the D / D converter starts operating.
Outputs Vdd (5 volts). The liquid crystal power supply circuit 45 includes an AC adapter 21 and a battery 22 on the main body side.
Is supplied from the D / D converter 23 to Vdd
And supplies Vdd (5 volts) to each part of the liquid crystal display device 24. If necessary, Vee is further supplied to the liquid crystal drive circuit 25. Then, in the liquid crystal display device 24, the crystal oscillator 41, the dummy signal generating circuit 32, the judging circuit 38, and the multiplexer 39 operate to input the dummy signal and the original liquid crystal drive signal, and the original signal immediately after the power switch is turned on. When there is no liquid crystal drive signal, a dummy signal is output to the liquid crystal drive circuit 25. In addition, the liquid crystal power supply circuit 45 is simultaneously turned off when the power supply of the D / D converter 23 is stopped.
Also stops the operation, and stops the generation of the dummy signal and the generation of the original liquid crystal drive signal.

FIG. 8 is a time chart according to the second embodiment of the present invention (TFT type liquid crystal display device). In FIG. 8, Vd
d is the output voltage (5 volts) from the D / D converter, and Vdd is the output voltage (5 volts) of the liquid crystal power supply circuit.
It is. Other signals are the same as those in FIG. Also,
The operation of each signal is as described above.

FIG. 9 is a time chart according to the second embodiment of the present invention (STN type liquid crystal display device). In FIG. 9, Vd
d is the output voltage (5 volts) from the D / D converter, and Vdd is the output voltage (5 volts) of the liquid crystal power supply circuit.
It is. Other signals are the same as those in FIG. Also,
The operation of each signal is as described above.

[0060]

According to the present invention, a dummy liquid crystal drive signal is generated at the same time as the start of the supply of the power supply voltage Vdd to the liquid crystal display device. Therefore, the supply of the liquid crystal drive signal within a predetermined time from the start of the supply of the power supply voltage Vdd. This facilitates the design of a control circuit for a liquid crystal display device that requires the above.

As a result, the load on the design of the electronic device having the liquid crystal display device is reduced, the application of the power supply voltage Vdd to the liquid crystal display device and the design error of the application timing of the liquid crystal drive signal can be eliminated, and the reliability of the electronic device can be reduced. Performance can be improved.

[Brief description of the drawings]

FIG. 1 is a diagram showing a basic configuration of the present invention.

FIG. 2 is a diagram showing an example of a time chart of the operation of the basic configuration of the present invention.

FIG. 3 is a diagram showing a first embodiment of the present invention.

FIG. 4 is a diagram showing an embodiment of a dummy signal generator of the present invention.

FIG. 5 is a diagram showing a time chart of Example 1 of the present invention (in the case of a TFT type liquid crystal display device).

FIG. 6 is a diagram showing a time chart of Embodiment 1 of the present invention (in the case of an STN type liquid crystal display device).

FIG. 7 is a diagram showing a second embodiment of the present invention.

FIG. 8 is a diagram showing a time chart of Example 2 of the present invention (in the case of a TFT type liquid crystal display device).

FIG. 9 is a diagram showing a time chart of Embodiment 2 of the present invention (in the case of an STN-type liquid crystal display device).

FIG. 10 is a diagram showing a conventional liquid crystal control device.

FIG. 11 is a diagram illustrating the operation of a conventional liquid crystal control device.

FIG. 12 is an explanatory diagram of a problem to be solved by the invention.

[Explanation of symbols]

 1: Power supply unit 2: Liquid crystal display device 3: Liquid crystal control device 4: Dummy signal generation unit 5: Liquid crystal control unit 6: Main unit logic unit 7: Signal selection unit

──────────────────────────────────────────────────続 き Continued on the front page (58) Field surveyed (Int.Cl. ⁷ , DB name) G09G 3/00-3/38 G02F 1/133 505-580

Claims (4)

(57) [Claims] In a liquid crystal control device of a liquid crystal display device that needs to input a liquid crystal drive signal within a predetermined time after power supply is started, the liquid crystal control device includes a dummy signal generation unit and a liquid crystal control circuit.
The liquid crystal control circuit is provided with a
The dummy signal generation section is connected to a dummy signal generation circuit for generating a dummy liquid crystal drive signal when power supply to the liquid crystal display device is started, and the liquid crystal control circuit. a determination circuit input of the original liquid crystal driving signal generated in the main body Te, and a multiplexer, said multiplexer original liquid crystal driving signal of the dummy generated in the dummy signal generating circuit and the liquid crystal control circuit generates a liquid crystal driving signal, and inputs the output signal of the determination circuit, when the outputs a signal indicating that the <br/> judgment circuit does not generate the original liquid crystal drive signal, the dummy outputs a liquid crystal drive signal, when the determination circuit outputs a signal indicating that it is generating the original liquid crystal driving signal, which selects and outputs the original liquid crystal driving signals, said Signal Me signal generator is selected in the multiplexer
A liquid crystal control device characterized by outputting a liquid crystal display. 2. The liquid crystal control device according to claim 1, wherein the dummy liquid crystal drive signal generated by the dummy signal generation circuit is generated separately from an original liquid crystal drive signal. 3. A liquid crystal display device in which a liquid crystal drive signal needs to be input within a predetermined time after power supply is started, the liquid crystal control device includes a dummy signal generation unit and a liquid crystal control circuit.
The liquid crystal control circuit is provided with a
The dummy signal generation section is connected to a dummy signal generation circuit for generating a dummy liquid crystal drive signal when power supply to the liquid crystal display device is started, and the liquid crystal control circuit. a determination circuit input of the original liquid crystal driving signal generated in the main body Te, and a multiplexer, said multiplexer original liquid crystal driving signal of the dummy generated in the dummy signal generating circuit and the liquid crystal control circuit generates a liquid crystal driving signal, and inputs the output signal of the determination circuit, when the outputs a signal indicating that the <br/> judgment circuit does not generate the original liquid crystal drive signal, the dummy outputs a liquid crystal drive signal, when the determination circuit outputs a signal indicating that it is generating the original liquid crystal driving signal, which selects and outputs the original liquid crystal driving signals, said Signal Me signal generator is selected in the multiplexer
A liquid crystal display device, which outputs the following. 4. The liquid crystal display device according to claim 3, wherein the dummy liquid crystal drive signal generated by the dummy signal generation circuit is generated separately from an original liquid crystal drive signal.