JP2003131643A - Picture display device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To use a graphics card which is generally used in a great number as a signal source of a picture display device capable of displaying pictures separately in a plurality of display areas. SOLUTION: When a picture display device receives input picture control signals Svi- A to Svi- D which correspond respectively to the plurality of display areas from external signal sources, the control part 112 existing in the inside of the display device operates as follows. The part judges whether respective input picture control signals are effective by using a control IC 8 and the part distributes, on the basis of the judgment result, input clock signals and input enable signals so that effective output picture signal control signals Svo- A to Svo- D which are to be supplied to picture display devices as signals corresponding to the plurality of display areas are outputted in order to avoid the failures of the picture display devices (liquid crystal panel modules) when the general graphics cards are used as signal sources, and the part generates a power source control signal Sc- pw so that the power supply to the picture display device is stopped as necessary.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention includes an image display device such as a liquid crystal panel module having a plurality of display areas capable of independently displaying an image, and uses a plurality of image control signals corresponding to the plurality of display areas. The present invention relates to an image display device that displays an image based on a signal input from an external image signal source.

[0002]

2. Description of the Related Art Conventionally, there has been known an image display apparatus using an image display device such as a liquid crystal display module capable of independently displaying an image in a plurality of display areas. This type of image display device has a plurality of display areas (hereinafter, simply “area”).
(Also referred to as “image control signals”) from an external image signal source, and supplies these image control signals to the image display device. FIG. 5 is a block diagram showing an example of such an image display device. In this example, the image display device 210 has four display areas A, B,
An image display device 214 capable of independently displaying images on C and D and four differential signal receiver ICs (Int
integrated circuit) 212a to 212d
It has and. The image display device 214 incorporates four drive circuits corresponding to the four areas A, B, C, and D, and has an input terminal corresponding to each drive circuit. When an image control signal is applied to the corresponding input terminal, each drive circuit displays an image in the area corresponding to the drive circuit among the four areas A, B, C, D according to the image control signal.

In the configuration shown in FIG. 5, a personal computer (hereinafter referred to as "P") equipped with a dedicated graphic card is used.
C) is an external image signal source 200. From this image signal source 200, four image control signals Sv_A, Sv_ corresponding to four areas A, B, C, D, respectively.
B, Sv_C, and Sv_D are supplied to the image display device 210. These image control signals Sv_A, Sv_B, Sv
_C and Sv_D are TMDS (Transition Mini) often used for digital display interfaces.
sized Differential Signal
ing), which is a high-speed differential signal, and the image display device 210 uses the image control signal Sv__ as a high-speed differential signal.
A to Sv_D are represented by differential signal receiver ICs 212a to 21
2d is used to convert into a signal that can be input to the image display device 214. Further, the external image signal source 200 also supplies a power supply control signal Sd_pw for controlling whether the power supply to the image display device 214 is stopped or the normal operation mode is set.

[0004]

In the image display device as described above, the image control signal S corresponding to each of the display areas A to D is generated.
When v_A to Sv_D are input from the external image signal source 200 and supplied to the image display device 214 as the image control signals Svd_A to Svd_D via the differential signal receiver ICs 212a to 212d, the image control signals Sv are received.
d_A to Svd_D are configured to be always given to the drive circuits corresponding to the respective areas A to D as they are. Then, when each drive circuit is given an image control signal, it supplies a drive signal (for example, a data signal or a scanning signal) to the corresponding display area in accordance with the image control signal. For this reason, when a display device, such as a liquid crystal panel module, which may be out of order unless an image control signal is constantly supplied during power supply, is used as the image display device 214, four areas A to D are used. Even when it is not necessary to display an image in one or more of the areas, an effective image control signal corresponding to the area is provided from the external image signal source 200 or the image display device 214.
It is necessary to avoid the failure of the display device 214 by stopping the power supply to the display and stopping the display of the entire screen.

When a PC (personal computer) is used as the external signal source 200, a BIOS (Basic Input / Output) at the time of starting the PC is used.
System setting screen display and OS (Operati)
ng System) when displaying a safe mode when a problem occurs, or when the user wants to work in a small screen area, only a partial area of the screen is required and an image is displayed in the other screen areas. It may not be necessary. In such a case, when a PC equipped with a plurality of single monitor graphics cards or a plurality of multi monitor graphics cards is used as the external signal source 200 so as to correspond to the plurality of display areas in the conventional image display device, the screen is The image control signal for the monitor that does not need to be displayed becomes invalid. At this time, in the above-described conventional image display device, in order to prevent the display device from being damaged, it is necessary to stop the power supply to the display device and stop the display of the entire screen. However, at this time, a part of the valid image control signals among the image control signals output from the external signal source 200 includes the BIOS setting screen and screen information indicating that the system is started in the safe mode, and the entire screen of the screen is displayed. It is a serious problem that these screen informations are not displayed due to stopping the display. That is, to put it simply, an image display device configured to stop the display of the entire screen under the above circumstances cannot be realized as a product.

Therefore, when a PC is used as the signal source 200 of the conventional image display device, a graphics card dedicated to the image display device that also outputs an image control signal for an area where image display is not required. Need to be attached. However, such a graphics card outputs an image control signal to an area where image display is unnecessary among the plurality of display areas in the above-described conventional image display device, so that power consumption is wasted.

By the way, the most popular single monitor graphics card is the most widely distributed, and a large number of multi monitor graphics cards have been recently distributed, and all of them have always achieved the latest drawing performance. Moreover, the market price is relatively low due to the large amount of distribution. However, the above-mentioned conventional image display device capable of independently displaying an image in a plurality of display areas is not common as compared with a normal image display device capable of displaying an image only in one display area, and when many are distributed. Is hard to think of. Therefore, since such a graphics card dedicated to the image display device is not common, it is unlikely that many graphics cards will be distributed. Therefore, it is unlikely that a product that realizes the latest drawing performance is always prepared as a graphics card dedicated to the image display device, and that the commercial price is high because the distribution amount is small.

The present invention has been made in view of the above circumstances, and is an image display device capable of independently displaying an image in a plurality of areas, but it is general and widely distributed, so that it has relatively high performance. Another object of the present invention is to provide an image display device capable of displaying an image by using a relatively inexpensive graphics card as a signal source.

[0009]

According to a first aspect of the invention, an image display device having a plurality of display areas and a plurality of input image control signals respectively corresponding to the plurality of display areas are received from an external signal source, and the plurality of input image control signals are received. Of the input image control signal is determined for each input image control signal, and when the image display device is operating, only the valid input image control signal of the plurality of input image control signals is input to the image display device. And a display unit corresponding to the supplied input image control signal according to the input image control signal supplied from the control unit which is determined to be valid by the control unit. It is characterized by displaying an image on.

According to the first aspect of the invention as described above, even if the plurality of input image control signals received from the external signal source include ineffective signals, the effective input image control signals are effective when the image display device is in operation. Only the image display device is supplied. Therefore, even if a general PC (personal computer) equipped with a plurality of single monitor graphics cards or multiple monitor graphics cards is used as an external signal source, an image display device having a plurality of display areas may be damaged. Without it, an image can be displayed.

In a second aspect based on the first aspect, the control section is configured so that one of the plurality of input image control signals supplied from the external signal source is valid and the other input image control signal is valid. When it is determined that any one of the input image control signals is invalid, the valid input image control signal is supplied to the image display device instead of the invalid input image control signal.

According to the second aspect of the invention, even if the input image control signal corresponding to any of the plurality of display areas in the image display device is invalid, it is invalid as the image control signal for the display area. A valid input image control signal is supplied to the image display device instead of the effective input image control signal. Therefore, an image display device, such as a liquid crystal panel module, which is likely to fail unless an image control signal is constantly supplied during power supply, is used.
Even if the input image control signal corresponding to a part of the plurality of display areas is invalid, the image is displayed according to the valid input image control signal without stopping the power supply to the entire image display device. can do.

In a third aspect based on the first or second aspect, the image display device receives a power control signal, and whether or not to supply power to the image display device according to the power control signal. Or switching the operation mode of the image display device between a normal operation mode and a low power mode, the control unit controls all of the plurality of input image control signals supplied from the external signal source. When it is determined that the signal is invalid, a control signal to stop the power supply to the image display device or to shift the operation mode of the image display device to a low power mode,
It is characterized in that it is supplied to the image display device as the power control signal.

According to the third aspect, the power supply to the image display device is stopped when all of the plurality of input image control signals supplied from the external signal source are invalid. Alternatively, the operation mode of the image display device shifts to the low power mode. Therefore, an image display device, such as a liquid crystal panel module, which may be damaged unless an image control signal is constantly supplied during power supply is used, and an input image control signal corresponding to each display area of the image display device is used. When all are invalid, the failure of the image display device can be avoided.

In a fourth aspect based on the first or second aspect, the image display device receives a power control signal, and whether or not to supply power to the image display device according to the power control signal. Or switching the operation mode of the image display device between a normal operation mode and a low power mode, the control unit, among the plurality of input image control signals supplied from the external signal source, When it is determined that the input image control signal corresponding to the specific display area preselected from the plurality of display areas is an invalid signal, the power supply to the image display device is stopped or the image display device A control signal for shifting the operation mode to the low power mode is supplied to the image display device as the power control signal.

According to the fourth aspect, when the input image control signal corresponding to the specific display area is invalid, the power supply to the image display device is stopped or the image display device is operated. The operation mode shifts to the low power mode. Therefore, a corresponding effective image control signal is always supplied to the image display device, as in the case where an external signal source is a PC equipped with a plurality of general single monitor graphics cards or multiple monitor graphics cards. When the primary image display area to be specified can be specified, when the input image control signal corresponding to the primary image display area is invalid, it is unconditionally (whether the input image control signal for other display areas is valid or not). Power supply to the image display device can be stopped or its operating mode can be changed to a low power mode. Therefore, the cost for determining whether or not the input image control signal is valid (amount of the determination circuit) compared to the case where power control is performed based on whether or not the input image control signal for all display areas is valid Can be reduced.

According to a fifth aspect of the present invention, in any one of the first to fourth aspects, the control section displays the plurality of display images among the plurality of input image control signals supplied from the external signal source. When it is determined that the specific image control signal, which is the input image control signal corresponding to the specific display region preselected from the region, is a valid signal, the input image control signal corresponding to the display region other than the specific display region is used. An input image control signal that is determined to be a valid signal of the non-specific image control signals is supplied to the image display device, and an input image control signal that is determined to be an invalid signal of the non-specific image control signals. Alternatively, the specific image control signal is supplied to the image display device.

According to the fifth aspect, when the input image control signal corresponding to the specific display area is valid, the area of the other display area where the corresponding input image control signal is invalid is the area. The signal supplied to the image display device as the image control signal for is the input image control signal corresponding to the specific display area, but in the area where the corresponding input image control signal is valid among other display areas, The corresponding input image control signal is supplied to the image display device. Therefore, even if a part of the plurality of input image control signals is invalid, the area corresponding to the valid input image control signal can be displayed according to the input image control signal without stopping the power supply to the entire image display device. Images can be displayed. Further, when the input image control signal corresponding to the primary image display area as the specific display area is invalid, the power supply to the image display device is unconditionally stopped or its operation mode is shifted to the low power mode. By adopting the configuration, the cost for determining whether or not the input image control signal is valid can be reduced.

According to a sixth aspect of the present invention, in any one of the first to fourth aspects, the control section displays the plurality of display images among the plurality of input image control signals supplied from the external signal source. When it is determined that the specific image control signal, which is the input image control signal corresponding to the specific display area preselected from the area, is a valid signal, the input image control signal corresponding to the display area other than the specific display area is used. When it is determined that one of the non-specific image control signals is an invalid input image control signal, the specific image control signal is supplied to the image display device instead of all the non-specific image control signals. It is characterized by

According to the sixth aspect, when the input image control signal corresponding to the specific display area is valid and any one of the input image control signals corresponding to the other display areas is invalid, The input image control signal corresponding to the specific display area is supplied to the image display device in place of all the input image control signals corresponding to the other display areas. Therefore, when using a PC equipped with a plurality of general single-monitor graphics cards or multi-monitor graphics cards as an external signal source, only the primary display area is displayed when the PC is started up or the DOS prompt is displayed.
For any of the display areas other than the primary image display area by customizing the graphics driver so that an effective image control signal is output for all display areas after the OS such as Windows (registered trademark) is started. Does not have to assume that an image control signal that is valid and invalid for another is output. Therefore, the cost for determining whether the input image control signal is valid can be reduced.

In a seventh invention according to any one of the first invention to the sixth invention, the control unit stops the power supply to the image display device or operates the image display device. When the mode is the low power mode, when it is determined that all of the plurality of input image control signals supplied from the external signal source are valid signals, the stop of the power supply to the image display device is released. Power supply recovery means for starting the power supply or returning the operation mode of the image display device from the low power mode to the normal operation mode.

According to the seventh aspect, when the power supply to the image display device is stopped or the operation mode is the low power mode, the plurality of inputs supplied from the external signal source are used. When all of the image control signals are valid, power supply to the image display device is started or its operation mode is returned to the normal operation mode. Therefore, in the case where the video cable is disconnected after the OS such as Windows (registered trademark) is started in the PC as the external signal source, the image display device returns to the normal operation mode when all the cables are properly connected again. The function, can be realized.

In an eighth aspect based on any one of the first aspect to the sixth aspect, the control section is such that the power supply to the image display device is stopped or the operation of the image display device is stopped. When the mode is the low power mode, among the plurality of input image control signals supplied from the external signal source, the input image control signal corresponding to the specific display area preselected from the plurality of display areas is effective. If it is determined that the signal is a signal, the power for canceling the stop of the power supply to the image display device and starting the power supply, or for returning the operation mode of the image display device from the low power mode to the normal operation mode. It is characterized by including supply recovery means.

According to the eighth aspect, when the power supply to the image display device is stopped or the operation mode is the low power mode, the plurality of inputs supplied from the external signal source are supplied. When the input image control signal corresponding to the specific display area among the image control signals becomes valid, the power supply to the image display device is started or the operation mode thereof returns to the normal operation mode. Therefore, when the PC is restarted in the image display device in which the power supply is stopped by shutting down the PC as the external signal source or the power-down mode is set, the OS such as Windows (registered trademark) is started. Image display can be performed from the state where only the image control signal for the primary image display area as the specific display area is output from the PC.

In a ninth invention according to any one of the first invention to the eighth invention, each of the plurality of input image control signals is a vertical synchronizing signal, a horizontal synchronizing signal, a dot clock signal, and a data enable signal. , At least one of the color data signals.

The ninth invention is applicable to an image display device using a general image display device including a liquid crystal panel module.

A tenth invention is the image display device according to any one of the first to ninth inventions,
It is a liquid crystal panel module.

An eleventh invention is characterized in that, in the fourth, fifth, sixth, or eighth invention, the specific display area is a display area located at the upper left on the screen.

According to the eleventh aspect, a PC equipped with a plurality of general single-monitor graphics cards or multi-monitor graphics cards is used.
When an external signal source is a device in which the upper left area on the screen is the primary image display area as described above, the above-described effects of the fourth, fifth, sixth, or eighth invention are exhibited.

[0030]

BEST MODE FOR CARRYING OUT THE INVENTION Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings. <1. Overall Configuration> FIG. 1 is a block diagram showing the overall configuration of an image display device according to an embodiment of the present invention. The image display device 110 includes an image display device 114 capable of independently displaying images in four display areas A, B, C, and D, and an image control signal Svi_A input from an external image signal source 100. Svi_B, Svi_C,
Image control signals Svo_A, Svo_B, Svo_C, which are to be supplied to the image display device 114 according to Svi_D,
The controller 112 outputs the power control signal Sc_pw for the Svo_D and the image display device 114. The image display device 110 according to the present embodiment is a liquid crystal panel module, and includes four areas A, B, C, and
D has four sets of input terminals respectively corresponding to D, and when an image control signal is input to any of the four sets of input terminals, an image is displayed in a display area corresponding to the input terminal in accordance with the image control signal. indicate.

An image control signal is supplied from an external image signal source 100 to the image display device 110 having the above configuration. That is, each of the multi-monitor graphics card attached to the PC that is the image signal source 100 or the four single-monitor graphics cards has four pixels included in the image display device 114 in the image display device 110.
Image control signals Svi_A, Svi_B, Svi_C, Svi_D corresponding to each of the two areas A, B, C, D
Is output. In the present embodiment, these image control signals S
A high-speed differential signal called TMDS is adopted as the signal format of vi_A, Svi_B, Svi_C, Svi_D. TMDS is often used for a digital display interface because it can be transmitted over a relatively long distance and has good noise immunity. Although several other formats are possible for the signal from the image signal source 100, the content of the present invention does not specify this signal format.

The image control signals Svi_A, Svi_B, Svi_C, Svi_D output from the image signal source 100.
Is received by the control unit 112 in the image display device 110. The controller 112 controls the image control signal Svi_.
The image display device 11 is based on the below-mentioned determination as to whether or not A, Svi_B, Svi_C, and Svi_D are valid.
4 image control signals Svo_A, Svo_B, Svo_C, Svo to the input terminals corresponding to the respective areas A, B, C, D
_D is distributed and the power supply control signal Sc_pw is supplied to the image display device 114. As a result, image display on the image display device 114 and power ON / OFF of the image display device 114 are performed. <2. Configuration of Image Display Device and Image Control Signal> Next, the image display device 114 used in the image display device 110 according to the present embodiment will be described in detail. This image display device 114 has four display areas A, as described above.
A liquid crystal panel module having B, C, and D, which is provided with input terminals corresponding to respective areas, and which is in charge of four display areas A, B, C, and D, as a driving circuit for driving the liquid crystal panel. It incorporates individual drive circuits. Then, the image control signal input from each input terminal is given to the drive circuit in charge of the display area corresponding to the input terminal. When receiving an image control signal, each drive circuit generates a drive signal (specifically, a data signal or a scanning signal) for displaying an image according to the image control signal, and the drive signal is in charge of the drive circuit. Supply to the display area.
As a result, an image is displayed in the area in charge of the drive circuit in accordance with the image control signal given through the input terminal corresponding to the area. Image control signals Svo_A, Svo_B, Svo supplied to the image display device 114 as image control signals corresponding to the regions A, B, C, D.
_C and Svo_D include a clock signal CLKo, a data enable signal DEo, and a data signal DATo.

FIG. 2 shows an image display device (liquid crystal panel module) used in the image display apparatus according to this embodiment.
11 shows a signal waveform supplied to one region of 114. When operating the liquid crystal panel module 114, signals similar to those shown in FIG.
It is necessary to supply to the input terminals corresponding to C and D respectively. FIG. 2A shows a signal waveform of the data enable signal DEo particularly for a relatively long period in which the image control signal for one screen is transferred. Here, the period during which the pulse in which the data enable signal DEo becomes high level is regularly transmitted is the display period, and the data enable signal DE
A vertical blanking period is a period in which o is low level and continues for a long time.

In FIGS. 2B to 2D, attention is paid to one pulse period of the data enable signal DEo by expanding the time, and the signals of the data enable signal DEo, the clock signal CLKo, and the data signal DATo in the one pulse period. The waveform is shown.

The data enable signal DEo is also a signal indicating whether or not the current data signal DATo is valid. When the data enable signal DEo is at high level, it is synchronized with the rising edge of the clock signal CLKo as the dot clock signal. Then, the data is sequentially taken into the liquid crystal panel module 114. Data enable signal DE
Data for one horizontal line in the liquid crystal panel module 114 is transferred during the period of one pulse (hereinafter referred to as “DE pulse”) in which o is at a high level, and the data for one screen is displayed by the same number of DE pulses as the number of lines. It is transferred to the panel module 114.

The data signal DATo is a signal representing color data composed of 48 bits. On the other hand, the color information of one pixel displayed on the panel in the liquid crystal panel module 114 is represented by a total of 24 bits of 8 bits for each of RGB. Therefore, in this embodiment, the image data of 2 pixels is simultaneously transferred to the liquid crystal panel module 114 which is an image display device by using the 48-bit signal line.

The data enable signal DEo is also a signal that defines the horizontal blanking period. That is, the data enable signal DEo is at the low level for a short period each time data is transferred for one horizontal line, and the horizontal blanking period is defined by this low level period.

The clock signal CLKo is a signal generated by an oscillator that constantly oscillates regardless of the display period or the vertical blanking period.

Generally, in the liquid crystal panel module, the drive circuit built in the liquid crystal panel module uses the clock signal CLKo and the data enable signal DEo to switch the positive / negative of the voltage applied to the panel at regular intervals. When the signal CLKo and the data enable signal DEo are fixed, the applied voltage may not be switched between positive and negative, so that the panel may fail (the liquid crystal may deteriorate) and may not be displayed normally. Therefore, it is necessary to always supply the clock signal CLKo and the data enable signal DEo at the correct timing while the operating voltage (power supply) is supplied to the liquid crystal panel module 114, and if any of these signals cannot be supplied. Needs to stop the power supply (power supply) to the liquid crystal panel module 114. Of course, when the power supply to the liquid crystal panel module 114 is stopped, nothing can be displayed on the liquid crystal panel. <3. Configuration of Control Unit> Next, the configuration of the control unit 112 of the image display device 110 according to the present embodiment will be described in detail.

FIG. 3 shows the control unit 112 in this embodiment.
3 is a circuit diagram showing the configuration of FIG. The control unit 112 includes four differential signal receiver ICs (hereinafter, simply “receiver ICs”).
1a to 1d, a control IC 8, pull-down resistors 2a to 2d, a zero delay clock driver 3, zero delay clock drivers with control 4b, 4c and 4d, and a field effect transistor (hereinafter referred to as "FET") as a switching element. Switch ”) 6
b, 6c, 6d, 7b, 7c, 7d and the inverter 10
And are connected as shown in FIG. 3 to form the following.

As described above, the image control signals Svi_A, Svi_B, Svi_ transmitted from the image signal source 100.
C and Svi_D are high-speed differential signals in the format called TMDS and correspond to the display areas A, B, C, and D, respectively. These image control signals Svi_A and Svi_
B, Svi_C, and Svi_D are receiver ICs 1a to 1
Each of these receiver ICs 1a ...
1d converts the image control signal level into a level that can be input to the image display device 114 described above. As described above, the image display device 114 used in this embodiment is a liquid crystal panel module, and necessary image control signals are the clock signal CLKo, the data enable signal DEo, and the data signal DATo, and each of the receiver ICs 1a to 1d. From the clock signals CLKi,
Data enable signal DEi and data signal DATi
Is output.

In the following, the image control signals Svi_A, Svi_B, Svi_C, Svi input to the control unit 112 will be described.
_D and the clock signals CLKi, data enable signals DEi and data signals DATi that form them
And the image control signal Svo_ output from the control unit 112.
In order to distinguish A, Svo_B, Svo_C, Svo_D and the clock signals CLKo, data enable signals DEo and data signals DATo which form them, “input” is added to the beginning of the names of the former signals, and the latter is added. "Output" is added to the beginning of the name of each signal. In the following, the input clock signal CLKi, the input data enable signal DEi, the input data signal DATi, the output clock signal CLKo, the output data enable signal DEo, and the output data signal DAT.
When it is necessary to distinguish which of the four display areas A to D corresponds to o, "_" is added to the end of the symbol indicating these signals and the symbol indicating the corresponding area is continued. Shall be added. For example, the input clock signal forming the input image control signal Svi_A corresponding to the display area A is represented by “CLKi_A”, and the output clock signal forming the output image control signal Svo_A corresponding to the display area A is represented by “CLKo_A”.

The input data signals DATi_A to DATi_D output from the receiver ICs 1a to 1d are output data signals DATo_A to D of the corresponding display areas A to D.
It is directly output from the control unit 112 as ATo_D. However, an output terminal for outputting the input data signals DATi_A to DATi_D from each of the receiver ICs 1a to 1d, and an output data signal DATo_A from the control unit 112.
Signal lines for connecting to output terminals for outputting -DATo_D are connected to the ground line (GND level) via pull-down resistors 2a to 2d, respectively.

Focusing on the input clock signals CLKi_A to CLKi_D output from the receiver ICs 1a to 1d, the input clock signal CLKi_A for the area A is
One zero-delay clock driver 3 and three zero-delay clock drivers with control 4b, 4c,
4d and input clock signals CLKi_B, CLKi_C and CLKi_D for regions B, C and D.
Are input to the individual zero-delay clock drivers 5b, 5c and 5d with control. The zero-delay clock driver 3 used here is a clock driver having a timing adjustment circuit inside, and has a function of outputting a change in input almost at the same time when a signal generated by an oscillator like a clock signal is input. It is a clock driver. Further, the zero-delay clock driver with control 4b-4d, 5b used here is used.
5d are output controls of the zero-delay clock driver, and have the same function as the zero-delay clock driver when the control terminal (signal input from the bottom in the figure) is at high level.
When the control terminal is low level, it has a function to put the output in a high impedance state.

Input clock signal CLKi_A for area A
After passing through the zero delay clock driver 3 described above, is output from the control unit 112 as the output clock signal CLKo_A for the area A. The output signal line of the zero delay clock driver with control 4b to which the input clock signal CLKi_A for the region A is input and the output signal line of the zero delay clock driver 5b with control to which the input clock signal CLKi_B for the region B is input are , Are connected to each other, and are further connected to the output terminal of the control unit 112. As a result, a signal obtained by a wired OW between the output of the zero delay clock driver with control 4b and the output of the zero delay clock driver with control 5b is output from the control unit 112 as the output clock signal CLKo_B for the area B. Similarly, the input clock signal CLKi_A for the area A
Output of the zero-delay clock driver with control 4c, and the input clock signal CL for area C
An output clock signal CLKo for the region C is a signal obtained by wired-direction with the output of the zero-delay clock driver with control 5c to which Ki_C is input.
It is output from the control unit 112 as _C. Area A
Output of the zero-delay clock driver with control 4d to which the input clock signal CLKi_A for input is applied, and the zero-delay clock driver with control 5 to which the input clock signal CLKi_D for area D is input.
The signal obtained by wired ow with the output of d is
The output clock signal CLKo_D for the area D is output from the control unit 112.

Focusing on the input data enable signals DEi_A to DEi_D output from the receiver ICs 1a to 1d, the data enable signal DEi_ for the area A is selected.
A is output as the output data enable signal DEo_A for the area A from the control unit 112 and the three FETs
Input to the switches 6b, 6c, 6d, the areas B, C, D
Input data enable signals DEi_B, DEi_
C and DEi_D are individual FET switches 7
b, 7c, 7d. F used here
The ET switches 6b to 6d and 7b to 7d are input (terminal for inputting a signal from the left side in the figure) and output (right side in the figure) when the control terminal (the signal input from the lower side in the figure) is at a high level. It has a function of electrically disconnecting between the input and the output when the control terminal is at a low level.

Input data enable signal DE for area B
The output signal line of the FET switch 7b to which i_B is input and the output signal line of the FET switch 6b to which the input data enable signal DEi_A for the region A is input are connected to each other and further connected to the output terminal of the control unit 112. Has been done. As a result, the output of the FET switch 7b and the FET
The signal obtained by the wired connection with the output of the switch 6b is the output data enable signal DEo for the area B.
It is output from the control unit 112 as _B. Similarly,
A signal obtained by the wired Ower of the output of the FET switch 7c to which the input data enable signal DEi_C for the region C is input and the output of the FET switch 6c to which the input data enable signal DEi_A for the region A is input is obtained by the region C. Output data enable signal DEo_C for
Is output from the control unit 112. Further, the FE to which the input data enable signal DEi_D for the area D is input.
The signal obtained by the wired Ower of the output of the T switch 7d and the output of the FET switch 6d to which the input data enable signal DEi_A for the area A is input is output from the control unit 112 as the output data enable signal DEo_D for the area D. To be done.

The input clock signal CLKi of the image control signals output from the receiver ICs 1a to 1d is also included.
_A to CLKi_D and input data enable signal D
Ei_A to DEi_D are also input to the control IC 8. The control IC 8 has these areas A to
The input signals CLKi_A to CLKi_D and DEi_A to DEi_D for D are monitored, and the switching control signal Sca and the power supply control signal Sc_pw of the image display device 114 are generated based on these monitoring results.

The switching control signal Sca is the three zero-delay clock drivers with control 4b, 4c, 4d to which the input clock signal CLKi_A for the area A is input.
Control terminals and three FET switches 6 to which the input data enable signal DEi_A for area A is input
It is input to the control terminals of b, 6c and 6d. Further, the switching control signal Sca is also input to the inverter 10, and a signal obtained by inverting the signal level of the switching control signal Sca is output from the inverter 10 by the switching control inversion signal Scb.
Is output as. This switching control inversion signal Scb is
Input clock signals CLKi_B, C for regions B, C, D
Zero-delay clock drivers with control 5b, 5c, to which LKi_C and CLKi_D are respectively input
5d control terminal and input data enable signals DEi_B, DEi_C, DEi_ for areas B, C, D
FET switches 7b, 7c, 7 to which D is input respectively
It is input to the control terminal of d. <4. Mechanism of Signal Control> Next, the mechanism of signal control in this embodiment will be described in detail by describing the operation of the control unit 112 in this embodiment. FIG. 4 shows conditions for inputting each image control signal (each input clock signal CLKi_A to
CLKi_D and each input data enable DEi_A
~ DEi_D is valid or not) and the switching control signal Sc
a, switching control inversion signal Scb, power supply control signal Sc_p
The relationship between w, the signal source supplied to each image control signal output, and the power supply state of the image display device 114 is shown.

The control IC 8 monitors the input clock signals CLKi_A to CLKi_D and the input data enable signals DEi_A to DEi_D for each area to be input, and the input image control signal Svi_ corresponding to each area.
It is determined whether A to Svi_D are valid as signals that can be supplied to the image display device 114. This decision is
For example, it can be performed depending on whether the clock signal CLKi and the data enable signal DEi corresponding to each area include a predetermined pulse. Based on this determination result, the control IC 8 operates as follows. <4.1 When Input Image Control Signals for All Areas are Valid> When it is determined that the input clock signals CLKi_A to CLKi_D and the input data enable signals DEi_A to DEi_D for all areas A to D are valid, the control IC 8 Is the switching control signal Sca
Is set to a low level, so that, of the zero-delay clock driver with control and the FET switch, the zero-delay clock driver with control 4 to which the input clock signal CLKi_A for the area A is input.
FET switches 6b, 6c, to which the input data enable signal DEi_A for the area A is input.
The output of 6d is in a high impedance state. Further, in this case, since the switching control inversion signal Scb output from the inverter 10 becomes high level, the input clock signal C for the regions B, C, and D of the zero delay clock driver with control and the FET switch is provided.
Zero-delay clock drivers with control 5b, 5c and 5d to which LKi_B, CLKi_C and CLKi_D are input respectively, and FET switches 6b and 6c to which input data enable signals DEi_B, DEi_C and DEi_D for regions B, C and D are input respectively. , 6d are turned on, and the respective input signals are output as they are. In this case, each area A to
Input image control signals Svi_A to Svi_D for D (input clock signal CLKi, input data enable signal DE
i and the input data signal DATi) are in the area A
Output image control signals Svo_A to Svo_D (output clock signal CLKo, output data enable signal D
Control unit 11 as Eo and output data signal DATo)
2 and is supplied to the image display device 114. At this time, the output image control signals Svo_A to Svo_D for the areas A to D are input from the input terminals provided in the image display device 114 for each area as terminals corresponding to the areas A to D, respectively. Areas A to D
Is provided to the drive circuit provided in the image display device for each area as a drive circuit in charge of each area. Also,
The power supply control signal Sc_pw for the image display device 114 becomes a high level, which causes the image display device 114.
Is in a state in which power is supplied. In this way, the drive circuits according to the output image control signals Svo_A to Svo_D for the regions A to D respectively drive the regions A to A of the display panel 116.
The image is displayed on D. <4.2 When Input Image Control Signal for Region A is Valid> The input clock signal CLKi_A for region A and the input data enable signal DEi_A are valid, and the input clock signal CLKi_B for the other regions B, C, D , C
When it is determined that any one of LKi_C, CLKi_D and input data enable signals DEi_B, DEi_C, DEi_D is invalid as a signal that can be supplied to the image display device 114, the control IC 8 sets the switching control signal Sca to a high level, and , Zero delay clock driver with control and F
Input clock signal CL for area A of the ET switch
The zero-delay clock drivers 4b, 4c and 4d with control to which Ki_A is input and the FET switches 6b, 6c and 6d to which the input data enable signal DEi_A for the area A is input are turned on, and the respective input signals are left as they are. Output. Further, in this case, since the switching control inversion signal Scb output from the inverter 10 becomes the low level, the input clock signals CLKi_B, CLK for the regions B, C, D among the zero delay clock driver with control and the FET switch are provided.
Zero-delay clock drivers with control 5b, 5c, 5d to which i_C, CLKi_D are input, and input data enable signals DEi_B for the areas B, C, D.
FET switch 6 to which DEi_C and DEi_D are input
b, 6c and 6d are in a high impedance state. According to the above mechanism, in this case, the input clock signal CLKi and the input data enable signal DEi for the area A are used.
Are output clock signals CLKo_A ...
CLKo_D and output data enable signal DEo_
It is output from the control unit 112 as A to DE0_D and supplied to the image display device 114. Therefore, the input clock signal CLKi and the input data enable signal DEi for the area A are given to the respective drive circuits provided in the image display device for the respective areas as the drive circuits for the areas A, B, C and D. .

This is based on the assumption that the PC which is the image signal source 100 is started up or in the safe mode. Normally, in such a mode, the PC tries to display an image of the minimum necessary size. The PC as the image signal source 100 is
When a multi-monitor graphics card or a plurality of single-monitor graphics cards are installed, only the image control signal for the monitor at the upper left position is output, and the image control signal is not supplied to the other monitors. In this embodiment, the image control signal for the monitor at the upper left position corresponds to the area A. However, when the image control signal from the image signal source 100 is supplied only to the area A in the above mode, By distributing the input clock signal CLKo_A and the input data enable signal DEo_A corresponding to the area A to the areas B, C and D by the method described above, the liquid crystal panel module 114 which is the image display device according to the present embodiment. It is possible to display an image without causing a failure.

In this embodiment, the input data signal D
Unlike the input clock signal CLKi and the input data enable signal DEi, the ATi does not have a function of distributing the input data signal DATi_A for the area A to the other areas B, C, D, and the other areas B, C, The input data signals DATi_B, DATi_C, and DATi_D for D are output data signals DATo_B, DATi_C, and DAT, respectively.
The circuit configuration is such that i_D is directly output from the control unit 112. Therefore, the input data signals DATi_A to DATi_D for the areas A to D are always supplied to the corresponding input terminals of the input terminals provided for each area in the image display device 114. The differential signal receiver ICs 1a to 1d have a function of setting the data signal output to a high impedance state when the high-speed differential signal from the image signal source 100 does not include the pulses of the clock signal CLKi and the data enable signal DEi. In the present embodiment, the pull-down resistors 2a to 2b are connected to the signal lines from which the input data signals DATi_A to DATi_D are output from the receiver ICs 1a to 1d, so that the data signal output of the receiver ICs 1a to 1d has a high impedance. Receiver IC in a state
The output data signal DATo corresponding to is fixed to the low level. When all the bits of the output data signal DATo corresponding to any one of the areas A to D are low level and the valid output clock signal CLKo and output data enable signal DEo are supplied to the liquid crystal panel module 114, the liquid crystal panel The area in the module 114 is displayed in black. That is, in the present embodiment, when the PC which is the image signal source 100 is activated or in the safe mode, the display information transmitted from the PC is displayed in the upper left area A.
, And black is displayed on the other areas B, C and D. <4.3 When Input Image Control Signal for Region A is Invalid> When it is determined that the input clock signal CLKi_A and the input data enable signal DEi_A for the region A are invalid signals, the control IC 8 determines that the image display device 114 The power supply control signal Sc_pw is set to low level. As a result, the liquid crystal panel module 114 is not supplied with power, and no image is displayed.
Therefore, in this case, the output clock signal CLKo and the data enable signal DE for the areas A, B, C and D are obtained.
Even if o is an invalid or invalid signal, since the liquid crystal panel module 114 is not supplied with power, the liquid crystal panel module 114 is unlikely to fail. Normal P
When C is the image signal source 100, there is no mode in which the image control signal output to the monitor at the upper left position becomes invalid during operation. Therefore, in this embodiment, the input clock signal for the region A corresponding to the upper left position is used. When it is determined that CLKi_A and the input data enable signal DEi_A are invalid, it is determined that it is not necessary to display an image, and the liquid crystal panel module 114 that is an image display device.
The system is designed to avoid failures by stopping the power supply to the inside.

As described above, the power supply control signal Sc_p
After w becomes low level and power supply to the liquid crystal panel module 114 is stopped, all areas A to
When the input image control signals Svi_A to Svi_A for D become valid, or at least when the input image control signal Svi_A for area A becomes valid, the power supply control signal Sc_pw becomes high level (see FIG. 4). The power supply to the liquid crystal panel module 114 is restarted. <5. Modification> In the above embodiment, the input image control signal Svi_A corresponding to the display area A is valid (the input clock signal CLKi_A for the area A and the input data enable signal DEi_A are valid), and the other areas B,
Input image control signals Svi_B and Svi corresponding to C and D
If it is determined that any one of _C and Svi_D is invalid (any one of the input clock signal and the input data enable signal for other regions is invalid), it corresponds to the other regions B, C, and D. Output image control signal Svo
_B, Svo_C, Svo_D, input image control signals Svi_B, S corresponding to the other areas B, C, D
The input image control signal Svi_A corresponding to the area A is used instead of vi_C and Svi_D. However, instead of this, when the input image control signal Svi_A corresponding to the display area A is valid, another area B,
Of the areas C and D where the corresponding input image control signal is invalid, the input image control signal Svi_A corresponding to the area A is used as the output image control signal corresponding to that area, but the other area B, Of the areas C and D where the corresponding input image control signal is effective, the input image control signal corresponding to that area may be used as the output image control signal corresponding to that area. In this configuration, the control IC 8 shown in FIG. 3 generates a signal (switching control signal) indicating whether or not the input image control signals Svi_A to Svi_D are valid for each area, and the switching control signal for each area. On / off of the corresponding zero-delay clock driver with control and the FET switch is controlled based on the above. For example, focusing on the area B, the area B is high level when the input image control signal Svi_B is valid and low level when the input image control signal Svi_B is invalid.
Of the switching control signal Sca_B for switching and the inversion signal of the switching control inversion signal Scb_B for the control IC 8
The control signal of the zero-delay clock driver with control 5b and the FET switch 7b is supplied with the switching control signal Sca_B for the B region, and the control terminals of the zero-delay clock driver with control 4b and the FET switch 6b are for control of the B region. The switching control inversion signal Scb_B is input. When the primary image display area where the corresponding effective image control signal should always be supplied to the image display device 114 can be specified regardless of the operation mode like the area A in the above-described embodiment, the primary image display area can be specified. When the input image control signal corresponding to the display area is valid, the operation as in the above embodiment is more costly for determining whether the input image control signal for each display area is valid (the circuit of the determination circuit). Amount) can be reduced.

Further, in the above embodiment, when it is determined that the input image control signal Svi_A corresponding to the display area A is invalid, the power supply control signal Sc_pw is set to low level to supply power to the image display device 114. However, instead of this, when it is determined that all of the input image control signals Svi_A to Svi_D corresponding to the areas A to D are invalid, the image display device 114
The power supply to the power supply may be stopped. However,
When the primary image display area where the corresponding effective image control signal should always be supplied to the image display device 114 can be specified regardless of the operation mode like the area A in the above embodiment, the primary image display area is specified. When the input image control signal corresponding to is invalid, the power control signal Sc_pw for the image display device 114 is unconditionally (regardless of whether the input image control signals for the other display areas B, C, and D are valid). By setting the level to the low level, it is possible to reduce the cost (circuit amount of the determination circuit) for determining whether or not the input image control signal for each display area is valid.

Furthermore, in the above embodiment, the control unit 1
When the power supply control signal Sc_pw input from the image display device 114 to the image display device 114 becomes low level, the power supply to the image display device 114 is stopped. Instead, the image display device 114 is set as the operation mode in the normal operation mode. May be configured to operate in the normal operation mode when the input power supply control signal Sc_pw is at the high level and to operate in the low power mode when at the low level. In this case, the liquid crystal panel module 114 as the image display device, in the low power mode, receives image control signals Svo_A to Svo from the control unit 112.
Ignoring vo_D, the voltage application to the liquid crystal panel 116 is stopped, and power is supplied to the other parts (driving circuit (not shown)) in the image display device 114 as they are, thus operating with low power. With such a configuration,
Similar to the above embodiment, it is possible to avoid the failure of the liquid crystal panel module 114.

Furthermore, in the above embodiment, the image control signals Svi_A to Svi_D, Svo_A to Svo_D.
Includes a data enable signal DEi as a control signal for defining the display period and the vertical retrace line period and for indicating whether the data signal DATi is valid. Alternatively, or in addition to this, the vertical enable signal DEi And / or image control signals Svi_A to Svi_ including a horizontal synchronization signal
Even when D, Svo_A to Svo_D are used and the image display device 114 displays an image in accordance with such image control signals Svo_A to Svo_D, the image display of the liquid crystal panel module or the like is performed by the same configuration as the above embodiment. Failure of the device 114 can be avoided.

Although the liquid crystal panel module is used as the image display device 114 in the above embodiment, the present invention is not limited to the liquid crystal panel module as the image display device. That is, although it has a plurality of display areas capable of independently displaying images, since it is configured by using, for example, one display panel, an image for a part of the display area is in operation (power is being supplied). INDUSTRIAL APPLICABILITY The present invention is effective in an image display device using an image display device that may be damaged when an ineffective image control signal is supplied as a control signal.

[0058]

According to the first aspect of the invention, even if the plurality of input image control signals received from the external signal source include ineffective signals, only the effective input image control signal is effective when the image display device is in operation. Are supplied to the image display device. Therefore, even if a general PC equipped with a plurality of single-monitor graphics cards or a multi-monitor graphics card is used as an external signal source, image display can be performed without damaging an image display device having a plurality of display areas. It can be performed. As a result, it is possible to achieve image display on an image display device using an image display device having a plurality of display areas at low cost and with high performance, and further reduce power consumption of an image signal source.

According to the second aspect of the invention, an image display device such as a liquid crystal panel module which may be out of order unless an image control signal is constantly supplied during power supply is used. Even if the input image control signal corresponding to a part of the display area is invalid, the image can be displayed according to the valid input image control signal without stopping the power supply to the entire image display device.

According to the third aspect of the invention, when all of the plurality of input image control signals supplied from the external signal source are invalid, the image control signal is constantly applied during power supply such as in the liquid crystal panel module. If an image display device that may otherwise fail is used and all input image control signals corresponding to each display area of the image display device are invalid, the power supply to the image display device is stopped. Or the operation mode of the image display device shifts to the low power mode, so that the failure of the image display device can be avoided.

According to the fourth aspect of the present invention, the corresponding effective image control is performed, such as in the case where a general PC equipped with a plurality of single monitor graphics cards or multiple monitor graphics cards is used as an external signal source. When the primary image display area where the signal should always be supplied to the image display device can be specified, when the input image control signal corresponding to the primary image display area is invalid, it is unconditionally (for other display areas). It is possible to either stop the power supply to the image display device or switch its operating mode to a low power mode, regardless of whether the input image control signal is valid. Therefore, the cost for determining whether or not the input image control signal is valid can be reduced compared to the case where the power control is performed based on whether or not the input image control signal for all the display areas is valid. .

According to the fifth aspect of the invention, even if some of the plurality of input image control signals are invalid, the input image control signals are effective without stopping the power supply to the entire image display device. An image can be displayed in the area according to the input image control signal. Further, when the input image control signal corresponding to the primary image display area as the specific display area is invalid, the power supply to the image display device is unconditionally stopped or its operation mode is shifted to the low power mode. By adopting the configuration, the cost for determining whether or not the input image control signal is valid can be reduced.

According to the sixth aspect, when the input image control signal corresponding to the specific display area is valid and any of the input image control signals corresponding to the other display areas is invalid, another display is displayed. Since the input image control signal corresponding to the specific display area is supplied to the image display device instead of all the input image control signals corresponding to the area, the cost for determining whether or not the input image control signal is valid is reduced. Can be reduced.

According to the seventh aspect of the present invention, in the case where the video cable is disconnected after the OS such as Windows (registered trademark) is started in the PC as the external signal source, if all the cables are properly connected again, the image is displayed. The function of returning the display device to the normal operation mode can be realized.

According to the eighth invention, for example, when the PC is restarted in the image display device in which the power supply is stopped or the power supply is stopped by shutting down the PC as the external signal source, Before the OS such as Windows (registered trademark) is activated, the image display can be performed from the state where only the image control signal for the primary image display area as the specific display area is output from the PC.

According to the ninth invention, in the image display apparatus using the general image display device including the liquid crystal panel module, the above-mentioned effects of the first invention to the eighth invention are exhibited.

According to the tenth invention, in the image display device using the liquid crystal panel module, the above-mentioned effects of the first invention to the eighth invention are exhibited.

According to the eleventh aspect of the invention, a device such as a PC having a plurality of general single monitor graphics cards or multiple monitor graphics cards mounted therein, the device having an upper left area on the screen as a primary image display area is externally connected. When used as a signal source, the above-mentioned effects of the fourth, fifth, sixth, or eighth invention are exhibited.

[Brief description of drawings]

FIG. 1 is a block diagram showing an overall configuration of an image display device according to an embodiment of the present invention.

FIG. 2 is a signal waveform diagram showing a signal supplied to a liquid crystal panel module which is an image display device as an image control signal corresponding to one display area in the above embodiment.

FIG. 3 is a block diagram showing a configuration of a control unit in the image display device according to the embodiment.

FIG. 4 is a diagram for explaining signal control for an image display device in the image display device according to the above embodiment.

FIG. 5 is a block diagram showing a configuration of a conventional image display device using a display device capable of independently displaying images in a plurality of display areas.

[Explanation of symbols]

1a to 1d ... Differential signal receivers 2a to 2d ... Pulldown resistor 3 ... Zero delay clock drivers 4b, 4c, 4d ... Zero delay clock drivers with control 5b, 5c, 5d ... Zero delay clock drivers with control 6b, 6c, 6d. FET switch 7b, 7c, 7d ... FET switch 8 ... Control IC 10 ... Inverter 100 ... Image signal source 110 ... Image display device 112 ... Control unit 114 ... Image display device (liquid crystal panel module) 116 ... Display panel Sca ... Switching control signal Scb ... Switching control inversion signal Sc_pw ... Power supply control signals Svi_A to Svi_D (for image display device) ... Input image control signals CLKi_A to CLKi_D, CLKi ... Input clock signals DEi_A to DEi_D, DEi Input data enable signals DATi_A to DATi_D, DATi ... Input data signals Svo_A to Svo_D ... Output image control signals CLKo_A to CLKo_D, CLKo ... Output clock signals DEo_A to DEo_D, DEo ... Output data enable signals DATo_A to DATo_D, DATo ... Output signals.

Front page continuation (51) Int.Cl. ⁷ identification code FI theme code (reference) G09G 3/20 670 G09G 3/20 680D 680 3/36 3/36 H04N 5/66 102Z H04N 5/66 102 G09G 5 / 00 520T F term (reference) 5C006 AC21 AF38 AF59 BC16 FA03 FA06 FA33 5C058 AA06 BA03 BA21 BA26 BA30 BA35 5C080 AA10 BB05 CC07 DD18 EE26 FF09 GG02 GG12 JJ02 JJ03 JJ01 JJ01 CB42 EA01 CB01 CB01 CB01 BD01 CA76

Claims (11)

[Claims] 1. An image display device having a plurality of display areas, and a plurality of input image control signals respectively corresponding to the plurality of display areas from an external signal source, and whether or not the plurality of input image control signals are valid. For each input image control signal, when the image display device is operating, a control unit that supplies only a valid input image control signal of the plurality of input image control signals to the image display device, The image display device is configured to display an image in a display area corresponding to the supplied input image control signal according to the input image control signal supplied from the controller determined to be valid. Image display device. 2. The control unit determines whether any one of the plurality of input image control signals supplied from the external signal source is valid and one of the other input image control signals is invalid. The image display device according to claim 1, wherein, when it is determined that the image input device is present, the valid input image control signal is supplied to the image display device instead of the invalid input image control signal. 3. The image display device receives a power control signal and controls whether to supply power to the image display device according to the power control signal, or an operation mode of the image display device. Switching between a normal operation mode and a low power mode, the control unit, when determining that all of the plurality of input image control signals supplied from the external signal source is an invalid signal, the image A control signal for stopping the power supply to the display device or for shifting the operation mode of the image display device to a low power mode is supplied to the image display device as the power control signal.
The image display device according to claim 1. 4. The image display device receives a power control signal and controls whether to supply power to the image display device according to the power control signal, or an operation mode of the image display device. Switching between a normal operation mode and a low power mode, the control unit, among the plurality of input image control signals supplied from the external signal source, a specific display area preselected from the plurality of display areas. When it is determined that the input image control signal corresponding to is an invalid signal, a control signal to stop the power supply to the image display device or to shift the operation mode of the image display device to a low power mode, The image display device according to claim 1, wherein the image display device is supplied as the power control signal to the image display device. 5. The control unit is an input image control signal corresponding to a specific display area preselected from the plurality of display areas among the plurality of input image control signals supplied from the external signal source. When the image control signal is determined to be a valid signal, the input image control is determined to be a valid signal among the non-specific image control signals that are input image control signals corresponding to display regions other than the specific display region. A signal is supplied to the image display device, and the specific image control signal is supplied to the image display device instead of the input image control signal determined to be an invalid signal of the non-specific image control signal. Claims 1 to 4
The image display device according to any one of items 1 to 7. 6. The control unit is an input image control signal corresponding to a specific display area preselected from the plurality of display areas among the plurality of input image control signals supplied from the external signal source. When the image control signal is determined to be a valid signal, one of the non-specific image control signals, which is an input image control signal corresponding to a display area other than the specific display area, is an invalid input image control signal. 5. When it is determined that the specific image control signal is supplied to the image display device instead of all the non-specific image control signals, the specific image control signal is supplied to the image display device. Image display device. 7. The control unit, when the power supply to the image display device is stopped or the operation mode of the image display device is a low power mode,
When it is determined that all of the plurality of input image control signals supplied from the external signal source are valid signals, the suspension of power supply to the image display device is released to start the power supply, or 7. The image display device according to claim 1, further comprising a power supply recovery means for returning the operation mode of the image display device from the low power mode to the normal operation mode. 8. The control unit, when the power supply to the image display device is stopped or the operation mode of the image display device is a low power mode,
Of the plurality of input image control signals supplied from the external signal source, when it is determined that the input image control signal corresponding to the specific display area preselected from the plurality of display areas is a valid signal, the image Power supply recovery means for releasing the stop of power supply to the display device to start the power supply or for returning the operation mode of the image display device from the low power mode to the normal operation mode is included. The image display device according to any one of claims 1 to 6. 9. Each of the plurality of input image control signals includes at least one of a vertical synchronizing signal, a horizontal synchronizing signal, a dot clock signal, a data enable signal, and a color data signal. Item 9. The image display device according to any one of items 1 to 8. 10. The image display device according to claim 1, wherein the image display device is a liquid crystal panel module. 11. The image display device according to claim 4, wherein the specific display area is a display area located at the upper left of the screen.