JP3209700B2 - Photovoltaic device and module - Google Patents

Photovoltaic device and module

Info

Publication number
JP3209700B2
JP3209700B2 JP09527797A JP9527797A JP3209700B2 JP 3209700 B2 JP3209700 B2 JP 3209700B2 JP 09527797 A JP09527797 A JP 09527797A JP 9527797 A JP9527797 A JP 9527797A JP 3209700 B2 JP3209700 B2 JP 3209700B2
Authority
JP
Japan
Prior art keywords
electrode
transparent conductive
type layer
conductive film
type
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
JP09527797A
Other languages
Japanese (ja)
Other versions
JPH10275926A (en
Inventor
定司 津毛
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sanyo Electric Co Ltd
Original Assignee
Sanyo Electric Co Ltd
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Filing date
Publication date
Application filed by Sanyo Electric Co Ltd filed Critical Sanyo Electric Co Ltd
Priority to JP09527797A priority Critical patent/JP3209700B2/en
Publication of JPH10275926A publication Critical patent/JPH10275926A/en
Application granted granted Critical
Publication of JP3209700B2 publication Critical patent/JP3209700B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

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Classifications

    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02EREDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
    • Y02E10/00Energy generation through renewable energy sources
    • Y02E10/50Photovoltaic [PV] energy
    • Y02E10/548Amorphous silicon PV cells

Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【0001】[0001]

【発明の属する技術分野】本発明は、半導体接合として
結晶系シリコンと非晶質シリコンとの接合を備えたHI
T構造の光起電力装置(太陽電池)及びその装置から構
成されたモジュールに関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an HI having a junction of crystalline silicon and amorphous silicon as a semiconductor junction.
The present invention relates to a photovoltaic device (solar cell) having a T structure and a module including the device.

【0002】[0002]

【従来の技術】従来、単結晶シリコン或いは多結晶シリ
コン等の結晶系シリコン半導体と、非晶質シリコンに代
表される非晶質半導体との半導体接合を備えた光起電力
装置として、例えば、特開平4−130671号公報
(H01L 31/04)に記載されているHIT構造
の光起電力装置が知られている。
2. Description of the Related Art Conventionally, as a photovoltaic device having a semiconductor junction of a crystalline silicon semiconductor such as single crystal silicon or polycrystalline silicon and an amorphous semiconductor represented by amorphous silicon, for example, A photovoltaic device having a HIT structure described in Japanese Unexamined Patent Publication No. 4-130671 (H01L 31/04) is known.

【0003】このHIT構造の光起電力装置において
は、互いに逆導電型の関係を有する単結晶半導体と非晶
質半導体との間に、真性の非晶質半導体層を介在させる
ことで、その光起電力特性を大幅に向上させている。
In this photovoltaic device having the HIT structure, an intrinsic amorphous semiconductor layer is interposed between a single crystal semiconductor and an amorphous semiconductor having a relationship of opposite conductivity type to each other, so that the The electromotive force characteristics are greatly improved.

【0004】ところで、かかる結晶系シリコンを用いた
光起電力装置にあっては、材料費の節減のため、結晶系
シリコン基板の厚さを150μm程度にまで薄膜化する
ことが検討されている。
Meanwhile, in such a photovoltaic device using crystalline silicon, it has been studied to reduce the thickness of the crystalline silicon substrate to about 150 μm in order to reduce material costs.

【0005】しかしながら、光入射側電極として透明導
電膜/受光面電極構造を用い、裏面側電極として金属膜
/集電極構造を用いた従来の光起電力装置にあっては、
基板の薄膜化に伴い、前記透明導電膜と金属膜との熱膨
張係数の差に起因するストレスの影響が増大し、基板に
りが生じるという課題がある。そして、かかる課題を
解決するために、裏面側電極も透明導電膜/集電極構造
にすることが検討されている。
However, in a conventional photovoltaic device using a transparent conductive film / light receiving surface electrode structure as a light incident side electrode and a metal film / collector electrode structure as a back side electrode,
With the thinning of the substrate, the influence of stress due to the difference in thermal expansion coefficient between the transparent conductive film and the metal film increases,
Its Ri there is a problem that is caused. In order to solve such a problem, studies have been made to make the rear electrode also have a transparent conductive film / collector electrode structure.

【0006】従来のこの種光起電力装置につき、断面図
の図3を参照して説明する。同図において、1はn型の
単結晶シリコンの半導体からなる基板、2,3は真性の
非晶質シリコンからなるi型層及びp型非晶質シリコン
からなるp型層であり、基板1の光入射側、即ち表面に
順次積層されている。4はi型層2及びp型層3からな
る表面半導体層、5は酸化スズ(SnO2 ),酸化イン
ジウム(In2 3 )又はIn2 3 にSnを添加した
ITOの表面透明導電膜であり、p型層3上に形成され
ている。6はAgからなる線状の受光面電極であり、表
面透明導電膜5上に形成されている。
A conventional photovoltaic device of this type will be described with reference to FIG. In FIG. 1, reference numeral 1 denotes a substrate made of an n-type single crystal silicon semiconductor, and reference numerals 2 and 3 denote an i-type layer made of intrinsic amorphous silicon and a p-type layer made of p-type amorphous silicon. Are sequentially laminated on the light incident side, that is, the surface. 4 is a surface semiconductor layer composed of an i-type layer 2 and a p-type layer 3 and 5 is a surface transparent conductive film of ITO in which Sn is added to tin oxide (SnO 2 ), indium oxide (In 2 O 3 ) or In 2 O 3. And is formed on the p-type layer 3. Reference numeral 6 denotes a linear light-receiving surface electrode made of Ag, which is formed on the surface transparent conductive film 5.

【0007】そして、基板1の光入射側とは反対側、即
ち裏面に、i型層2及びn型非晶質シリコンからなるn
型層7が積層された裏面半導体層8が形成され、その裏
面半導体層8上に裏面透明導電膜9が形成され、裏面透
明導電膜9上にAgからなる線状の集電極10が形成さ
れている。
On the opposite side of the substrate 1 from the light incident side, that is, on the back surface, an n-type layer 2 and an n-type amorphous silicon
A backside semiconductor layer 8 on which a mold layer 7 is laminated is formed, a backside transparent conductive film 9 is formed on the backside semiconductor layer 8, and a linear collector electrode 10 made of Ag is formed on the backside transparent conductive film 9. ing.

【0008】[0008]

【発明が解決しようとする課題】従来の前記装置の場
合、金属が酸化することにより、表面透明導電膜5,受
光面電極6間及び裏面透明導電膜9,集電極10間の密
着性が低下し、両電極6,10が剥離して信頼性が低下
するという問題点がある。
In the case of the conventional device, the metal is oxidized, so that the adhesion between the front transparent conductive film 5 and the light receiving surface electrode 6 and between the rear transparent conductive film 9 and the collector electrode 10 is reduced. However, there is a problem that the two electrodes 6 and 10 are peeled off and the reliability is reduced.

【0009】本発明は、前記の点に留意し、受光面電極
及び集電極の剥離を防止し、しかも、熱処理によるそり
をなくし、信頼性向上したHIT構造の光起電力装置
及びモジュールを提供することを目的とする。
The present invention has been made in consideration of the above points, and has a light receiving surface electrode.
To prevent exfoliation of the collector electrode and warpage due to heat treatment.
The lost, and to provide a photovoltaic device and a module for HIT structure with improved reliability.

【0010】[0010]

【課題を解決するための手段】前記課題を解決するため
に、本発明の請求項1記載の光起電力装置は、n型の単
結晶シリコンからなる基板と、該基板の光入射側に設け
られたP型の非晶質シリコンからなるp型層と、前記基
板の光入射側とは反対側に設けられたn型の非晶質シリ
コンからなるn型層と、を備え、 前記p型層上及び前記
n型層上にそれぞれ表面透明導電膜及び裏面透明導電膜
が形成され、 前記p型層と前記表面透明導電膜との界
面、及び前記n型層と前記裏面透明導電膜との界面に、
それぞれ金属からなる受光面電極及び集電極が、面対称
の略同一パターンで形成されたものである。
According to another aspect of the present invention, there is provided a photovoltaic device comprising an n-type photovoltaic device.
A substrate made of crystalline silicon, provided on the light incident side of the substrate
A p-type layer made of p-type amorphous silicon,
N-type amorphous silicon layer provided on the opposite side of the plate from the light incident side.
An n-type layer made of a con, and on the p-type layer and
A front transparent conductive film and a rear transparent conductive film on the n-type layer, respectively.
Is formed, and an interface between the p-type layer and the surface transparent conductive film is formed.
Surface, and at the interface between the n-type layer and the back transparent conductive film,
The light receiving surface electrode and collector electrode made of metal, respectively, are plane symmetric
Are formed in substantially the same pattern .

【0011】したがって、受光面電極及び集電極が、p
型層上及びn型層に直接接し、電極と層との界面に
極薄い合金層が形成され、この合金層により電極と
層との密着性が向上し、電極の剥離を防止することが
きる
Therefore, the light receiving surface electrode and the collector electrode are p
Direct contact with the mold layer and the n-type layer, very thin alloy layer is formed at the interface between the electrodes and the two layers improves the adhesion between the electrodes and the two <br/> layer by the alloy layer, both it is cut with <br/> to prevent peeling of the electrode.

【0012】[0012]

【0013】[0013]

【0014】しかも、両電極を面対称の略同一パターン
に形成することにより、熱処理によるそりをなくすこと
ができる。そのため、信頼性の高いHIT構造の光起電
力装置を提供することができる。
In addition, by forming both electrodes in substantially the same pattern with plane symmetry , warpage due to heat treatment can be eliminated. Therefore, a highly reliable HIT photovoltaic
A force device can be provided.

【0015】また、本発明の請求項記載のモジュール
は、請求項1記載の光起電力装置から構成されたもので
あり、受光面電極及び集電極の剥離及び熱処理によるそ
がなく、信頼性の高いモジュールを得ることができ
る。
Further, the module according to a second aspect of the present invention has been constructed from the photovoltaic device according to claim 1 Symbol placement, its due to peeling and heat treatment of the light-receiving surface electrode and a collector electrode
Ri but not, it is possible to obtain a highly reliable module.

【0016】[0016]

【発明の実施の形態】実施の1形態につき、断面図の図
1及び製造プロセスの説明図の図2A,B,Cを参照し
て説明する。それらの図において、図3と同一符号は同
一もしくは相当するものを示し、異なる点は、つぎの通
りである。
DESCRIPTION OF THE PREFERRED EMBODIMENTS One embodiment will be described with reference to FIG. 1 of a sectional view and FIGS. 2A, 2B and 2C of an explanatory view of a manufacturing process. In these figures, the same reference numerals as those in FIG. 3 indicate the same or corresponding elements, and the differences are as follows.

【0017】n型の単結晶シリコンの半導体からなる基
板1の表面半導体層4のp型層3と表面透明導電膜5と
の界面に受光面電極6を介在し、裏面半導体層8のn型
層7と裏面透明導電膜9との界面に集電極10を介在
し、かつ、集電極10と受光面電極6との電極パターン
を略同一パターン,即ち面対称にし、かつ、表面透明導
電膜5及び受光面電極6と、裏面透明導電膜9及び集電
極10とを面対称、即ち基板1側に両電極6,10を配
置し、この上にそれぞれ両透明導電膜5,9を配置して
いる。
A light-receiving surface electrode 6 is interposed at the interface between the p-type layer 3 of the surface semiconductor layer 4 of the substrate 1 made of an n-type single crystal silicon semiconductor and the front transparent conductive film 5, and the n-type of the back surface semiconductor layer 8 is formed. The collector electrode 10 is interposed at the interface between the layer 7 and the back transparent conductive film 9, and the electrode patterns of the collector electrode 10 and the light receiving surface electrode 6 are made substantially the same pattern, that is, plane symmetrical. The light-receiving surface electrode 6 and the back transparent conductive film 9 and the collecting electrode 10 are plane-symmetrical, that is, both electrodes 6 and 10 are arranged on the substrate 1 side, and both transparent conductive films 5 and 9 are arranged thereon. I have.

【0018】つぎに製造方法について説明する。まず、
図2Aに示すように、基板1の表面にi型層2及びp型
層3をプラズマCVD法により順次積層して表面半導体
層4を形成し、つぎに、図2Bに示すように、基板1の
裏面にi型層2及びn型層7をプラズマCVD法により
順次積層して裏面半導体層8を形成する。
Next, the manufacturing method will be described. First,
As shown in FIG. 2A, an i-type layer 2 and a p-type layer 3 are sequentially laminated on the surface of the substrate 1 by a plasma CVD method to form a surface semiconductor layer 4, and then, as shown in FIG. An i-type layer 2 and an n-type layer 7 are sequentially laminated on the back surface of the substrate by a plasma CVD method to form a back surface semiconductor layer 8.

【0019】そして、図2Cに示すように、p型層3上
にペースト状の受光面電極6をスクリーン印刷法を用い
てパターン形成し、受光面電極6と同様に、n型層7上
に集電極10を形成し、所定の温度で焼成する。その
後、図1に示すように、p型層3及びn型層7上に表
面,裏面透明導電膜5,9をスパッタ法により形成す
る。
Then, as shown in FIG. 2C, a paste-like light-receiving surface electrode 6 is formed on the p-type layer 3 by patterning using a screen printing method. The collector electrode 10 is formed and fired at a predetermined temperature. Thereafter, as shown in FIG. 1, front and rear transparent conductive films 5 and 9 are formed on the p-type layer 3 and the n-type layer 7 by a sputtering method.

【0020】なお、前記形態の場合、装置の裏面側は透
光性を有するため、装置単体では、特性が大きく低下す
ることになる。
In the case of the above-described embodiment, since the rear surface of the device has a light-transmitting property, the characteristics of the device alone are greatly reduced.

【0021】しかし、実際にモジュールとして使用する
場合は、装置の裏面に、白色の、ポリビニルフロライド
(PVF)、ポリエチレンテレフタレート(PET)、
ポリエチレンナフタレート(PEN)等の樹脂或いは金
属からなる高反射材料を設けることにより、特性の低下
を防ぐことができる。
However, when actually used as a module, white polyvinyl fluoride (PVF), polyethylene terephthalate (PET),
By providing a high-reflection material made of a resin such as polyethylene naphthalate (PEN) or a metal, it is possible to prevent deterioration in characteristics.

【0022】[0022]

【0023】そして、ITOからなる透明導電膜とAg
からなる電極との組み合わせを例にとって説明したが、
透明導電膜としてSnO2 ,酸化亜鉛(ZnO)、電極
として鉛(Pb),チタン(Ti)を用いた組み合わせ
であってもよい。
Then , a transparent conductive film made of ITO and Ag
Although the combination with the electrode consisting of is described as an example,
A combination using SnO2 and zinc oxide (ZnO) as the transparent conductive film and lead (Pb) and titanium (Ti) as the electrode may be used.

【0024】(実施例)つぎに実施例について説明す
る。基板の両面に形成したHIT構造の半導体層及び透
明導電膜の形成条件を表1に示す。
(Embodiment) Next, an embodiment will be described. Table 1 shows the conditions for forming the HIT structure semiconductor layer and the transparent conductive film formed on both surfaces of the substrate.

【0025】[0025]

【表1】 [Table 1]

【0026】なお、透明導電膜は、電極形成後、130
℃〜250℃の温度で焼成し、表1の条件を用いて形成
した。
After the formation of the electrode, the transparent conductive film is
It was fired at a temperature of from about 250C to about 250C, and was formed using the conditions shown in Table 1.

【0027】つぎに、図1及び図3の光起電力装置の熱
サイクル試験を実施し比較した。熱サイクルは、−40
℃で1時間保持した後に、2時間かけて+90℃に昇温
し、次いで+90℃で1時間保持した後に、2時間かけ
て再度−40℃に降温し、このプロセスを200回行っ
た。その結果を表2に示す。
Next, a thermal cycle test of the photovoltaic devices of FIGS. 1 and 3 was performed and compared. Thermal cycle is -40
After holding at 1 ° C. for 1 hour, the temperature was raised to + 90 ° C. over 2 hours, and then held at + 90 ° C. for 1 hour, and then lowered again to −40 ° C. over 2 hours, and this process was performed 200 times. Table 2 shows the results.

【0028】[0028]

【表2】 [Table 2]

【0029】図1の装置の場合、図3の装置に比して特
性の低下が抑えられていることが明らかであり、図3の
装置の特性の低下は、主に曲線因子であり、電極の剥離
による抵抗増大が原因である。
It is clear that the device of FIG. 1 suppresses the deterioration of the characteristics as compared with the device of FIG. 3, and the deterioration of the characteristics of the device of FIG. This is due to an increase in resistance due to peeling of the metal.

【0030】なお、両電極6,10の形成には通常銀ペ
ースト等の、ペースト状の樹脂に金属を混入させたもの
をp型層3或いはn型層7上に塗布し、焼成工程を経て
形成する。
The electrodes 6 and 10 are usually formed by applying a paste-like resin, such as a silver paste, into which a metal is mixed, on the p-type layer 3 or the n-type layer 7, followed by a firing step. you formed.

【0031】[0031]

【0032】[0032]

【0033】[0033]

【発明の効果】本発明は、以上説明したように構成され
ているため、つぎに記載する効果を奏する。本発明の光
起電力装置は、基板の光入射側の非晶質シリコンからな
るp型層とその上の表面透明導電膜との界面、及び基板
の光入射側と反対側の非晶質シリコンからなるn型層と
その上の裏面透明導電膜との界面に、それぞれ金属から
なる受光面電極及び集電極を、面対称の略同一パターン
形成したため、電極が層に直接接し、電極と
層との界面に極薄い合金層が形成され、この合金層によ
電極と層との密着性が向上し、受光面電極及び集
電極の剥離を防止することができ、しかも、受光面電極
と集電極とが面対称の略同一パターンで形成されたた
め、熱処理による電極のそりをなくすことができ、信頼
性の高いHIT構造の光起電力装置を提供することがで
きる。
Since the present invention is configured as described above, it has the following effects. The photovoltaic device of the present invention is made of amorphous silicon on the light incident side of the substrate.
Between the p-type layer and the surface transparent conductive film thereon and the substrate
N-type layer made of amorphous silicon on the side opposite to the light incident side of
A light receiving surface electrode and a collector electrode made of metal are respectively provided on the interface with the transparent conductive film on the back surface on the same pattern in a plane symmetrical manner .
Since in the formation, in contact with the electrodes directly to both layers, very thin alloy layer is formed at the interface between the electrodes and the two <br/> layer improves the adhesion between the electrodes and the two layers by the alloy layer The separation of the light receiving surface electrode and the collecting electrode can be prevented, and the light receiving surface electrode
And the collector electrode are formed in almost the same pattern with plane symmetry.
And eliminates electrode warpage due to heat treatment
It is possible to provide a photovoltaic device having a high-performance HIT structure .

【0034】[0034]

【0035】また、前記装置を用いてモジュールを構成
することにより、信頼性の高いHIT構造のモジュール
を得ることができる。
Further, by configuring a module using the above-described device, a highly reliable HIT structure module can be obtained.

【図面の簡単な説明】[Brief description of the drawings]

【図1】本発明の実施の1形態の断面図である。FIG. 1 is a cross-sectional view of one embodiment of the present invention.

【図2】A,B,Cは図1の製造プロセスの説明図であ
る。
FIGS. 2A, 2B, and 2C are explanatory diagrams of the manufacturing process of FIG. 1;

【図3】従来例の断面図である。FIG. 3 is a sectional view of a conventional example.

【符号の説明】[Explanation of symbols]

4 表面半導体層 5 表面透明導電膜 6 受光面電極 8 裏面半導体層 9 裏面透明導電膜 10 集電極 Reference Signs List 4 front semiconductor layer 5 front transparent conductive film 6 light receiving surface electrode 8 back semiconductor layer 9 back transparent conductive film 10 collector electrode

───────────────────────────────────────────────────── フロントページの続き (58)調査した分野(Int.Cl.7,DB名) H01L 31/04 - 31/078 ──────────────────────────────────────────────────続 き Continued on the front page (58) Field surveyed (Int.Cl. 7 , DB name) H01L 31/04-31/078

Claims (2)

(57)【特許請求の範囲】(57) [Claims] 【請求項1】 n型の単結晶シリコンからなる基板と、
該基板の光入射側に設けられたP型の非晶質シリコンか
らなるp型層と、前記基板の光入射側とは反対側に設け
られたn型の非晶質シリコンからなるn型層と、を備
え、 前記p型層上及び前記n型層上にそれぞれ表面透明電極
膜及び裏面透明電極膜が形成され、 前記p型層と前記表面透明導電膜との界面、及び前記n
型層と前記裏面透明導電膜との界面に、それぞれ金属か
らなる受光面電極及び集電極が、面対称の略同一パター
ンで形成されている ことを特徴とする光起電力装置。
A substrate made of n-type single crystal silicon;
P-type amorphous silicon provided on the light incident side of the substrate
And a p-type layer formed on the side opposite to the light incident side of the substrate.
An n-type layer made of n-type amorphous silicon.
For example, each surface transparent electrode on the p-type layer and the n-type layer
A film and a back transparent electrode film are formed , and an interface between the p-type layer and the front transparent conductive film;
Metal at the interface between the mold layer and the back transparent conductive film
The light-receiving surface electrode and the collecting electrode are
A photovoltaic device characterized by being formed of a photovoltaic device.
【請求項2】 請求項1記載の光起電力装置から構成さ
れたことを特徴とするモジュール。
2. A photovoltaic device according to claim 1.
A module characterized by the following.
JP09527797A 1997-03-28 1997-03-28 Photovoltaic device and module Expired - Fee Related JP3209700B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
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Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP09527797A JP3209700B2 (en) 1997-03-28 1997-03-28 Photovoltaic device and module

Publications (2)

Publication Number Publication Date
JPH10275926A JPH10275926A (en) 1998-10-13
JP3209700B2 true JP3209700B2 (en) 2001-09-17

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* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE602004032509D1 (en) 2004-01-13 2011-06-16 Sanyo Electric Co Photovoltaic device
JP5535709B2 (en) * 2010-03-19 2014-07-02 三洋電機株式会社 SOLAR CELL, SOLAR CELL MODULE USING THE SOLAR CELL, AND SOLAR CELL MANUFACTURING METHOD
EP2672522A4 (en) * 2011-01-31 2014-03-19 Sanyo Electric Co Photoelectric conversion element
JP5328849B2 (en) * 2011-06-20 2013-10-30 三洋電機株式会社 Manufacturing method of solar cell module
WO2013094233A1 (en) * 2011-12-21 2013-06-27 三菱電機株式会社 Solar cell, method for producing same, and solar cell module
WO2013128566A1 (en) * 2012-02-28 2013-09-06 三洋電機株式会社 Solar cell and method for manufacturing same
JP6389639B2 (en) * 2014-05-14 2018-09-12 シャープ株式会社 Photoelectric conversion element

Also Published As

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