JP3209237B2 - A / D converter - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an A / D converter, and more particularly to a high-speed A / D converter in which a plurality of A / D converters are connected in parallel to each other and operated sequentially.

[0002]

2. Description of the Related Art A conventional example of an A / D converter in which a plurality of A / D converters are connected in parallel and operated sequentially will be described with reference to FIG. FIG. 1A shows a conventional example of A /
FIG. 1B is a block diagram of the D converter, and FIG. 1B is a timing chart thereof. A plurality of A / D converters, for example, two A / D converters are connected in parallel with each other and operated alternately to form an A / D converter having an operation speed twice as high as that of a single A / D converter. be able to. This will be described with reference to FIG. 1, where an A / D converter A and an A / D converter B
Are connected in parallel with each other, and the supplied analog input is supplied to the A / D A output and A
/ DB output is output alternately. These outputs are alternately switched and output via the multiplexer 2, and eventually,
This is the final output required after multiplexing. The final output, as shown, the output a _n and b _n by A / D converters A and A / D converter B appeared alternately A / D
The output of the operation speed is twice the operation speed of each of the converter A and the A / D converter B.

[0003]

In the above-described A / D converter in which a plurality of A / D converters are connected in parallel to each other and operated sequentially, the A / D converters A and A
Due to the unavoidable gain error and offset error between the A / D converter B and
The waveform is distorted as shown in FIG. FIG. 2 (a)
FIG. 3 is a diagram showing a digital data waveform including distortion caused by a gain error, and shows an example in which the gain error is 10%. FIG. 2B is a diagram showing a digital data waveform including a distortion caused by an offset error, in which the offset error is 10%. FIG. 2 (a) and FIG.
In either case of (b), the error appears as it is between adjacent data.

The present invention provides an A / D converter in which a plurality of A / D converters are connected in parallel to each other and operated sequentially, in which the above-mentioned problems have been solved. It is.

[0005]

A differentiator for obtaining a change in an analog input waveform is provided. A distribution switch for sequentially switching and outputting a differential output waveform of the differentiator is provided. And a plurality of integrators 5 for sequentially integrating the differential output waveforms supplied through the A / D converters. A / D of the A / D converter 1
An A / D converter including the adder 6 for adding the conversion output was configured.

[0006]

An embodiment of the present invention will be described with reference to FIG. FIG. 3A is a block diagram of the A / D converter of the present invention, and FIG. 3B is a timing chart thereof. Reference numeral 3 denotes a differentiator for differentiating an analog input waveform to obtain a change. Reference numeral 4 denotes a distribution switch for sequentially switching and outputting the differentiated output waveform of the differentiator 3. Reference numeral 5 denotes an integrator which is connected to the distribution switch 4 and integrates a differential output waveform supplied through the distribution switch 4. Integrator 5
Is provided at each of the fixed contacts of the distribution switch 4. Reference numeral 1 denotes an A / D converter, which is connected to each output of the integrator 5 to A / D convert each integrated output waveform. 6 is an adder, which is an A / D converter of the A / D converter 1
Add the converted output.

Here, the operation of the A / D converter of the present invention will be described with reference to various input / output waveforms. First, FIG.
(A) shows an analog input waveform to the differentiator 3.
The output waveform of the differentiator 3 obtained by differentiating the analog input waveform is as shown in FIG. Assuming that the analog input waveform is a sine wave, the output waveform obtained by differentiating the analog input waveform in the differentiator 3 is a cosine wave.

FIGS. 5A and 5B show distribution output waveforms distributed by the distribution switch 4, respectively. The distribution output waveform shown in FIG. 5A is a waveform obtained when the movable contact of the distribution switch 4 is connected to the upper fixed contact, and the distribution output waveform shown in FIG. It is a waveform obtained when a contact is connected to a lower fixed contact. The distribution switch 4 is formed of an electronic switch that operates at high speed.

Here, the distribution output waveform shown in FIG. 5A is supplied to an integrator 5, where it is integrated.
FIG. 6A shows an output waveform of the integrator 5. That is, each time a substantially strip-shaped individual input exists, it is integrated in the integrator 5, and the output waveform of the integrator 5 increases or decreases each time. In the section where there is no strip-shaped input, the output waveform of the integrator 5 keeps horizontal each time following the immediately preceding increase or decrease. As described above, FIG.
The distribution output waveform shown in (b) is supplied to the integrator 5 ', where it is integrated. FIG. 6B shows an integrator 5 ′.
FIG. That is, each time a substantially strip-shaped individual input exists, it is integrated in the integrator 5 ', and the output waveform of the integrator 5' increases or decreases each time.
In the section where there is no rectangular input, the integrator 5 '
The output waveforms remain horizontal each time following the previous increase or decrease.

The output waveform of the integrator 5 shown in FIG. 6A is then sent to the A / D converter 1 while the output waveform of FIG.
The output waveform of the integrator 5 'shown in (b) is sent to the A / D converter 1'. These A / D converters 1 and A
The A / D conversion in the / D converter 1 'is controlled so that the A / D conversion is performed alternately as shown in FIGS. 7A and 7B. If A / D conversion is performed while maintaining the horizontality of the waveforms sent to the A / D converter 1 and the A / D converter 1 ', the timing can be given a margin within the width.

FIG. 7C shows the result of adding the A / D output of the A / D converter 1 and the A / D output of the A / D converter 1 'in the adder 6, and a simulation diagram is shown in FIG. As shown. FIG. 9 shows 10% for two A / D converters.
And a total gain error of about 5
% Gain error, but the distortion component is small.

FIG. 10 shows a case where there is a 10% offset error in the two A / D converters.
% Offset error, but the distortion component is small.

[0013]

As described above, the output of the adder 6 of the A / D converter according to the present invention, in which a plurality of A / D converters are connected in parallel with each other and operated sequentially, is shown in FIG. 7
As shown in (c), since the output of one A / D converter and the output of the other A / D converter are added, the resolution of the A / D converter is improved, Furthermore, gain errors and offset errors inevitably existing between the A / D converters do not significantly affect the characteristics of the entire A / D converter.

[Brief description of the drawings]

FIG. 1 is a diagram illustrating a conventional example of an A / D converter.
(A) is a block diagram thereof, and (b) is a timing chart thereof.

FIG. 2 is a diagram showing an output waveform of a conventional example of an A / D converter, and FIG. 2 (a) is a diagram showing a digital data waveform including distortion caused by a gain error, wherein the gain error is 10%. This is an example. FIG. 3B is a diagram showing a digital data waveform including distortion caused by an offset error, in which the offset error is 10%.

FIGS. 3A and 3B are diagrams illustrating an embodiment of the present invention, wherein FIG.
FIG. 3 is a block diagram of an A / D converter according to the present invention, and FIG.
Is a timing chart.

FIG. 4A is a diagram illustrating an analog input waveform to a differentiator, and FIG. 4B is a diagram illustrating an output waveform of a differentiator obtained by differentiating the analog input waveform.

FIGS. 5A and 5B are diagrams showing distribution output waveforms distributed by distribution switches, respectively.

FIGS. 6A and 6B are diagrams showing output waveforms of an integrator, respectively.

FIGS. 7A and 7B are diagrams for explaining timing control of A / D conversion in the A / D converter; FIG.
(C) is a diagram showing an adder output.

FIG. 8 is a diagram showing an output corresponding to the adder output of FIG. 7 (c).

FIG. 9 is a diagram showing an output corresponding to the adder output of FIG. 7C, and is an example in which a gain error is 10%.

FIG. 10 is a diagram illustrating an output corresponding to the adder output of FIG. 7C, in which an offset error is 10%.

[Explanation of symbols]

 Reference Signs List 1 A / D converter 3 Differentiator 4 Distribution switch 5 Integrator 6 Adder

──────────────────────────────────────────────────続 き Continued on the front page (58) Field surveyed (Int.Cl. ⁷ , DB name) H03M 1/00-1/88 H03H 17/02

Claims (1)

(57) [Claims] 1. A distribution switch for sequentially switching and outputting a differential output waveform of a differentiator, comprising a differentiator for obtaining a change in an analog input waveform, connected to the distribution switch and supplied through the distribution switch. A plurality of integrators for sequentially integrating the differential output waveforms are provided, and the integrated output waveforms of the integrators are A / D
An A / D converter for conversion is provided in each of the integrators.
An A / D converter comprising an adder for adding an A / D conversion output of the / D converter.