JP3208596B2 - Dry etching method - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a dry etching method applied in the field of manufacturing semiconductor devices and the like, and more particularly to a method for performing high-selection, low-damage, and low-contamination etching of a silicon compound layer while suppressing a microloading effect. .

[0002]

2. Description of the Related Art As high integration and high performance of semiconductor devices have progressed as seen in recent VLSI, ULSI, etc., dry etching of a silicon compound layer typified by silicon oxide (SiO _x ) is also required. Technical requirements are becoming more stringent.

First, the area of device chips has been increased due to high integration, and the diameter of the wafer has been increased. The pattern to be formed has been highly miniaturized, and uniform processing within the wafer surface has been required. Due to the demand for high-mix low-volume production as represented by the ASIC, etc., the mainstream of dry etching equipment is shifting from a conventional batch type to a single-wafer type. At this time, in order to maintain the same productivity as the conventional one, the etching rate per wafer must be greatly improved.

Further, under the circumstances where the junction depth of the impurity diffusion region is reduced and the thickness of various material layers is reduced in order to increase the speed and miniaturization of the device, the selectivity to the underlayer is better than before. An etching technique with less damage is required. For example, an impurity diffusion region formed in a semiconductor substrate or a PM used as a resistance load element of an SRAM.
In a case where a contact is to be formed in a source / drain region of an OS transistor or the like, a process of etching an SiO ₂ interlayer insulating film using a silicon substrate or a polycrystalline silicon layer as a base is a good example.

[0005] Further, improvement of the selectivity to resist is also an important issue. This is because, in submicron devices, the occurrence of slight dimensional change due to resist receding is no longer allowed.

Conventionally, etching of a SiO _x -based material layer has been performed in a mode with enhanced ionicity in order to cut a strong Si—O bond. A typical etching gas is CHF ₃ , CF ₄ or the like, and the incident energy of ions such as CF _x ⁺ generated from these gases is used for anisotropic processing. However, in order to perform high-speed etching, it is necessary to increase this incident ion energy.
Since the etching reaction is close to the physical sputter reaction, high speed and selectivity have always been contrary.

Therefore, usually, the apparent C / F ratio (the ratio of the number of carbon atoms to the number of fluorine atoms) of the etching reaction system is increased by adding H ₂ or a depositing hydrocarbon compound to the etching gas. And promotes the deposition of the carbon-based polymer in competition with the etching reaction, thereby achieving high selectivity.

[0008] Instead of these conventional etching gases,
The applicant of the present application has previously proposed in Japanese Patent Application No. 2-75828 a dry etching method of a silicon compound layer using a saturated or unsaturated high-order chain fluorocarbon compound having 2 or more carbon atoms. This is C ₂ F ₆ , C
₃ F _8, efficiently to generate CF _x ⁺ By using C ₄ F _10, C ₄ F fluorocarbon compounds such as _8,
This is to speed up the etching. However, the use of a single high-order chain fluorocarbon compound alone also increases the amount of F ^* generated, making it impossible to sufficiently increase the selectivity with respect to the resist and the selectivity with respect to the silicon underlayer.
For example, when an SiO _x layer on a silicon substrate is etched using C ₃ F ₈ as an etching gas, high-speed operation is achieved, but the selectivity to resist is as low as about 1.3.
In addition to the insufficient etching resistance, a dimensional conversion difference occurs due to the retreat of the pattern edge. In addition, since the selectivity to silicon is about 4.2, there remains a problem in over-etching resistance.

Therefore, in order to solve these problems, in the above-mentioned prior art, etching using only a high-order chain fluorocarbon compound is stopped immediately before the underlayer is exposed, and carbon etching is performed when the remaining portion of the silicon compound layer is etched. In order to accelerate the deposition of the base polymer, the above compound is further added with C ₂
Two-stage etching is performed in which a hydrocarbon compound such as H ₄ (ethylene) is added. This is because while supplying C atoms into the etching reaction system, H ^* generated in the plasma consumes excess F ^* and changes to HF,
The purpose is to increase the apparent C / F ratio.

However, in the present situation where the design rule of a semiconductor device is highly miniaturized, a dimensional conversion difference from an etching mask has already become almost unacceptable. However, it is necessary to further improve the selectivity in the first-stage etching. In addition, as the miniaturization further progresses in the future, it is considered that the influence of the particle contamination by the carbon-based polymer may become serious. Therefore, it is desired to reduce the amount of the deposition gas used in the second-stage etching as much as possible. .

From this point of view, the present inventor has previously described Japanese Patent Application No.
-295225, a technique in which a silicon compound layer is etched using a chain unsaturated fluorocarbon compound having at least one unsaturated bond in a molecule while controlling the temperature of a substrate to be processed to 50 ° C. or less. Has been proposed. The chain unsaturated fluorocarbon compound is, for example, C ₄ F ₈ (octafluorobutene) or C ₃ F ₈ (octafluorobutene).
F ₆ (hexafluoropropene) and the like. These compounds theoretically generate two or more CF _x ⁺ from one molecule by discharge dissociation, so that SiO _x can be etched at a high speed. In addition, since it has an unsaturated bond in the molecule, it is easy to generate highly active radicals by dissociation,
Polymerization of the carbon-based polymer is promoted. Moreover, since the temperature of the substrate to be processed is controlled to 50 ° C. or less, the deposition of the carbon-based polymer is promoted.

According to this technique, selectivity with respect to resist and selectivity with respect to silicon underlayer can be greatly improved without using a deposition gas, and particle contamination can be reduced.

Further, the applicant of the present application has previously filed Japanese Patent Application No.
No. 966 proposes a method using an etching gas containing a saturated or unsaturated fluorocarbon compound having a cyclic portion in at least a part of the molecular structure. Since the fluorocarbon compound in this case has a cyclic portion, the number of carbon atoms in one molecule is 3 or more, and CF _x ⁺ is efficiently generated to enable high-speed etching. Further, since the number of F atoms is two or more smaller than that of the chain molecule having the same carbon number, the C / F ratio is increased and the carbon-based polymer is also easily deposited. Therefore, highly selective etching can be performed without using a deposition gas.

[0014]

As described above, the dry etching method using various kinds of higher-order fluorocarbon compounds proposed by the present inventor has a very great advantage as compared with the prior art. Was. However, if the design rules of the semiconductor device are further miniaturized in the future, the need to suppress the microloading effect is particularly increased in, for example, hole processing in which the area to be etched becomes less than 5% of the wafer area. come. This problem will be described with reference to FIG.

FIG. 3A shows an example in which a SiO ₂ interlayer insulating film 12 is formed on a lower wiring 11, and a resist mask 13 patterned in a predetermined shape is further formed thereon.
Shows a wafer in which is formed. Here, the resist mask 13 has a first opening 13a having an opening diameter of about 0.35 μm and a second opening 13b having an opening diameter of about 0.8 μm.

Next, when the SiO _x interlayer insulating film 12 is etched using a conventionally known higher-order fluorocarbon compound, as shown in FIG. 3B, a carbon-based material is formed inside the second opening 13b. Sidewall protective film 1 made of polymer
The high-speed anisotropic etching proceeds while 4 is formed, and the second connection hole 12b is formed. However, even when the second connection hole 12b is completed, it is often observed that the formation of the first connection hole 12a is not completed in the first opening 13a and the remaining portion 12c remains. This is the microloading effect. This is because the incidence efficiency of the active species is reduced inside the fine pattern and the amount of carbon-based polymer deposited is excessive. Originally, the deposition of the carbon-based polymer on the surface of the SiO _x -based material layer was suppressed to some extent. This is because the carbon-based polymer causes a combustion reaction and is removed by O atoms sputtered from the SiO _x -based material layer. However, in the fine first connection hole 12a as described above, since the area to be etched is small, the amount of O atoms sputtered is small, and the carbon-based polymer is deposited excessively, so that the side wall protective film 1
4 is formed thick. This also causes the side wall surface to be tapered. That is, the continuous accumulation of the carbon-based polymer has an effect of always increasing the substantial mask width. The tapering as described above causes a reduction in the opening diameter of the connection hole and an increase in contact resistance.

Thereafter, assuming that the etching is continued until the remaining portion 12c is removed at the bottom of the first connection hole 12a, the lower layer is formed at the bottom of the second connection hole 12b as shown in FIG. The wiring 11 is removed by sputtering. Such sputter removal, of course, reduces the layer thickness of the lower wiring 11, but when a sputter product deposits on the side wall surface of the connection hole to form a redeposition layer, the redeposition layer forms the upper wiring. This may cause difficulty in formation and increase of particles.

Accordingly, an object of the present invention is to provide a dry etching method capable of suppressing a microloading effect even when performing advanced fine processing on a silicon compound layer.

[0019]

The dry etching method according to the present invention proposed to achieve the above object is as follows.
A fluorocarbon compound represented by the general formula Cm Fn (where m and n are natural numbers indicating the number of atoms and satisfy the conditions of m ≧ 2 and n ≦ 2m), and an oxygen-based compound having oxygen as a constituent element. Etching the silicon compound layer using an etching gas containing

In the present invention, the step of etching the silicon compound layer is divided into two steps of a just etching step and an over-etching step. In the latter over-etching step, the content ratio of the oxygen-based compound to the fluorocarbon compound is adjusted to the just-mentioned. Use less etching gas than in the etching process.

In the present invention, an etching gas containing the fluorocarbon compound and the hydrocarbon compound is used in the over-etching step.

Further, the present invention uses an etching gas containing the fluorocarbon compound and a sulfur-based compound capable of generating sulfur (S) under discharge dissociation conditions in an over-etching step. In the method of the present invention, in the etching step, the silicon compound layer is etched while controlling the temperature of the etching substrate at room temperature or lower.

[0023]

The point of the present invention is to add an oxygen-based compound to a gas system in order to prevent excessive deposition of a carbon-based polymer in the inner part of a fine pattern. In other words, the lack of release of O atoms from SiO _x based material layer,
It compensates from the gas phase. However, if an oxygen-based compound is excessively added, the selectivity to the resist mask or the underlying silicon-based material layer is naturally lowered. Therefore, the amount of the oxygen-based compound needs to be optimized. This optimization will be described later.

In the present invention, the main component of the etching gas is a fluorocarbon compound represented by the general formula C _m F _n . This compound belongs to a so-called higher-order fluorocarbon because the number m of C atoms is 2 or more, and has at least one unsaturated bond if its carbon skeleton is chain-like. Further, when the number m of C atoms is 3 or more, a cyclic structure can be obtained, and any of a saturated ring and an unsaturated ring can be used. The mechanism of achieving high speed and high selectivity by using these fluorocarbon compounds is as described above in connection with the earlier application of the present applicant. In the present invention, by using an etching gas in which an oxygen-based compound is added to a fluorocarbon compound, the carbon-based polymer is decomposed to some extent in the inner part of the fine pattern, and only the minimum amount necessary for securing anisotropy is obtained. Will be deposited. Therefore, the etching rate inside the fine pattern is relatively increased, and the microloading effect is suppressed.

The present invention is based on the above concept, but also proposes a method aiming at further higher selection, lower damage and lower contamination. One is to separate the etching of the silicon compound layer into two steps: a just etching step just before the base material layer is exposed and an over-etching step thereafter, and the oxygen-based compound in the etching gas composition in the latter half of the just etching step. Is a method of reducing the content ratio of According to this method, the decomposition amount of the carbon-based polymer in the vicinity of the interface between the silicon compound layer and the base is slightly reduced as compared with the just etching step, so that higher selection and lower damage are realized.

As a method for further ensuring the underlayer selectivity, an etching gas containing the fluorocarbon compound and the hydrocarbon compound is used in the over-etching step. In this case, oxygen is not involved in the over-etching step, and the amount of the carbon-based polymer deposited is larger than that in the just-etching step due to the contribution of the hydrocarbon compound.

In order to further reduce contamination and damage, a sulfur compound capable of releasing S under discharge dissociation conditions is used in place of the above-mentioned hydrocarbon compound in the overetching step. In this case, since the oxygen does not participate in the over-etching step, the amount of the carbon-based polymer derived from the fluorocarbon compound also increases. However, the deposition of the carbon-based polymer is further supplemented by the deposition of S. Depending on the conditions, S accumulates on the surface of the wafer when the temperature is controlled to be approximately equal to or lower than room temperature, and easily sublimes when heated to approximately 90 ° C. or higher. Therefore, if the wafer is heated after the end of the etching, S itself does not become a source of particle contamination, and a clean process can be realized.

[0028]

DESCRIPTION OF THE PREFERRED EMBODIMENTS Hereinafter, specific embodiments of the present invention will be described. First, before starting the description of the actual process example, the amount of oxygen in the etching reaction system was optimized as a preliminary experiment. Here, a c-C ₄ F ₈ (octafluorocyclobutane) / O ₂ mixed gas is taken as a model of a mixed system of a fluorocarbon compound and an oxygen-based compound, and the etching rate of the SiO ₂ layer when the mixing ratio is changed and The etching rates of the photoresist layers were compared.

The sample wafer is obtained by depositing a SiO ₂ layer on a 5-inch diameter Si wafer by a CVD method, and then applying a novolak-based positive photoresist material (TMSR-V3 manufactured by Tokyo Ohka Kogyo Co., Ltd.). TEG for evaluation
A photoresist layer is formed according to a pattern. Each of these wafers was set in a magnetron RIE (reactive ion etching apparatus), c-C ₄ F ₈ flow rate was 48 SCCM, gas pressure was 2.0 Pa, RF power density was 2.0 W / cm ² (13.56 MHz), and magnetic field was Strength 1.
The fixed conditions were 5 × 10 ⁻² T (= 150 G) and a wafer temperature of −5 ° C., and the O ₂ flow rate was changed in the range of 0 to 15 SCCM.

FIG. 2 shows a part of the results. In the figure, the vertical axis represents the etching rate (nm / min), and the horizontal axis represents c-C ₄ F ₈ (48
SCCM), the flow rate of O ₂ (SCCM) to be added,
The open circle (丸) plots the etching rate of the SiO ₂ layer,
The plots with black circles (●) represent the etching rates of the photoresist layer, respectively. The numerical value in parentheses beside the open circle plot is the resist selectivity. From this figure, it can be seen that the etching rates of the SiO ₂ layer and the photoresist layer both increase as the O ₂ flow rate increases, but the selectivity to resist slightly changes. In this case, the O ₂ content ratio in the entire etching gas is about 2%.
4% was found to be optimal. However,
This value varies depending on the oxygen compound used and the pattern of the etching mask. For example, the TEG pattern described above also includes a line-and-space pattern or the like, since the etched area than that of the etching of only the hole pattern is performed by the actual manufacturing process is slightly larger, O ₂ added The optimal value of the volume should have shifted somewhat towards the minor volume. In consideration of such circumstances, it is considered that the preferable content ratio of the oxygen-based compound is generally in the range of 10 to 50%.

In the following embodiments, specific process examples will be described.

Embodiment 1 In this embodiment, the present invention is applied to hole processing, and c-C ₄ F
_This is an example in which an SiO ₂ interlayer insulating film is etched using an ₈ / O ₂ mixed gas. This process will be described with reference to FIGS. In the wafer used as a sample in this embodiment, as shown in FIG. 1A, a resist mask 3 patterned into a predetermined shape is formed on a lower wiring 1 via an SiO ₂ interlayer insulating film 2. It is. The resist mask 3 has a first opening 3a having an opening diameter of about 0.35 μm and a second opening 3b having an opening diameter of about 0.8 μm. Here, the lower wiring 1 may be an impurity diffusion region formed in a Si substrate, or a metal wiring layer or the like.

The wafer was set on a wafer mounting electrode of a magnetron RIE (reactive ion etching) apparatus. Here, the wafer mounting electrode has a built-in cooling pipe, and by supplying and circulating a coolant to the cooling pipe from a cooling facility such as a chiller connected to the outside of the apparatus,
It is possible to control the temperature of the wafer during etching to a temperature equal to or lower than room temperature. As an example, under the following conditions, SiO 2
Etching of the _two- layer insulating film 2 was performed.

C-C ₄ F ₈ flow rate 45 SCCM O ₂ flow rate 25 SCCM (content ratio in etching gas 35%) Gas pressure 2.0 Pa RF power density 2.0 W / cm ² (13.
56MHz) Magnetic field strength 1.50 × 10 ^-2 T (= 150G) Wafer temperature -30 ° C (using ethanol-based refrigerant)

In this etching process, high-speed etching proceeds due to a large amount of CF _x ⁺ and F ^* generated by dissociation from cC ₄ F ₈ , and the first connection hole 2 a and the second connection hole 2
b was formed. At this time, c-C ₄ F ₈ and resist
The carbon-based polymer derived from the mask 3 forms a side wall protective film (not shown), thereby ensuring high anisotropy. However, since carbon was added to the etching gas, the carbon-based polymer was not excessively deposited inside the first connection hole 2a having a small opening diameter, and the side wall surface was not tapered. That is, the microloading effect was suppressed, and etching proceeded at substantially the same speed inside patterns having different opening diameters. Further, under the above-described etching conditions, the wafer was cooled at a low temperature and the reactivity of F ^* was lowered, so that the surface of the underlying lower wiring 1 was not eroded even after the underlying lower wiring 1 was exposed.

Finally, as shown in FIG. 1C, both the first connection hole 2a and the second connection hole 2b were formed with good anisotropic shapes. In addition, the above-mentioned O
_{With the} addition amount of _2, the film thickness of the resist mask 3 did not significantly decrease and the pattern edge did not recede.

Embodiment 2 In this embodiment, c-C ₄ F
The etching of the SiO ₂ interlayer insulating film using the ₈ / O ₂ mixed gas is divided into two steps, a just etching step and an over etching step, and the selectivity is further reduced by relatively reducing the O ₂ content ratio in the latter step. This is an example of improvement. This process will be described with reference to FIGS. 1 (a), (b) and (c).

First, the wafer shown in FIG. 1A was set in a magnetron RIE apparatus, and as an example, S
The iO ₂ interlayer insulating film 2 was just etched. c-C ₄ F ₈ flow rate 45 SCCM O ₂ flow rate 25 SCCM (content ratio in etching gas: 35%) Gas pressure 2.0 Pa RF power density 2.0 W / cm ² (13.5)
6 MHz) Magnetic field strength 1.5 × 10 ⁻² T Wafer temperature 0 ° C. The etching mechanism in this just etching step is almost as described in the first embodiment. The end point of the just etching was determined when the emission spectrum intensity of SiF ^* at 777 nm started to change. At this time, as shown in FIG. 1B, for example, the second connection hole 2b is completed, and the bottom surface of the first connection hole 2a is
This corresponds to a state in which the remaining portion 2c of the O ₂ interlayer insulating film 2 slightly remains.

Therefore, the etching conditions were switched to the following conditions as an example, and over-etching was performed to remove the remaining portion 2c. c-C ₄ F ₈ flow rate 45 SCCM O ₂ flow rate 5 SCCM (content ratio in etching gas 10%) Gas pressure 2.0 Pa RF power density 1.2 W / cm ² (13.5)
6 MHz) Magnetic field strength 1.5 × 10 ⁻² T Wafer temperature 0 ° C. In this over-etching step, the O ₂ content ratio is reduced to increase the deposition of the carbon-based polymer to such an extent that the loading effect is not promoted, and the RF power is increased. The density was reduced to reduce the incident ion energy. Thereby, as shown in FIG. 1C, the selectivity to the lower wiring 1 is increased and the remaining portion 2 is reduced under the condition that the damage is reduced.
c could be removed.

As described above, excellent high anisotropy and high selectivity etching could be performed by two-step etching without setting the wafer cooling temperature to a low temperature range as in the first embodiment.

Embodiment 3 In this embodiment, similarly, in the hole processing, a c-C ₄ F ₈ / O ₂ mixed gas is used in the just etching step, and a c-C ₄ F ₈ / C ₂ H ₄ mixed gas is used in the over-etching step. This is an example in which the SiO ₂ interlayer insulating film is etched by using the method.
First, the wafer shown in FIG.
The apparatus was set in the E apparatus, and the SiO ₂ interlayer insulating film 2 was just etched under the same conditions as in Example 2. In this step, high-speed etching proceeded. The state of the wafer at the end of the just etching is as shown in FIG.

Next, as one example, over-etching was performed under the following conditions. c-C ₄ F ₈ flow rate 46 SCCM C ₂ H ₄ flow rate ₄ SCCM gas pressure 2.0 Pa RF power density 1.0 W / cm ² (13.5
6 MHz) Magnetic field intensity 1.5 × 10 ⁻² T Wafer temperature 0 ° C. In this overetching step, the deposition of carbon-based polymer was promoted by the addition of C ₂ H ₄ , which is a deposit. Therefore, the incident ion energy required for anisotropic processing could be further reduced as compared with the over-etching step of the second embodiment. In addition, H generated from C ₂ H ₄
^* Captured part of F ^* and removed it out of the system in the form of HF (hydrogen fluoride). Therefore, etching with very high selectivity to the lower wiring 1 and less damage could be performed.

Embodiment 4 In this embodiment, similarly, in the hole processing, a c-C ₄ F ₈ / O ₂ mixed gas is used in the just etching step, and a c-C ₄ F ₈ / H ₂ S mixed gas is used in the over-etching step. This is an example of reducing pollution. First, the wafer shown in FIG. 1A was set in a magnetron RIE apparatus, and the SiO ₂ interlayer insulating film 2 was just etched under the same conditions as in Example 2.

Next, as one example, over-etching was performed under the following conditions. C ₄ F ₈ flow rate 46 SCCM H ₂ S flow rate ₄ SCCM gas pressure 2.0 Pa RF power density 1.0 W / cm ² (13.5
6 MHz) Magnetic field strength 1.5 × 10 ⁻² T Wafer temperature 0 ° C. In this step, since anisotropy and selectivity are ensured by depositing S in addition to the carbon-based polymer, the carbon-based material serving as a particle source The amount of polymer deposited could be relatively reduced. The deposited S could be easily removed by heating the wafer to about 90 ° C. after completion of the etching or sublimation or burning when ashing the resist mask 3. S deposited in the etching chamber could be removed as well. Therefore, in this example, the process could be reduced in contamination.

As described above, the present invention has been described based on the four embodiments, but the present invention is not limited to these embodiments. For example, in the above embodiments as a fluorocarbon compound was taken up the c-C ₄ F _8, instead of these, the present inventors have such C ₃ F ₆ was proposed in Japanese Patent Application No. Hei 2-295225 specification above A chain fluorocarbon compound having an unsaturated bond, or
C-C ₄ F ₆ , c-C proposed in the specification of US Pat.
The ₅ F unsaturated or saturated cyclic fluorocarbon compounds such as ₁₀ may be used.

As the oxygen-based compound, in addition to the above-mentioned O ₂ ,
O ₃ (ozone) or various types of nitrogen oxides such as N ₂ O and NO ₂ may be used. As hydrocarbon compounds,
In addition to the above C ₂ H ₄ , various chain or cyclic compounds can be used. Although there is no particular limitation on whether the compound is saturated or unsaturated, a compound having an unsaturated bond (in this case, a double bond) such as C ₂ H ₄ promotes polymerization and deposition of a carbon-based polymer. Is advantageous.

Examples of the sulfur-based compound which releases S under discharge dissociation conditions include the above-mentioned H ₂ S and the S ₂ F proposed by the present applicant in the specification of Japanese Patent Application No. 2-198045.
Sulfur fluoride such as ₂ , SF ₂ , SF ₄ and S ₂ F ₁₀ may be used. The silicon compound layer to be etched in the present invention includes PSG, BS in addition to the above-mentioned SiO ₂ interlayer insulating film.
G, BPSG, AsSG, AsPSG, silicon oxide based materials such as AsBSG or may be a Si _x N _y or the like.

Further, it goes without saying that the configuration of the wafer, the type of the etching apparatus, the etching conditions, and the like can be appropriately changed.

[0049]

As is apparent from the above description, the present invention suppresses the microloading effect by supplementing oxygen to the etching reaction system to prevent excessive deposition of the carbon-based polymer inside the fine pattern. It becomes possible to etch the silicon compound layer at a high speed. Further, by dividing the etching into a just etching step and an over-etching step and promoting the formation of deposits in the latter step, the process can be made highly selective and the damage can be reduced. In particular, when S is used in combination as a deposit, low pollution is also achieved.

The present invention is extremely effective, for example, when opening a connection hole having a small opening diameter in an interlayer insulating film in accordance with a future fine design rule.

[Brief description of the drawings]

FIG. 1 is a schematic cross-sectional view showing a process example in which the present invention is applied to hole processing in the order of steps, (a) is a state in which a resist mask is formed on an SiO ₂ interlayer insulating film, and (b) is (C) shows a state where the SiO ₂ interlayer insulating film is just etched, and (c) shows a state where the SiO ₂ interlayer insulating film is over-etched.

FIG. 2 is a graph showing a comparison between changes in the etching rates of an SiO ₂ layer and a photoresist layer when the amount of O ₂ added to cC ₄ F ₈ is changed.

3A and 3B are schematic cross-sectional views for explaining a problem in the conventional hole processing. FIG. 3A is a state in which a resist mask is formed on an SiO ₂ interlayer insulating film, and FIG. FIG. 3C shows a state in which the etching rate is reduced and the side wall surface is tapered in the connection hole, and FIG. 4C shows a state in which the lower wiring is eroded at the bottom surface of the connection hole having a large opening diameter.

[Explanation of symbols]

1 ... lower wiring 2 ... SiO ₂ interlayer insulating film 2a ... first connection hole 2b ... second connection hole 2c ... (the SiO ₂ interlayer insulating film) remainder 3 ... Resist mask 3a first opening 3b second opening

──────────────────────────────────────────────────続 き Continued on front page (58) Field surveyed (Int.Cl. ⁷ , DB name) H01L 21/3065 C23F 4/00

Claims (3)

(57) [Claims] 1. A fluorocarbon compound represented by the general formula Cm Fn (where m and n are natural numbers indicating the number of atoms and satisfy the conditions of m ≧ 2 and n ≦ 2m), and oxygen as a constituent element. Etching containing an oxygen-based compound having
A just etching step of etching the silicon compound layer to a depth substantially not exceeding the thickness of the silicon compound layer using a gas, and an etching method in which the content ratio of the oxygen-based compound to the fluorocarbon compound is reduced as compared with the just etching step. An over-etching step of etching the remaining portion of the silicon compound layer using a gas, wherein each etching step is performed while controlling the temperature of the substrate to be etched at room temperature or lower. 2. A fluorocarbon compound represented by the general formula Cm Fn (where m and n are natural numbers indicating the number of atoms and satisfy the conditions of m ≧ 2 and n ≦ 2m), and oxygen as a constituent element. Etching containing an oxygen-based compound having
A just etching step of etching the silicon compound layer to a depth not exceeding substantially the thickness of the silicon compound layer using a gas, and a remaining portion of the silicon compound layer using an etching gas containing the fluorocarbon compound and the hydrocarbon compound. A dry etching method comprising: performing an etching step while controlling the temperature of a substrate to be etched to a room temperature or lower. 3. A fluorocarbon compound represented by the general formula Cm Fn (where m and n are natural numbers indicating the number of atoms and satisfy the conditions of m ≧ 2 and n ≦ 2m), and oxygen as a constituent element. Etching containing an oxygen-based compound having
A just etching step of etching the silicon compound layer to a depth substantially not exceeding its thickness using a gas, and an etching gas containing the fluorocarbon compound and a sulfur-based compound capable of generating S under discharge dissociation conditions. An over-etching step of etching the remaining portion of the silicon compound layer using the etching method, wherein each etching step is performed while controlling the temperature of the substrate to be etched to room temperature or lower.