JP3199857B2 - Conductivity modulation type MOSFET - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a conductivity modulation type MOSFE.
It relates to the structure of T.

[0002]

2. Description of the Related Art As a power semiconductor device, a bipolar transistor (BJT) and a power MOS have conventionally been used.
FETs are known. Also, MOS gate type transistors (M.C.) in which they are cascaded on the same chip.
G. FIG. T. ) Has already been proposed.

[0003] FIG. G. FIG. T. 1 is a semiconductor substrate of one conductivity type (for example, N type) serving as a collector / drain region, and 2 is a semiconductor substrate of opposite conductivity type (for example,
A channel region made of a P-type semiconductor; 3, a source region made of a semiconductor of one conductivity type; 4, a gate electrode made of an insulating film and polysilicon; and 5, a base region made of a semiconductor of an opposite conductivity type; Reference numeral 6 denotes a base electrode, 7 denotes an emitter region made of a semiconductor of one conductivity type, 8 denotes an emitter electrode, and 9 denotes a source electrode.

FIG. 1B is an equivalent circuit diagram showing a base B, a collector C, a drain D, an emitter E, and a gate G corresponding to FIG.

In FIG. 1, a source electrode 9 of an N-channel MOSFET and an NPN-type bipolar transistor (B.
J. T. ) Has a structure in which the base electrode 6 is short-circuited.
By obtaining a high input impedance characteristic by the input control from the S-type gate G, (3) it is possible to aim at a low saturation voltage which is a characteristic of the bipolar transistor.

However, in FIG. G. FIG. T. Is the sum of the drain-source voltage VDS and the base-emitter voltage VBE. J. T. The only way to reduce VDS is to increase the DC amplification factor and reduce the base current, but VDS itself could not be reduced by conductivity modulation.

A PNP transistor and a MOSFET
Of the so-called IGBT (Insulate)
The d Gate Bipolar Transistor has already been put into practical use as a conductivity modulation type. However, since a PNPN thyristor junction is parasitic, a gate transistor by latch-up is used.
An on / off impossible phenomenon occurred, and it was difficult to reduce the forward voltage drop.

[0008]

In a MOS gate semiconductor device having a high input impedance characteristic, a region in which conductivity modulation occurs is also caused in a drain region of a MOSFET so that an excellent low saturation voltage characteristic is obtained. ,
It is another object of the present invention to provide a structure which does not cause a gate failure due to latching.

[0009]

(1) One conductivity type semiconductor substrate serving as a collector / drain region, a base channel region made of an opposite conductivity type semiconductor formed on the surface of the one conductivity type semiconductor substrate, A first source region and an emitter / second source region formed of one conductivity type semiconductor formed on the surface of the channel region, and a first gate for inducing a channel across the surface of the first source region and the surface of the collector / drain region; A gate electrode, a second gate electrode for inducing a channel over the surface of the second source region and the surface of the collector / drain region, and the first gate electrode and (4) the second gate electrode. A conductivity-modulated MOSFET, wherein the surface of the first source region and the surface of the base channel region are short-circuited by a metal electrode.

(2) One conductivity type semiconductor substrate serving as a collector / drain region, a base channel region formed of an opposite conductivity type semiconductor formed on the surface of the one conductivity type semiconductor substrate,
A first source region and an emitter / second source region formed of one conductivity type semiconductor formed on the surface of the channel region, and a surface of the first source region, a surface of the collector / drain region, and an emitter / second source region. A gate electrode which induces two channels over the surface, connects each gate electrode, and short-circuits the first source region surface and the base channel region surface with a metal electrode. A conductivity modulation type MOSFET characterized by the above-mentioned. In the above (1) and (2), the emitter / second source region is an independent region between the emitter region and the second source region, and a plurality of gate electrodes are connected. And the repetition pitch of the base channel region is set to be not more than twice the diffusion length of minority carriers in the collector / drain region.

[0011]

FIG. 2 is a sectional structural view showing an embodiment of the present invention. Reference numeral 10 denotes a semiconductor substrate of one conductivity type (for example, N-type) serving as a collector / drain region, for example, forming an epitaxial growth layer (N-) on a silicon single crystal substrate (N +). 11 is a base channel region made of a semiconductor of the opposite conductivity type (for example, P type), 12 is a first source region made of a semiconductor of one conductivity type, and 13 is an emitter / second source made of a semiconductor of one conductivity type. The source region 14 extends over the surface of the first source region 12 and the surface of the collector / drain region 10;
A first gate electrode 15 for inducing a channel extends over the surface of the emitter / second source region 13 and the surface of the collector / drain region (5) 10, and a second gate electrode 16 for inducing a channel. Denotes a metal electrode for short-circuiting the surface of the first source region 12 and the surface of the base channel region 11;
Denotes thirteen electrodes. Usually, the base channel region 11
Has a plurality of cells on the surface of the semiconductor substrate 10 and has an integrated structure by parallel connection. The back gate for fixing the channel potential is, for example, an emitter / second source.
A portion of the base channel region 11 is exposed in the source region 13 and is easily connected to the emitter / second source region 13 by the same electrode.

The operation of FIG. 2 corresponds to the operation of the first gate G1 (or the second gate G1).
Gate G2) is turned on → iD1 flows and passes through first source region 12 → base channel region 1 through metal electrode 16
1 → the emitter / second source region 13 flows as the base current b → the collector current iC flows → the emitter
The second source region 13 is reached. At this time, injection of the hole H, which is a minority carrier, occurs from 11 to 10.
In this way, conductivity modulation occurs, leading to a decrease in saturation voltage.

FIGS. 3A and 3B are explanatory diagrams of the configuration of the present invention, in which FIG. 3A is a sectional view, and FIG. 3B is an equivalent circuit diagram, and the same symbols as those in FIG. Hereinafter, the present invention will be described in more detail with reference to FIG.

The first gate G1 of the MOS1 and the second gate G2 of the MOS2 form a common gate. When a sufficient positive bias is applied to the gate voltage, the MOS1 is turned on and the drain current iD1 Is B. J. T. Flows as a base current of B. J. T. is turned on. When the voltage drop due to icxRc increases, B.I. J. T. The base collector becomes forward biased and minority carrier injection occurs. On the other hand, when the voltage drop due to iD2 x RD2 increases, B-
Similarly, when a forward bias is applied between D2 and B2. J.
T. Injection of minority carriers occurs from the base. As a result, the resistances of RD2 and RC are conductivity-modulated and significantly reduced, and the current (6) current distribution is distributed so that VDS2 or VCE maintains a balance. Finally, RD1 is also greatly reduced by minority carrier injection, and MOS1
Forward voltage drop + B. J. T. Is a value close to VBE.

As described above, in order to diffuse minority carriers into the drain region of MOS1, it is necessary to dispose MOS1 at a distance shorter than the diffusion length of minority carriers. Therefore, the repetition pitch of the base channel region 11
(Width of cell pitch) Q is 2 × the diffusion length at the maximum. For example, if the lifetime is 0.1 μs, the diffusion length L ≒ 1
0 μm, and it is desirable that Q = 2 × L = 20 μm or less.

FIG. 4 is a sectional structural view showing another embodiment of the present invention. The same reference numerals as those in FIGS. 2 and 3 denote the same parts.
In FIG. 4, the surface of the first source region 12 and the collector
Surface of drain region 10 and emitter / second source region 13
Gate electrode G3 for inducing two channels over the
Is provided. Also, for example, two base channel regions 1
1 and a first source region 12 and an emitter / second source
2 is 12-13-13-12 in FIG.
4 is different from the order of 12-13-12-13 in FIG. Accordingly, the position of the metal electrode 16 is different. Therefore, in FIGS. 2 and 4, MOS1, MOS2, B. J.
T. Although the arrangement of the components is different, the purpose, operation, effect, and the like are equal, and an equivalent structure is obtained.

FIG. 5 is also a sectional structural view showing another embodiment of the present invention, and the same reference numerals as those in FIGS. 2 and 3 represent the same parts.
In FIG. 5, the emitter / second source region 13 of FIG.
Are formed as independent regions of the emitter region 19 and the second source region 20, respectively, and have a structure equivalent to and equivalent to FIG. The emitter region 19 and the second source region 20 are formed on the surface including the base channel region 11 by the electrode 17.
In this case, there is an effect that a bypass bypass resistor is inserted between the base and the emitter. Further, the potential of the base channel region 11 (7) can be fixed with respect to the MOS1 and the MOS2, so that a so-called back gate can be easily formed.

Thus, the emitter / second source region 1
Naturally, the structure in which 3 is a region independent of the emitter region and the second source region can be applied to the other embodiment of the present invention shown in FIG. In addition, it is also possible to provide separate electrodes for each of the independent emitter region and the second source region for design reasons.

In the structure of the present invention described above, the first gate electrode 14 and the second gate electrode 15 shown in FIG.
Although the plurality of gate electrodes 18 in FIG. 4 are also connected and connected to each other, if necessary, the first gate electrode 14 and the second gate electrode 15 may be connected to each other. A structure in which the electrodes 18 are separated from each other can also be formed. As described above, in the case of the gate electrode separated type, for example, MOS1 and MOS2
Since the transistor can be turned off at a stage, the MOS2 serving as the main switch is turned off after the disappearance of the minority carriers, thereby enabling a circuit design to reduce the switching loss.

As another embodiment, in the sectional structural views of FIGS. 2, 4 and 5, etc., the reverse conductivity is applied to the lower surface (the lower surface of the C & D side N +) of the one conductivity type semiconductor substrate 10 serving as the collector / drain region. By forming a type semiconductor layer (P type in the figure), minority carriers are also injected from the opposite conductivity type semiconductor layer, and the resistance value is reduced by conductivity modulation.
It is possible to realize a high power drive type device having a strong thyristor effect. However, the function of avoiding latching, which is one of the features of the present invention, is lost.

In the embodiment described above, deformation of each part, equivalent conversion of conductivity types and regions, addition of other parts, integration with other parts, and compounding can be performed within the scope of the present invention. . (8)

As described above, a MOS-gate type conductivity modulation type MOSFET having a small forward voltage with high input impedance characteristics and causing the conductivity modulation to occur also in the drain region of the MOSFET is provided. Since it can be realized by an integrated and easy-to-manufacture structure, its industrial effect is extremely great when used in semiconductor devices incorporated in various devices including power supply devices.

[Brief description of the drawings]

FIG. 1 is a sectional structural view of a conventional MOS gate type transistor.

FIG. 2 is a sectional structural view showing an embodiment of the present invention.

3A and 3B are explanatory views of the configuration of the present invention, in which FIG.
(B) is an equivalent circuit diagram.

FIGS. 4A and 4B are structural views showing another embodiment of the present invention, wherein FIG. 4A is a sectional view and FIG. 4B is an equivalent circuit diagram.

FIG. 5 is a sectional structural view showing another embodiment of the present invention.

[Explanation of symbols]

DESCRIPTION OF SYMBOLS 1 One conductivity type (for example, N type) semiconductor base material used as a collector / drain region 2 Channel region made of reverse conductivity type (for example, P type) semiconductor 3 Source region made of one conductivity type semiconductor 4 Gate electrode 5 Base region 6 made of reverse conductivity type semiconductor 6 Base electrode 7 Emitter region made of one conductivity type semiconductor 8 Emitter electrode (9) 9 Source electrode 10 One conductivity type semiconductor substrate serving as collector / drain region 11 Reverse conductivity Base channel region made of type semiconductor 12 First source region made of one conductivity type semiconductor 13 Emitter / second source region made of one conductivity type semiconductor 14 First gate electrode 15 Second gate Gate electrode 16 Metal electrode 17 13 or electrode of 19 or 20 18 Gate electrode 19 Emitter region 20 Second source region B Base C Collector D Drain E Emitter G, G1 1 gate - DOO G2 second gate - DOO G3 gate - DOO S1 first source - scan S2 second source - scan MOS1 MOSFET 1 MOS2 MOSFET 2 B.J.T. Baipo - La transistor b base - scan current

Claims (2)

(57) [Claims] 1. A semiconductor substrate comprising: one conductivity type semiconductor substrate serving as a collector / drain region; a base channel region comprising a reverse conductivity type semiconductor formed on a surface of the one conductivity type semiconductor substrate; and a one conductivity type semiconductor formed on a surface of the base channel region. The first source region and the emitter / second source region, the first source region and the collector / drain region surface, the first gate electrode for inducing a channel, the second source region surface and the collector / drain region surface, A second gate electrode for inducing a channel, connecting the first gate electrode and the second gate electrode, or individually leading out and short-circuiting the first source region surface and the base / channel region surface with a metal electrode And the repetition pitch of the base channel region is increased by the expansion of minority carriers in the collector / drain region. Conductivity modulation type MOSFET, characterized in that not more than 2 times the length. 2. A semiconductor substrate of one conductivity type serving as a collector / drain region, a base channel region formed of a semiconductor of the opposite conductivity type formed on the surface of the semiconductor substrate of one conductivity type, and a semiconductor substrate formed on the surface of the base channel region. A first source region and an emitter / second source region, and a gate electrode which induces two channels over the first source region surface, the collector / drain region surface, and the emitter / second source region surface. Or individually derived, and the first source region surface and the base channel region surface are short-circuited by a metal electrode, and
A conductivity-modulated MOSFET, wherein the repetition pitch of the base channel region is set to be twice or less the diffusion length of minority carriers in the collector / drain region. ,