JP3194924B2 - Electronic exchange - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION [Object of the Invention] (Industrial application field) The present invention relates to an electronic exchange of a distributed control system, and
It relates to a communication method between sessa. (Prior art) A plurality of processors are distributed to distribute the entire function and processing.
Electronic switch of distributed control system with enhanced ability
I have. This type of distributed control electronic exchange is
Inventors are subscriber terminals and stations such as telephones and data terminals.
Line / trunk card connected to line or leased line
Multiple line / trunk shelves installed and exchange processing
Control shelf mounted with a common control card for controlling
Can be stacked according to the size of the circuit,
Deploy processors and communicate between them.
We have proposed an electronic exchange that has been adapted. In such electronic exchanges, different shelves
Communication between implemented processors, especially line / trunk
A processor in the shelf and a processor in the common control shelf
Communication between sesas must occur in real time.
No. To do this, the communication between the processors must be transmitted in parallel.
It is recommended that the cable be connected between shelves.
The number of cables increases, cable installation costs increase, and
The problem that reliability is reduced occurs. On the other hand, in the same shelf, for example, a common control shelf
Interrupt when communicating between different processors
When serial transmission is performed by control, interrupt control is performed.
Complex circuits are required for each shelf,
As the amount of hardware increases,
Processing is interrupted each time interrupt control is performed and processing efficiency drops.
There is a problem. (Problems to be solved by the invention) As described above, the line / trunk shelf and the common control
Stack the processors and distribute the processors in each shelf.
Electronic exchanges have processors in different shelves.
Communication between servers should not increase the number of wires between shelves.
In real time, and professionals within the same shelf
Communication between Sessas should not be accompanied by increased hardware
And without reducing the efficiency of the replacement process.
It is a big problem. The present invention has been made to solve such a problem.
, Line / trunk shelves and common control shelves
Switch in the electronic exchange by the distributed control method of the laminated structure
And minimize the number of wires between shelves,
Real-time communication between processors in the shelf
And increase hardware and replacement processes.
Communication between processors in the same shelf without loss of efficiency
Aiming to provide an electronic exchange that can communicate
Target. [Constitution of the Invention] (Means for Solving the Problems) The present invention relates to a subscriber terminal connected to a central office line or a dedicated line.
Line / trunk card with multiple lines /
Trunk shelf and common control car that controls the exchange process
And a common control shelf on which
Control with processors distributed in each shelf
Electronic switchboards that are mounted on different shelves
Communication between processors using interrupt control
Communication between processors mounted on the same shelf.
The source process is stored in the common memory connected to the common bus.
The processor writes the data to be sent and sends it to the destination processor.
Polls the common memory for parallel transmission.
It is characterized by performing by sending. More specifically, the common control shelf is mainly exchanged
A first common control card for controlling the processing;
Connected to one common control card via a common bus
With the line / trunk card
Second common control card connected via Le Highway
And the second common control card is a line / trunk car
And data transfer between the first common control card and the first common control card.
A first processor controlling the first processor
Control the connection to the control highway
Interface as well as the multiple
Each of the connection / trunk cards is a connected subscriber terminal,
A second processor that performs processing for office lines or dedicated lines
And the second processor and the control
And a second interface for connecting to the rays.
And The first interface is a master mode.
Data transmission to the control highway.
This is done in synchronization with the
Data reception from roll highway is described in the header
Address matches the address specified in advance.
And the first processor receives data.
Perform an operation requesting an interrupt for
The interface is controlled by slave mode.
Data transmission to the local highway
Address in the time slot of the address
Data from the control highway
The address specified in the header is specified in advance for reception
Go to the second program
Requests an interrupt for data reception to the processor
Execute. (Operation) Between processors mounted on different shelves, for example,
Processor in the in / trunk shelf and common control system
When communicating with a processor in Elf,
Serial data on the data highway is controlled by interrupt control.
Data transmission. Therefore, the wiring connecting the shelves
And that the installation cost would be greatly reduced.
In addition, reliability is improved. On the other hand, in the same shelf, for example, in the common control shelf
When communicating between processors, the sender processor
Is common when data to be transmitted occurs
Parallel transmission via bus and parallel to common memory
The write and destination processors define this common memory.
Polling periodically and necessary data via a common bus
And read in parallel. Therefore, when interrupt control is used,
It eliminates the need for complicated hardware such as
The efficiency is improved. (Embodiment) FIG. 1 is a schematic diagram of an electronic exchange according to an embodiment of the present invention.
FIG. 2 is a diagram showing a common control shelf 1 and a plurality of lines / tones.
Rank shelves 2a to 2n are stacked as shown in FIG.
It is made. Replacement processing, maintenance, etc. for the common control shelf 1
And a main CPU (Mcpu) card 11
Various applications such as Saging and Directory
Application CPU (Acpu) card 12
Main CPU card 11 and application CPU card 12
Control between the PC and the line / trunk (L / T) card 21
Or a local that performs input / output level conversion in software
CPU (Lcpu) card 13 and time-division time slot
Time switch (TSW) card 14
Card (card-like circuit device) that constitutes the
Is equipped. In the present invention, these common control shells are used.
The various cards 11 to 14 in the file 1 are collectively called a common control card.
Say. The processors in each of the common control cards 11 to 14
Communication with each other is performed via a common memory 16 connected to a common bus 15.
I can do the trust. On the other hand, in the line / trunk shelves 2a-2n,
Line / to which subscriber terminals such as machines and data terminals are connected
Rank (L / T) card 21 is installed according to the number of lines
You. Common control shelf 1 and line / trunk shelf 2a
Between 2n, line / trunk from local CPU card 13
Data highway for transmission to card 21 and line / trans
For receiving data from the network card 21 to the local CPU card 13
Control unit for serial transmission including highway
Eway 3, time switch card 14 and line / tiger
PCM time slot connected to link card 21
It is connected by a PCM highway 4 for replacement. Next, each part of FIG. 1 will be described in detail. Fig. 3
Is a line / trunk card 21
Internal structure of line / trunk card connected to handset 31
Is shown. The line connected to the office line or dedicated line /
Trunk card has the same configuration as card 21 above
Therefore, its illustration is omitted. In FIG. 3, digital
The telephone LSI (DTLSI) 32 is a digital telephone 31
In / trunk cards and the phones connected to them
Port control consisting of a CPU that controls office lines
This is an LSI that controls communication with the controller (PC) 33. Ma
The interface LSI (ILSI) 34 is a port control
Controller 33 and the local CPU 13 in the common control shelf 1 (first
This is an LSI that controls communication with the
It operates in the slave mode. FIG. 4 shows the local CPU card 1 in the common control shelf 1.
3 shows the internal configuration. In FIG. 4, the interface
LSI (ILSI) 41 is the interface LSI in Fig. 3.
Same configuration as 34, but different mode setting input from outside
And operate in master mode as described below.
You. Local memory 42 operates local CPU (Lcpu) 43
For storing programs and data for
The buffer 45 is connected to the common bus 15 and the local CPU card 1
3 to connect or disconnect with the local bus 46
Local CPU 43 accesses the common bus 15
The decoder 44 assigns it to the common memory 71 (described later)
Turns on buffer 45 when it detects the
To connect the common bus 15 and the local bus 46. In addition,
Different addresses are assigned to the local memory 42 and the common memory 71
Have been. FIG. 5 shows the main CPU card 11 in the common control shelf 1.
2 shows the internal configuration of FIG. Main CPU card 11 as shown
Has almost the same configuration as the local CPU card 13 shown in FIG.
And local memory 51, main CPU (Mcpu) 52,
And a local bus 55. However
And the main CPU card 11 goes to control highway 3.
Interface LSI is not built in because it is not connected.
No. Although not shown, an address in the common control shelf 1 is not shown.
The application CPU card 12 is also the main CPU shown in FIG.
It has the same configuration as the card 11. FIG. 6 shows a time switch car in the common control shelf 1.
The internal configuration of the time switch controller and the time switch controller
And time switch 61, decoder 62 and buffer 63.
Have. The address of the address on the common bus 15 is
Checks whether the address matches the switch control address.
Monitor and turn on buffer 63 only when matched
Both time switch controller and time switch 61
Connect to bus 15 FIG. 7 shows the common memory card 16 in the common control shelf 1.
The common memory 71, the decoder 72 and the bus
The method for accessing the common memory 71
As described above in the time switch card 14 shown in FIG.
It is the same as the access method. Next, referring to FIG.
The processor in the common control card, for example as shown in FIG.
FIG. 3 shows the local CPU 43 in the local CPU card 13.
Processor (port) in the line / trunk card 21
A communication method with the controller 33) will be described.
As mentioned earlier, processors in these different shelves
Communication between the devices is performed by serial transmission using interrupt control.
It is. In FIG. 8, the control highway 3 is the data
Highway (data input / output line), frame synchronization signal transmission
Line and data highway clock transmission line, PC
M Highway 4 is a PCM highway clock transmission line and PCM
It has a transmission line for a highway frame synchronization signal. locker
Clock generator 47 in the CPU card 13
A data highway clock is sent to the way 3. one
On the other hand, the line corresponding unit 36 in the line / trunk card 21 is CODE
Including C and SLIC. In this embodiment, the mode is set as the interface LSI.
There are two modes depending on the input:
Time slot assigned to itself in synchronization with the transition point
Master mode with function to send data by
From the time slot designation address from
Has a function that can send data only by
Switchable between two slave modes
Is used. The interface LSI 41 in the local CPU card 13 is
It operates in the star mode, with the local CPU and control hardware.
It is inserted between Eway 3. This interface LSI4
Transmission of data from 1 to control highway 3
This is performed in synchronization with the change point of the time slot. Also,
Interface LSI 34 in line / trunk card 21
When receiving a header from the
To the local CPU 43 as a reception request.
Interrupt request. Interface LSI3 in line / trunk card 21
4 operates in slave mode and controls highway
B3 and PCM highway 4 and each port in the card 21
Connected to the port controller 33 that controls
You. Control high from this interface LSI34
Transmission of data to way 3 is controlled by external time slots.
At the time slot specified by the
Only possible. Also, the interface LSI 34
When transmitting, after detecting the header,
Receive data via the third way, and add the received data.
Address matches the external time slot designation address.
Only when the received data is valid,
Issues an interrupt request as a reception request to the controller 33
Live. When the port controller 33 receives the interrupt request,
Received data from the receive register in interface LSI34
Read and read the line / trunk card 21 according to the data
Is controlled. When sending data to the line corresponding unit 36
Port controller 33 is the interface LSI 34
After writing control data to the line corresponding unit control unit in the
The interface LSI 34 sends the control data to the line
Send out. The state of the line corresponding unit 36 or the state of the digital telephone 31 etc.
The data from the subscriber terminal, etc.
Is periodically taken into the I / O register of the line corresponding unit control unit
It is. And the port controller 33 uses this I / O register
By reading the data in the data periodically,
36 status changes or control data for local CPU 43
Is written to the transmission register in the interface LSI34.
No. After this, the interface LSI 34
Time slot specified by the
Control register contents in the transmission register.
Output to the data highway (data output line)
You. Next, between each processor in the common control shelf 1,
That is, communication between processors provided in each common control card.
The method will be described. Process in common control shelf 1
For local communication between the servers, each local CPU 43
Regarding the status of subscriber terminals collected from rank card 21
Data and data from subscriber terminals to a specified level
Process the processed data to main CPU 52 or application CPU
Data transmission to the main CPU 52 and the
Terminal control obtained by application CPU exchange processing
Data transmission for transmitting data to the local CPU 43 side
There is. As mentioned above, processors within the same shelf
Communication between the processors is performed by the processors in common on the common bus 15.
Connect a common memory 16 that can access
Write the data to be transmitted to the memory 16
By reading the data to be received from memory 16
It is. Connect a common memory to the common bus, and
Method for transmitting data between arbitrary processors
Is well known, for example, as found in control by IEEE 796.
is there. This method requires common memory access
Processor outputs a control signal on the common bus.
Data by occupying the common bus during the access period.
Data transmission is performed. In that case, multiple processors
Access conflicts based on a given priority
Processing is performed. In this embodiment, each local CPU 43 is a subscriber terminal.
Whenever a state change occurs on the
Each time dial information is sent, its status or dial
The information data is written to the common memory 16. On the main CPU 52
Is to periodically poll the contents of the common memory 16
Information about the status of each subscriber terminal,
Do the work. For example, if there is a call from a subscriber terminal,
Upon detecting this, call processing is performed. A series of calls
Data stored in the common memory 16
Data, or from the subscriber terminal via the local CPU 43.
When the data written in the communication memory 16 becomes necessary,
Access the memory 16 and read the data to process
Do. As a result of this processing, control to control the subscriber terminal side
When the data changes, the control data is stored in the common memory.
Write to 16. On the other hand, the local CPU 43 also controls the subscriber terminal.
Determine if data has changed, and if
Detects what the control data was
To periodically poll the contents of the common memory 16
I have. Thus, each processor (main CPU 52, local CPU 4
3) writes the data to be transmitted to the common memory 16,
The contents of the common memory 16 periodically or when necessary.
By polling and reading the data to be received
Communication between these processors. this
By doing so, the local CPU 43 and main CPU 52 and application
There is a difference in the function level with the
Data from the local CPU 43 to the 52 or application CPU
Despite the relationship that gathers, the main CPU 52 and application
The application CPU, etc. has its own processing program (for example,
Processing program) without interruption
Thus, the processing efficiency is improved. In addition, local CPU (Lcpu) 43, main CPU (Mcpu) and
And application CPU (Acpu) on common bus 15
Connected via the common memory 16,
-Flexible communication between Lcpu, Lcpu-Acpu, Mcpu-Acpu
Can provide more advanced services in real time.
It is possible to do it. Furthermore, between the serial transmission area and the parallel transmission area
As shown in FIG. 9 by the local CPU 43 located at
Physical level, which is the processing level of the line / trunk card 21
From the level, the logical level which is the processing level of the local CPU 43
After conversion to the
It can be handled at the symbolized level. Note that FIG.
In / trunk card 21, local CPU 43 and main CP
U52 functions and communication between these processors
9 shows a specific example of communication data. If you do this
Local CPU 43 sends command data between the subscriber terminal and trunk.
Data transmission control.
2 no longer needs to manage command data
Therefore, the load on the main CPU 52 is reduced, and changes and additions can be made.
Benefits of increased ease, scalability and increased productivity
There is. Next, the internal configuration of the interface LSI (34, 41, etc.)
This will be described with reference to FIG. Interface LSI before
As described above, data on control highway 3
Data transmission to the e-way coincides with the time slot change point.
Master mode with expected functions and data
Data transmission to the Eway
Address matching the address given by the fixed address
Slave mode, which is only possible in
It is configured to be able to be switched to. Mode setting input
Control unit that switches between master and slave modes
Is in the data highway transmitting / receiving section 101. In FIG. 10, the data highway transmitting / receiving section 101 is
Frame synchronization signal DHFS and data highway clock DH
Operated by CLK, the data highway transmission register 102 and
And data via the data highway reception register 103.
Data transfer between input line DHIN and data output line DHOUT
Send and receive. In this case, the transmission / reception timing is
As described above, the difference depends on the password. That is,
In master mode, it synchronizes with the time slot change point.
The data in the transmission register 102 is sent out, and
After receiving the data, the data is received and stored in the reception register 103.
You. In slave mode, an external time slot
Time slot of the address that matches the specified address
The data in the transmission register 102 is transmitted only at
When receiving data, after receiving the header,
Time slot designation address and address in received data
Data is stored in the reception register 103 only when the
Store. The CPU interface control unit 104
Decodes the address data and stores it in the interface LSI
Data is sent to each block. The line corresponding unit control unit 105 has an input register 106, an output register
I / O specification register to specify data 107 and I / O mode
And is connected to the line corresponding unit 36 (FIG. 8). PCM time slot control unit 109 is PCM frame synchronous PCMFS
And the PCM clock to count the number of time slots
PCM time slot by the port controller 33.
PCM time slot address set in the
To the CODEC when they match.
Control to give frame synchronization. In the electronic exchange of the present embodiment, the local CPU 43
The same data to multiple port controllers 33
Port, those port controllers 33 are connected.
Slave mode interface LSI34
Give a common group address and
Data is transmitted using the dress. This group address
Is a set of addresses of multiple interface LSIs
In each interface LSI34
It is registered in advance. Note that the same data is sent from the local CPU 43 to multiple ports.
As a method of transmitting to the controller 33, each port
Controller, and sends the same data in sequence.
And the port controller 33 as described above.
Represents multiple interface LSI34 connected
Transmission method with transmission data added to group address
You could think so. Although the method is simple, each port
Address and transmission data for controller individually
Next must be transmitted. In contrast,
With the local CPU 43 and multiple port controllers 33
Can be transmitted at one time between
And the load on the local CPU 43 is reduced.
You. Next, the transmission signal format in this embodiment is
This will be described with reference to the drawings. As shown in FIG.
One frame is formed by dress, control data and information data
Has formed. Address to single port controller 33
Individual addresses for transmitting data individually and multiple addresses
The same data is transmitted to the port controller 33.
Address for all port controllers 33
It is divided into a broadcast address for transmitting one data.
Distinguishing between individual address, broadcast address and broadcast address
Information (referred to as an identifier) is shown at the bottom of FIG.
Upper 2 bits (MSB side) in the address format
used. In the case of individual address, this address
Following the upper two-bit identifier to indicate
-Interface LSI address (ILSI address), broadcast again
In the case of, a group address indicating an arbitrarily specified group
Each is added. Now, as shown in FIG. 12, a single group address (#
A) substitutes address information of multiple interface LSIs
This means that the local CPU 43
Interface LSI3 connected to the remote controller 33
If the same data is transmitted to 4,
As described above, the upper 2 bits in the address format are
Set the identifier “10” and continue with the representative addresses of # 1 to #n
And #A may be added. This allows the local CPU4
Data from 3 can be transmitted to multiple ports by one call operation
To the interface LSI 34 connected to the controller 33
Will be sent. In this way, the data sent from the local CPU 43
Interface LSI 34 via the data highway.
Extract the group address from the data received
Compare with the registered group address. This ratio
As a result of comparison, when both addresses match, the
Receive information data. Note that in FIG.
Address #A, #B is the interface LSI34
The line / trunk card 21 provided is a standard telephone (ST
T) indicates that the card is connected. this
Line / trunk cards transmit data from the local CPU43.
Data, but other line / trunk cards
Cannot receive the same data. FIG. 13 shows a line / transformer for performing the above processing.
2 shows the configuration of the address processing circuit provided in the network 21.
And the upper 2 bits (identifier) of the received address
Is supplied to the E and S terminals (control input terminals) of the selector 131.
You. The A and B terminals (data input terminals) of the selector 131
Glue stored in the memory 132 in the
Address and individual interface LSI34
The supplied LSI address is supplied. Selector 131
Are the LSI address when (E, S) = (0,0), and (E, S)
When S) = (1,0), the group address is output
The signal is supplied to the first input terminal of the comparator 133.
The second input terminal of the comparator 133
Address information following the upper two bits is supplied, and
Comparing when the values of the first and second input terminals match
The output of the data 133 becomes “1”. On the other hand,
2-bit information is further input to a 2-input AND gate 134
Whether the upper 2 bits are “11”, that is,
It is determined whether the dress is a broadcast address. this
Two inputs of the output of AND gate 134 and the output of comparator 133
It is input to the force OR gate 135. “1” out of OR gate 135
The force becomes a reception request to the port controller 33. You
That is, the interface LSI that the receiving address received
If the address is an individual address (LSI address) corresponding to
And the broadcast address including the received interface LSI
(Group address) and broadcast address
, The information data following the address is received.
Request is issued. With this configuration, the system can be shut down when the system goes down.
Program is stored in each port when starting up the system
It is effective when you make it. In other words, programs such as programs
Loading time regardless of the number of ports
System, since it is determined only by the number of programs to be
The time required to start up the system is greatly reduced. According to the present invention, laminated line / trunk shells
Without increasing the number of wires between
Communication between processors in the
It is also possible to increase hardware and replace
Communication between processors in the same shelf without loss of efficiency
To provide a distributed control electronic switch that can communicate
Can be offered.

BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 is a diagram showing a schematic configuration of an electronic exchange according to an embodiment of the present invention, FIG. 2 is a diagram showing a shelf laminated structure of the electronic exchange, and FIG. FIG. 4 is a diagram showing an internal configuration of a local CPU card in the embodiment, FIG. 5 is a diagram showing an internal configuration of a main CPU card in the embodiment, FIG.
FIG. 7 is a diagram showing an internal configuration of a time switch card in the embodiment. FIG. 7 is a diagram showing an internal configuration of a common memory card in the embodiment. FIG. 8 is a local CPU card in a common control shelf in the embodiment. FIG. 9 is a diagram for explaining the communication system in the line / trunk card and FIG. 9 is a diagram showing a specific example of the communication between the line / trunk card and the local CPU and the main CPU, and FIG. FIG. 11 is a diagram showing an internal configuration of an interface LSI in the embodiment. FIG. 11 is a diagram showing a transmission signal format for describing a method of transmitting data from a local CPU to a port controller in a line / trunk card in the embodiment. FIG. 12 is a conceptual diagram for explaining the data transmission method, and FIG. 13 is an address in a line / trunk card used for implementing the data transmission method. It is a diagram showing a configuration of a reception circuit. 1 ... Common control shelf, 2a ~ 2n ... Line / trunk shelf, 3 ... Control highway, 4 ... PCM
Highway, 11: Main CPU card, 12: Application CPU card, 13: Local CPU card, 14 ...
Time switch card, 15 Common bus, 16 Common memory, 21 Line / trunk card, 33 Port controller, 34, 41 Interface LSI, 43 Local CPU, 52 Main CPU, 71 ... Common memory.

Continuation of the front page (56) References JP-A-60-108958 (JP, A) JP-A-56-42868 (JP, A) JP-A-53-84526 (JP, A) JP-A-57-135592 (JP, A) JP-A-58-33389 (JP, A) JP-A-60-160969 (JP, A) JP-A-58-48592 (JP, A) JP-A-54-138313 (JP, A) 57-180288 (JP, A) (58) Field surveyed (Int. Cl. ⁷ , DB name) H04Q 3/54-3/56

Claims (1)

(57) [Claims] A line / trunk shelf mounted with a plurality of line / trunk cards connected to a subscriber terminal, an office line or a dedicated line; a first common control card mainly for controlling switching processing; A common control shelf mounted with a second common control card connected to the common control card via a common bus and connected to the line / trunk card via a control highway; The second common control card includes a first processor for controlling data transfer between the line / trunk card and the first common control card, and a first processor for controlling data transfer between the first processor and the control highway. A first interface for controlling a connection, wherein each of the plurality of line / trunk cards is connected to a subscriber terminal. A second processor that performs processing for the office line or dedicated line, and a second interface for connecting the control highway and the second processor, the first interface is the master mode,
The data transmission to the control highway is performed in synchronization with the change point of the time slot, and the data reception from the control highway is performed when the address described in the header coincides with the address specified in advance. The second interface performs data transmission to the control highway only in a time slot of an address coinciding with the time slot designation address in the slave mode. And performing an operation of requesting an interrupt for data reception to the second processor by performing data reception from the control highway when an address described in the header matches a predetermined address. Electronic exchange characterized by Exchange.