JP3192638U - Single and double wafer cushions and wafer separators - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a wafer separator capable of preventing damage and deformation of a wafer in response to minute changes in the upper and lower parts of a stack of semiconductor wafers. SOLUTION: A cushion having an outer peripheral portion, an outer raised lip 111 having an upper surface 118 and a lower surface 117, and an intermediate lip 113 having a substantially ring shape and cushioning an axial load on a wafer, and an outer diameter. A central surface 116, which is smaller than the peripheral portion and is located between the top and bottom surfaces for wafer placement, and the central surface extends to an inner diameter 112, which provides an opening central region, from the inner diameter to the outer peripheral portion. A wafer separator comprising at least one vent 114 disposed on an extending bottom surface. [Selection diagram] FIG. 15

Description

  This application is a continuation-in-part of Applicant's co-pending application serial number 13 / 028,945 (filing date: February 16, 2011). In this specification, the entire contents of this document are expressly incorporated by reference.

  The present invention relates to improvements in buffer devices for buffering and separating semiconductor wafer stacks in wafer transport containers. More particularly, the shock absorbing device is a ring formed or folded with a composite bend and surface that allows a variable amount upon engagement of the composite bend and surface. Buffering becomes possible.

  When a semiconductor wafer is placed in a shipping container, a gap or compression occurs between the opposing storage structures in the stack of wafers. In any case, in the transportation of the semiconductor wafer, wear may occur on a part or the whole of the stacked wafers. Several patents have been filed that use separator sheets, pads or foam rings to cushion the outer semiconductor wafer and absorb shock and movement during transport of the semiconductor wafer.

  Limiting radial motion is an important issue in avoiding wear during transfer of the most important wafer surface with or without circuitry. Also, for wafers with protrusions stacked or not stacked on the spacer ring, the ring may only contact the periphery of the wafer, avoiding radial shifts to areas containing solder bumps. There is a need to. The use of a wafer container that reduces the wafer shift in the radial direction improves the ability of the wafer buffer ring to protect the semiconductor wafer.

  If a rigid spacer is used, the wafer may be damaged due to the rigid spacer and movement may be hindered due to insufficient grip on the wafer. If foam spacers are used, the foam spacers are vulnerable to damage and aging. Several products and patents have been filed that disclose these features. Examples of patents covering these products are disclosed herein.

  U.S. Pat. No. 3,392,824 (filing date: Jul. 16, 1968, granted to SF Flynn) and U.S. Pat. No. 5,366,079 (filing date: Oct. 22, 1994, Chih) -Attached to ChingLin et al.) Both disclose packaging systems for buffering circuit wafers. This buffer system is a Belleville type platter or a platter with fixed legs extending from the center of the platter. In these patents, a cushioning system for the wafer is disclosed, but if the spacer collapses in the transport housing, the cushion slides radially on the outer surface of the wafer. As a result, the wafer can be damaged.

  U.S. Patent No. 6,926,150 (issue date: August 9, 2005, granted to Gonzlo Amador et al.) And U.S. Patent No. 7,530,462 (issue date: May 12, 2009, Toshitsugu Yajima et al. In both cases, a wafer cushion using a rigid disk space is disclosed. These patents are more related to spacers between semiconductor wafers than to spacers for buffering and gap filling. In many cases, these spacers are often reinforced by foam pads located on the entire surface of the wafer or only on the outer edge of the wafer.

  US Pat. No. 7,425,362 (issue date: September 16, 2008, granted to James R. Thomas et al.) And US Pat. No. 7,611,766 (issue date: November 3, 2009, Masahiko Fuyuuro) In the corrugated pad disclosed in (1), the upper and lower portions of the pad fill the space between the wafer and the transport housing. These pads are constructed from a variety of materials ranging from plastic to paper and are made to have a variable profile so that they can accommodate the space between the wafer and the transport housing.

  US Pat. No. 6,926,150 (issue date: August 9, 2005, granted to GonzaloAmador et al.), US Pat. No. 7,316,312 (issue date: January 8, 2008, to Pei-Liang Chiu) Grant) and U.S. Patent Application No. 2002/0144927 (granted to RayG. Brooks et al., Published 10 Oct. 2002), a foam pad or ring for cushioning wafers in packaging is disclosed. ing. The amount of force applied from the foam pad can vary significantly with foam degradation. In addition, when a foam is used, contamination can occur with the decomposition of the foam cell structure. Also, the foam particles can become a contaminant and interfere with the doping of the semiconductor wafer. In some cases, the foam can contact the entire wafer surface and cause deformation of the wafer (s).

  What is needed is a buffer ring that can accommodate small changes in the top and bottom of the stack of semiconductor wafers with a variable amount of buffer. The ongoing design provides a solution using single and double wafer cushions.

  The purpose of the single and double wafer cushions is to work with the wafer carrier, which can be placed on both the bottom of the wafer carrier and the top of the wafer placed in the carrier. The cushion expands and collapses to accommodate variations in wafer thickness and carrier housing. Although variations in wafer thickness on individual wafers are small, if these variations accumulate, the gap can grow beyond the desired level. Due to the buffering, minimal force on the wafer and housing is generated, allowing the housing to open easily and further restricting wafer movement within the wafer carrier.

  The purpose of the single and double wafer cushions is to produce single and double wafer cushions that fit snugly within the wafer carrier housing. The shape of the cushion is a folded ring, and the fold is opened on the outer diameter. Since the outer edge of the ring provides maximum expansion, the outer edge of the ring contacts the outer edge of the wafer. As a result, the contact area with the wafer is minimized and any axial load is applied on the outer edge surface of the wafer, the wafer typically minimizes damage to the inner surface of the wafer and the wafer (s). ) Is arranged on the separator disk so as to minimize the bending of the center.

  The purpose of the wafer separator is to provide separation between stacked wafers and / or components placed or bonded onto the wafers so as to avoid damage to the wafers.

  The purpose of the wafer separator for the separator is to provide a vent path between the wafers by providing a plurality of vent holes around the periphery of the wafer separator. These vents reduce the pressure or vacuum generated when flat wafers are stacked and then pulled away from each other. The number and configuration of the vents can vary depending on the wafer diameter and other factors.

Another purpose of the single and double wafer cushions is to construct the single and double wafer cushions with a material that absorbs all of the shocks before they are transmitted to the wafer stack. Such materials may be molded, thermoformed, cast, or vulcanized.
Another purpose of the single and double wafer cushions is to construct the single and double wafer cushions with a cross-sectional shape having only half of the “V” shape. The ring is attached to the upper and / or lower cover by gluing or clipping, thereby providing a half-limiting feature that is missing the “V”. This design can have a single stage version or a two stage version. This design makes it possible to stack single or multiple arms or “V-rings”, thereby reducing the occupied space inside the box.

  Another purpose of the single and double wafer cushions is to construct the single and double wafer cushions with non-absorbent materials. As a result, a situation in which debris or contaminants are buried in the wafer cushion is avoided, and peeling of the material from the wafer cushion is also avoided.

  Another purpose of the single stage and double stage wafer cushions is to use the single stage and double stage wafer cushions as both the edge hinge as a single first stage hinge and the second midspan hinge for the double stage wafer. . Such a two-stage design provides two distinct buffering forces, as opposed to a single-stage design where a certain amount of compression is applied to the outer surface of the wafer cushion by the force from the liner.

  Various objects, features, aspects and advantages of the present invention will become apparent from the following detailed description of the preferred embodiments of the present invention when taken in conjunction with the accompanying drawings. In the drawings, like reference numerals indicate like elements.

FIG. 3 is an isometric view of a single and double wafer cushion. FIG. 3 is an isometric cross-sectional view of a single and double wafer cushion. FIG. 6 is an isometric cross-sectional view of a single and double wafer cushion in a second preferred embodiment. FIG. 6 is an isometric cross-sectional view of a single and double wafer cushion in a third preferred embodiment. 1 is an isometric view of a single and double wafer cushion on a stack of semiconductor wafers, with the upper housing of the wafer shipper not attached. FIG. FIG. 3 is an isometric view of a single and double wafer cushion on a stack of semiconductor wafers with a wafer sipper upper housing attached. FIG. 3 is a side cross-sectional view of a single and dual stage wafer cushion, with the wafer cushion in an uncompressed state. FIG. 3 is a side cross-sectional view of a single and double stage wafer cushion, with the wafer cushion initially compressed. FIG. 3 is a side cross-sectional view of a single and dual stage wafer cushion with the wafer cushion partially compressed. FIG. 4 is a side cross-sectional view of a single and double stage wafer cushion where the wafer cushion is more strongly compressed. FIG. 10 is an isometric cross-sectional view of a single and double wafer cushion in a fourth preferred embodiment. FIG. 10 is an isometric view of a single and dual wafer cushion bonded to the lower housing from a fourth preferred embodiment, with no wafer mounted on the wafer cushion. It is a top view of one embodiment of a wafer separator. It is a bottom view of one embodiment of a wafer separator. It is sectional drawing of the wafer separator cut | disconnected in the cross section 15-15. It is an external view of the wafer separator cut | disconnected in the cross section 16-16.

  FIG. 1 is an isometric view of a single and two-stage wafer cushion 20, and FIG. 2 is an isometric cross-sectional view of the single and two-stage wafer cushion. The single and double wafer cushion 20 from FIG. 1 substantially represents a ring shaped cushion. The inside of the wafer cushion 20 is open. In a preferred embodiment, two single and two stage wafer cushions 20 are placed on a stack of semiconductor wafers 40 as shown in FIG. In this figure, the stack of semiconductor wafers includes a spacer ring 50. These spacer rings 50 are arranged between the semiconductor wafers 40. The spacer 50 allows the “projection” wafer substrate to be stacked with tiny solder balls. Small solder balls are used for electrical interconnection to the final product or external circuit. Protruded wafer stacks are typically used with spacer rings 50 that are the same height and are not adjustable. These spacer rings 50 are provided between the wafers, thereby avoiding a situation where the solder balls (projections) are damaged due to contact with the adjacent substrate 40.

  This first preferred embodiment is a ring designed with dual or variable spring constants. The two-stage version 20 has a single spring constant to facilitate the addition and closing of the sipper top cover (not shown), and the second stage of this spring has the sipper dropped or mishandled. Provides a higher spring constant to absorb the energy of the case, thereby protecting the wafer stack or substrate stack.

  By configuring the cushion in a “V-ring” shape, the cross-section is “V” -shaped and a spring or buffer is obtained for the wafer. This design itself allows an injection molding process, vulcanization or other manufacturing method to be used on the V-shaped cross section. The V-shaped tip 23 provides a contact point between the wafer and the transfer container. Further, by using a plurality of “V-ring” stacking, the occupied space in the wafer transfer container can be reduced. One advantage of such a “V” shape is that the ring can contact only the small zones 23 and 34 on the wafer 40 in the vicinity of the outer periphery. For wafers with protrusions, there is usually a 3 mm wide exclusion zone for circuits or solder bumps that extend inward from the wafer periphery. In the preferred embodiment, there is a slightly raised zone at the wafer contact point, but this feature need not be provided. The slightly raised area at the tip of the “V” shape provides additional clearance for any solder bumps near the “no entry” zone. FIG. 2 shows two separate wafer cushions, the lower cushions being placed in all lower wafer carriers 21 of the wafer 40. The outer diameter edge 23 of the lower cushion is sized to fit within the wafer carrier 21, and the lower lower surface 22 is supported by the lower portion of the wafer carrier 21.

  Due to the weight of the wafer 40 and the support ring 50, the lower wafer cushion is at least partially loaded so that the lower cushion is at least partially compressed and the first step of the wafer cushion or The hinge 31 having an inner diameter 30 compresses the wafer cushion at least partially. Note from FIG. 2 that the second cushion gap is visible on the inside and outside of the central surface 32 when the first stage is compressed. FIG. 2 shows that when the first stage contacts, only the outer diameter edge 34 contacts the outer edge of the semiconductor wafer 40, and the remaining inner diameter surface of the wafer cushion “floats” above the semiconductor wafer. It is further shown that it does not contact the surface (s). When the upper housing (not shown) of the wafer carrier is installed, the upper housing compresses the upper surface 35 of the upper wafer cushion and loads the lower wafer cushion, thereby cushioning the upper and lower wafer cushions. Becomes even.

  FIG. 3 is an isometric cross-sectional view of the single stage and double stage wafer cushions in the second preferred embodiment. In this embodiment, the wafer cushion 20 has an inner lip 60 that provides additional strength for the hinge 65. In addition, a grip surface for facilitating removal of the wafer cushion 20 is provided. The outer diameter 64 is large enough to center the wafer cushion within the wafer carrier. Since the upper portion 61 and the lower surface 62 of the wafer cushion 20 have a slight radial curve, contact with only the upper or lower surface of the outer edge of the semiconductor wafer is maintained. It is further contemplated that the plurality of finger portions created by breaking, serrated or forming the cushion portion 66 can be bent independently of the inner diameter hinge 65. In the illustrated embodiment, the cavity region 66 exists through both the upper and lower lips or arms, but the cavity region 66 may be formed through only one leg of the cushion so that the other leg is continuous. To do. In the first compression stage, the inner outer surface 64 of the wafer cushion contacts to create a gap from the inner hinge region 65 to the outer surface, resulting in a second buffer stage.

  FIG. 4 is an isometric cross-sectional view of the first and second stage wafer cushion 20 in a third preferred embodiment. This third preferred embodiment is briefly described in this figure and detailed in FIGS. This embodiment has a plurality of bent arms extending from the inner diameter hinge regions 70 and 75. When the wafer cushion is mounted in the wafer carrier, the upper end and lower surface 71 are in contact with the outer upper and lower surfaces of the semiconductor wafer. The end outer diameter (s) 73 is large enough to fit within the wafer carrier and hardly moves within the wafer carrier. The wafer cushion is shown expanding in the wafer carrier at the first compression stage in FIGS. 5 and 6.

  FIG. 5 is an isometric view of a single and double wafer cushion on a stack of semiconductor wafers without the wafer sipper upper housing attached. FIG. 6 is an isometric view of a single and double wafer cushion on a stack of semiconductor wafers, with the upper housing of the wafer shipper attached. 5 and 6, the lower cushion is compressed, the lower lip 22 contacts the lower housing 21, and the upper lip 23 contacts the lowermost semiconductor wafer 40. The stack of semiconductor wafers 40 is separated by a wafer separator 50 disposed between the semiconductor wafers 40. In FIG. 5, the upper wafer cushion is shown in an uncompressed state, the first or single cushion stage is not compressed, and the middle of the extension arm is not in contact at midspans 76 and 77. The lower surface of the wafer cushion contacts the outer upper surface of the upper semiconductor wafer 40 at 72. Since the upper surface of the wafer cushion 71 has a tangential arch shape, the contact with the semiconductor wafer 40 and the upper side 25 or the lower side 21 housing is mainly only a linear point contact. The outer edges 74 and 78 of the cushion approximate the outer diameter of the semiconductor wafer 40.

  When the upper housing 25 is lowered onto the wafer cushion, the arms move in directions closer to each other as they move from the inner radius 70 by the hinge. When the housings 21 and 25 are secured, the upper housing presses on the outer edge 26 of the upper wafer cushion and the central portion 77 of the arm contacts to form a first cushion step.

  FIG. 7 is a side cross-sectional view of the single and double stage wafer cushion, where the wafer cushion is in an uncompressed state. FIG. 8 is a side cross-sectional view of the first and second stage wafer cushions, where the wafer cushions are in an initially compressed state. FIG. 9 is a side cross-sectional view of the single and double stage wafer cushion, with the wafer cushion partially compressed. FIG. 10 is a side cross-sectional view of the single and double stage wafer cushion, where the wafer cushion is fully compressed. Referring first to FIG. 7, the wafer cushion 20 is in a natural uncompressed state, and no forces 100 and 101 are applied to cause cushion compression. The curve generated by hinges 70 and 75 maintains the arms in an open “U” or “V” configuration. The upper and lower surfaces 71 and 72 of the wafer cushion are at their maximum dimensions. It is contemplated that the outer lips 74 and 78 are substantially the same size but may exist at different radii. The arm centers 76 and 77 or the second (dual) step are open and not in contact.

  In FIG. 8, the arms compress due to forces 100 and 101 and the inner region begins to compress. As the force increases, the ends 70 and 73 and the central elbow, profile or hinges 76 and 77 bend until the arm inner surface contacts as shown in FIG. Due to the forces 100 and 101, a first load or spring constant profile is obtained.

  At this stage, the resistance spring force to provide buffering changes due to the shortening of the length of the lever arm. In the illustrated embodiment, the contact between the arm segments is approximately in the midspan, but it is contemplated that the center contact can occur at any point within the arm where a different damping force profile is obtained. The profile shown in FIG. 9 shows the housing closed and in normal transport mode. When a further force is applied between the forces shown in FIGS. 9 and 10, 100/101 changes to 102/103, a second load or a load different from the load or spring constant added from FIGS. A spring constant is obtained. This spring constant can be linearly stepped or non-linear based on the shape, angle and constant or variable thickness and leg (s) of the hinge.

  FIG. 10 illustrates an impact load condition that can occur when a wafer carrier falls or collides. Forces 102 and 103 continuously press on the end of the arm. The outer length of the arm is compressed along the length (s). It should be noted that even at this load, the air gap 79 provides additional constant cushioning and the inside on the cushion also provides space for the clearance of components that can be placed on the semiconductor wafer.

  FIG. 11 is an isometric cross-sectional view of the first and second stage wafer cushion 29 in a fourth preferred embodiment. FIG. 12 is an isometric view of the fourth preferred embodiment with the single and double wafer cushions joined to the lower housing and the wafer not being mounted on the wafer cushion.

  “One-sided ring” —a kind of buffer ring 29 as described above is a ring having only half of the cross-sectional shape “V”. This ring can be attached to the top or bottom cover (joined or clipped), thereby providing the cover with half the “V” missing limit function. This design can have a single stage version or a two stage version. This design makes it possible to stack a plurality of “V-rings”, resulting in a reduction in occupied space inside the box. The lower portion of the cushion 90 can be joined to the lower housing 21 (or 25). This one-sided ring has only one arm, but the arm has a similar configuration with inner hinge regions 91 and 92, midspan elbow 93, thereby separating the first and second stages of the cushion. Is formed. The outer edge 95 is sized to provide clearance of the wall of the housing 21 for free movement and bending. The upper edge of the wafer cushion 96 is configured to contact only the outer edge of the wafer separator or a semiconductor wafer (not shown). The lower radius 94 provides additional shock damping when the majority of the wafer cushion 29 is flattened by the wafer stack.

  In a preferred embodiment, the wafer cushion is composed of a material having a Shore D hardness of 10-70, although other hardnesses are contemplated depending on the material to be buffered and the stack height / weight to be buffered. It is also contemplated that the upper and lower wafer cushions used in the wafer shipper may have different characteristics and configurations based on weight or based on whether the semiconductor wafer is positioned above or below the wafer cushion. The contour from the central hinge to the outer contact point may be curved or variable in cross section, or multiple steps to achieve a non-linear cushion force or multiple steps of wafer cushion. It may be an outer shape, an elbow or a bent portion.

  FIG. 13 is a top view of one embodiment of wafer separator 110. FIG. 14 is a bottom view of one embodiment of the wafer separator 110. FIG. 15 is a cross-sectional view of wafer separator 110 taken along section 15-15. FIG. 16 is an external view of wafer separator 110 taken along section 16-16. Wafer separator 110 has an opening center region. The outer raised lip 111 has a lower lower surface 117 and an upper surface 118. The surface of the lower portion 117 and the upper portion 118 provides a space between adjacent wafers 40 (FIG. 1). The wafer is centered and placed on the central surface 116 and the axial lip 113 on the wafer separator 110 buffers the axial load on the wafer. The lower surface 117 and the central surface are slightly angled from the inner diameter 112 to the outer diameter, which allows for cushion placement and wafer (s) gripping.

  The center plane allows space between adjacent wafers for the most important surface of the wafer, component clearance, adhesive pads, solder bumps, solder balls, post-passivation interconnects, and conductors on the wafer. A line is obtained. The lower lower surface 117 of the wafer separator 110 (as shown in FIG. 14) has a plurality of vent holes 114. These vents extend from the inner diameter surface 112 to the outer diameter 111. The outer shape of these vent holes is “V”, “U”, square, rectangular, or a combination thereof. These vents allow the passage of air from the underside of the wafer, thereby reducing the vacuum and pressure when the wafer is removed from the stack and placed on the central surface 116. Although twelve vents are used in the illustrated embodiment, only one vent to more than twelve vents are contemplated, depending on the wafer diameter and the geometry of the vent (s) 114. Is done. A slight radius or circle 115 terminates the vents on the outside of the wafer separator 110, thereby distributing all the vents and avoiding vapor concentration. Because the wafer separator is configured without rotational orientation, the wafer separator can be placed in any rotational orientation and alignment of the vent holes 114 is not necessary.

  Thus, specific embodiments of single and double wafer cushions and wafer separators have been disclosed. However, one of ordinary skill in the art appreciates that numerous modifications other than those described above are possible without departing from the concepts herein. Therefore, the present invention is not limited except for the appended utility model registration request.

Claims (20)

A wafer separator,
The outer perimeter,
The outer peripheral portion includes an outer peripheral portion having an upper surface and a lower surface;
A cushion having a substantially ring shape;
A central surface having a smaller diameter than the outer peripheral portion, the central surface being disposed between the upper surface and the lower surface for wafer placement;
The central surface extending to an inner diameter providing an open central region;
A wafer separator including at least one vent disposed on the lower surface extending from the inner diameter to the outer peripheral portion.   The wafer separator of claim 1, wherein the at least one vent is sized to provide an air cushion chamber below the wafer.   The wafer of claim 1, wherein the central area of the opening provides component clearance, adhesive pads, solder bumps, solder balls, post-passivation interconnections, and conductor lines on the wafer. Separator.   The wafer of claim 1, wherein the central area of the opening provides component clearance, adhesive pads, solder bumps, solder balls, post-passivation interconnections, and conductor lines on adjacent wafers. Separator.   The wafer separator according to claim 1, wherein the wafer is 200 or 300 mm.   The wafer separator of claim 1, wherein the wafer separator is stacked on the top and bottom surfaces without causing any load on the wafer.   The wafer separator according to claim 1, wherein an outer shape of the at least one vent hole is “V”, “U”, a quadrangle, a rectangle, or a combination thereof.   The wafer separator of claim 1, wherein the outer peripheral portion is sized to fit within a wafer carrier.   2. The wafer separator according to claim 1, wherein the at least one vent hole is a plurality of vent holes and is arranged evenly spaced around the lower surface.   The wafer separator according to claim 9, wherein the plurality of vent holes can be changed according to a dimension of the outer peripheral portion.   The wafer separator according to claim 9, wherein the plurality of air holes can be changed in accordance with an amount of air below the wafer.   The wafer separator according to claim 1, wherein the at least one vent hole extends in a radial direction from the inner diameter toward the outer peripheral portion.   The wafer separator of claim 1, wherein the central surface is angled.   The wafer separator of claim 1, wherein the lower surface is angled.   The wafer separator according to claim 1, wherein the wafer separator is made of a material based on a Shore D hardness of 10 to 70.   The wafer separator of claim 1, wherein the vent terminates with a radius or a circle, and the vent terminates at the outer peripheral portion.   The wafer separator according to claim 1, further comprising a central diameter wall portion between the outer peripheral portion and the inner diameter.   The wafer separator according to claim 17, wherein the central diameter wall is sized to fit an outer shape of the wafer.   The vent of claim 1, wherein the vent is configured to allow venting between a lower surface of the first wafer separator and an upper surface of the second wafer separator without generating airflow on the wafer surface. The wafer separator as described.   The wafer separator according to claim 1, wherein the wafer separator does not have rotational orientation.

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