JP3188224B2 - Dry etching method - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

The present invention relates to a method for etching a film to be etched.

[0002]

2. Description of the Related Art In recent years, in a display semiconductor device such as an active matrix type liquid crystal display device and a photoelectric conversion element such as a solar cell, it is necessary to transmit light through the device. The substance is used. In order to pattern a transparent electrode made of such a transparent conductive material into a predetermined shape, a dry etching method such as a wet etching method in which the electrode is immersed in a hydrochloric acid aqueous solution or a reactive ion etching method (Reactive Ion Etching: RIE) is used. Used.

However, in the wet etching method, since the etching is isotropically etched, lateral etching called side etching or undercut occurs, which is not very suitable for fine processing. Therefore, an RIE method, which is a dry etching method, is used. In the RIE method, the chamber is evacuated to a vacuum state, a reaction gas such as CF ₄ is put into the chamber, and high-frequency power is applied from a high-frequency power source, thereby causing discharge to generate plasma. In this plasma, the gas is dissociated by collisions with electrons whose electric field is accelerated, generating ions and extremely chemically active atoms and molecules. RI
The method E utilizes ions generated by dissociation of a reaction gas. When CF ₄ is used as a reaction gas, cations such as CF ₃ ⁺ and CF ₂ ⁺ are generated. The cations generated in this manner are accelerated by an electric field, and are made to collide with an object to be etched. Since such ion bombardment occurs only in the depth direction, the etching proceeds only in the vertical direction, resulting in anisotropic etching.

Japanese Patent Application Laid-Open No. 2-158129 (International Patent Classification; H01L 21/302) describes a technique for etching a transparent electrode film using the RIE method.
According to the technique described in the publication, an ITO film formed on an amorphous silicon film is etched by a RIE method using a mixed gas of chlorine (Cl ₂ ) and methane (CH ₄ ). I have.

[0005] However, in such an etching method, C and H contained in methane are dissociated by plasma injection, and a deposit composed of a compound containing C and H is generated. Since such a deposit adheres to the base of the ITO film and the wall surface in the chamber or floats in the chamber, there has been a problem that the film to be etched is contaminated.

[0006] Therefore, it is necessary to frequently clean the inside of the chamber, and this has hindered the manufacturing process.

[0007]

SUMMARY OF THE INVENTION The present invention has been made in view of the above-mentioned conventional drawbacks, and has as its object to provide a dry etching method capable of performing uniform etching with little residue and particles of a film to be etched. And

[0008]

[Means for Solving the Problems]

[0009]

In the dry etching method according to the first aspect, after the film to be etched containing In ₂ O ₃ is dry-etched with a first etching gas, the first etching gas is switched to a second etching gas. A dry etching method for continuously dry-etching the film to be etched, wherein the degree of vacuum of the system during dry etching using the second etching gas is at least 20 mT.
Since it is less than orr, the product of the etching can be sufficiently exhausted and no residue can be left.

[0011] The dry etching method according to claim 2, wherein the first etching gas is a hydrogen bromide or hydrogen iodide, the second etching gas, characterized in that a chlorine-based gas since the dry etching method of claim 1, one of HBr, HI reacts with an in ₂ O _3, it is etched to produce the in ₂ Br _3, Inl _3. The other Cl forms InCl ₃ and etches, and can decompose and remove products containing C and H generated by the reaction with HBr and HI as CCl ₂ ↑, H ₂ ↑ and HCl ↑.

[0012] The dry etching method according to claim 3, wherein the chlorine-based gas, Cl ₂ or BCl _3, or dry to claim 2 serial <br/> mounting, which is a mixed gas thereof, Since it is an etching method, accurate and clean etching can be performed. The dry etching method according to claim 4, claims 1 to 3, characterized in that said dry etching is reactive ion etching
Since the dry etching method according to any one of the above, the reaction can be promoted by ion bombardment energy and energy can be given to the product to facilitate evaporation.

[0013]

[0014]

[0015]

[0016]

[0017]

[0018]

[0019]

[0020]

[0021]

[0022]

[0023]

[0024]

[0025]

[0026]

[0027]

[0028]

FIG. 1 shows a case where the dry etching method of the present invention is applied to a polycrystalline silicon thin film transistor and a liquid crystal display device using the thin film transistor. Step 1 (FIG. 1A): A polycrystalline silicon film 2 is formed on an insulating substrate 1 made of a quartz glass substrate or the like by using a low pressure CVD method. In order to use the polycrystalline silicon film 2 as an active layer of a thin film transistor, it is processed into a predetermined shape, for example, an island shape by a photolithography process or the like.

In the step 1, the polycrystalline silicon film 2 is formed on the insulating substrate 1, but the present invention is not limited to this. An amorphous silicon film is formed on the insulating substrate 1 and solid-phase growth is performed. Thus, the polycrystalline silicon film 2 may be formed. Step 2 (FIG. 1B): Then, H as a gate insulating film 3 is formed on the polycrystalline silicon film 2 by a low pressure CVD method.
A TO film (High Temperature Oxide: silicon oxide film) is formed.

Step 3 (FIG. 1C): After a polycrystalline silicon film 4 is deposited on the gate insulating film 3 by a low pressure CVD method, impurities are implanted into the polycrystalline silicon film 4 to further perform a heat treatment. To activate the impurities. Next, normal pressure CVD
A silicon oxide film 5 is deposited on polycrystalline silicon film 4 by a method. Next, the polycrystalline silicon 4 and the silicon oxide film 5 are patterned into a predetermined shape by using a photolithography technique and a dry etching technique by an RIE method. This polycrystalline silicon film 4 becomes the gate electrode 4.

An HTO film as an insulating film is formed on the gate insulating film 3 and the silicon oxide film 5 by a low pressure CVD method. This is anisotropically etched back to form sidewalls 6 on the side surfaces of the gate electrode 4 and the silicon oxide film 5. Next, impurities are implanted into the source region 8 and the drain region 9 in the polycrystalline silicon film 2 by a self-alignment technique, and a heat treatment is performed to activate the impurities.

Step 4 (FIG. 1D): The side walls 6 and the silicon oxide film 5 are covered with a resist film 10, and impurities are implanted into the polycrystalline silicon film 2 using the resist film 10 as a mask. As a result, a region having a lower concentration than the source region 8 and the drain region 9, that is, an LDD (Lightly Do
A ped drain region 7 is formed, and a TFT having an LDD structure can be formed.

Step 5 (FIG. 2E): After the resist film 10 is removed, a silicon oxide film 11 and a fluid BPSG film (a part of the interlayer insulating film) are formed on the entire surface of the device by normal pressure CVD. 12) are deposited successively. Next, it is placed in an electric furnace and heated to 900 ° C. to reflow the BPSG film. The heat treatment at this time activates the source region 8 and the drain region 9 at the same time.

Through the above steps, a thin film transistor is formed. Since the BPSG film 12 has poor peelability of the resist film and easily absorbs moisture, a silicon oxide film is further deposited on the BPSG film as a protective film by a normal pressure CVD method. As described above, the silicon oxide film / BPSG
An interlayer insulating film 13 made of a film / silicon oxide film is formed.

Next, it is placed in an electric furnace and heated at a temperature of 450 ° C. for 12 hours in a hydrogen atmosphere to perform a hydrogen plasma treatment.
By performing such hydrogen treatment, hydrogen atoms are bonded to crystal defect portions of the polycrystalline silicon film, so that the crystal structure is stabilized and the field effect mobility is increased. Step 6 (FIG. 2F): A contact for making contact between a transparent electrode described later and the source region 8 and the drain region 9 at a position of the interlayer insulating film 13 corresponding to the source region 8 and the drain region 9. A contact hole 14 is formed.

Thereafter, a wiring layer 15 in which an Al—Si alloy and Ti are laminated is formed on the contact hole 14 and the interlayer insulating film 13. Step 7 (FIG. 2G): The wiring layer 15 is dry-etched by photolithography and RIE to form a source electrode 16.
And the drain electrode 17. Step 8 (FIG. 2H): Then, a protective film 18 made of a silicon oxide film is formed on the entire surface of the device by a normal pressure CVD method. In the silicon oxide film 18, a contact hole 19 that contacts the source electrode 16 is formed by photolithography and dry etching.

Step 9 (FIG. 3I): Next, a transparent conductive film 20 made of an ITO film is formed on the entire surface of the device including the silicon oxide film 18 and the inside of the contact hole 19 by sputtering. This ITO film is to be the pixel electrode 20 '. Step 10 (FIG. 3 (j)): Then, the transparent conductive film 20
A resist film 21 is applied thereon to form a predetermined electrode pattern.

In this state, the exposed transparent conductive film 20 is etched by a dry etching method, for example, the RIE method using HBr gas as a first etching gas. Subsequently, HBr is changed to Cl ₂ gas as a _second etching gas, and etching is performed to the end. Step 11 (FIG. 3 (k)): After etching, resist film 2
1 is removed to form the pixel electrode 20 ', and a TFT (Thin Film Transistor) substrate on one side of the liquid crystal display device is completed.

The case where the above-mentioned TFT substrate is used for a liquid crystal display device will be described below. FIG. 4 is a partial cross-sectional view of the liquid crystal display device. A counter electrode substrate 22 is provided at a position facing the above-described TFT substrate. On the counter electrode substrate 22, a counter electrode 23 made of an ITO film or the like is formed in order.
In the case of the active matrix type, the counter electrode 23 is formed as a common electrode on the entire surface of the substrate. An alignment film 24 made of polyimide or the like for aligning the liquid crystal is formed thereon.
An alignment film 24 made of polyimide or the like is also formed on the TFT substrate 1 manufactured by the above-described manufacturing method.

The two substrates are bonded to each other between and around the completed counter electrode substrate 22 and the TFT substrate 1 using a sealing agent 25 made of an adhesive resin. Then, as shown in the schematic sectional view of the liquid crystal display device shown in FIG. 5, a liquid crystal material 26 is filled between the two substrates to complete a liquid crystal display (LCD). Since FIG. 5 is a schematic diagram, all TFTs manufactured by the above-described manufacturing method are not described. Therefore, it is different from the actual number.

FIG. 6 is a block diagram of an active matrix type LCD according to this embodiment. In the pixel section 30, each scanning line (gate wiring) G1... Gn, Gn + 1.
..Gm and each data wiring (drain line) D1... D
n, Dn + 1... Dm. Each gate line and data line are orthogonal to each other, and a pixel 31 is provided at the orthogonal portion. Each gate wiring is connected to a gate driver 32 so that a gate signal (scanning signal) is applied. Each drain wiring is connected to a drain driver (data driver) 33 so that a data signal (video signal) is applied. A peripheral drive circuit 34 is configured by these drivers 32 and 33.

An LCD in which at least one of the drivers 32 and 33 is formed on the same substrate as the pixel unit 30 is generally a driver integrated type (built-in driver type).
It is called CD. Note that the gate driver is a pixel
0 may be provided at both ends. Further, the drain driver 33 may be provided at both ends of the pixel unit 30 in some cases.

The switching element of the peripheral drive circuit 34 also uses a polycrystalline silicon TFT manufactured by the same manufacturing method as that of the polycrystalline silicon TFT. Formed. The polycrystalline silicon TFT for the peripheral drive circuit
Adopts an ordinary single drain structure instead of an LDD structure (of course, it may have an LDD structure).

The polycrystalline silicon TFT of the peripheral driving circuit is formed in a CMOS structure, thereby realizing a reduction in the size of each driver. FIG. 7 shows an equivalent circuit of a pixel 31 provided at a portion orthogonal to the gate line Gn and the drain line Dn. The pixel 31 includes a TFT as a pixel driving element, a liquid crystal cell LC, and an auxiliary capacitance Cs. The gate of the TFT is connected to the gate wiring Gn, and the drain of the TFT is connected to the drain wiring Dn. The liquid crystal cell LC is used as the source of the TFT.
Are connected to an auxiliary capacitance (additional capacitance) Cs.

The liquid crystal cell LC and the storage capacitor Cs form a signal storage element. The voltage Vcom is applied to the common electrode (the electrode on the opposite side of the display electrode) of the liquid crystal cell LC. On the other hand, in the auxiliary capacitance Cs, a constant voltage VR is applied to an electrode on the side opposite to the side connected to the source of the TFT. The common electrode of the liquid crystal cell LC is an electrode which is literally common to all the pixels 31.
In the auxiliary capacitance Cs, the electrode on the side opposite to the side connected to the source of the TFT may be connected to the adjacent gate line Gn + 1 in some cases.

In the pixel 31 thus configured,
When a positive voltage is applied to the gate of the TFT by setting the gate line Gn to a positive voltage, the TFT turns on. Then, the capacitance of the liquid crystal cell LC and the auxiliary capacitance Cs are charged by the data signal applied to the drain wiring Dn. Conversely, when the gate line Gn is set to a negative voltage and a negative voltage is applied to the gate of the TFT, the TFT is turned off, and the voltage applied to the drain line Dn at that time becomes the capacitance and the auxiliary capacitance of the liquid crystal cell LC. Cs. As described above, by supplying the data signal to be written to the pixel to the drain wiring Dn and controlling the voltage of the gate wiring, an arbitrary data signal can be held in the pixel. The transmittance of the liquid crystal cell LC changes according to the data signal held by the pixel, and the pixel is displayed.

Here, the important characteristics of the pixel are:
There are writing characteristics and holding characteristics. What is required for the writing characteristics is that the signal storage elements (the liquid crystal cell LC and the storage capacitor C
The point is whether a desired video signal voltage can be sufficiently written to s). What is required for the holding characteristics is whether the video signal voltage once written in the signal storage element can be held for a required time. The auxiliary capacitance Cs is provided to improve the writing characteristics and the holding characteristics by increasing the capacitance of the signal storage element. That is, in the liquid crystal cell LC, there is a limit to the increase in capacitance due to its structure.
Therefore, the insufficient capacitance of the liquid crystal cell LC is compensated for by the auxiliary capacitance Cs. Here, a dry etching apparatus used in the present invention will be described.

FIG. 8 is a schematic sectional view of a dry etching apparatus used in the present invention. As shown in the figure, the chamber is provided with a cathode electrode substrate provided with a film to be etched, for example, a glass substrate, and an anode electrode substrate facing the cathode electrode substrate. Cooling water for adjusting the substrate temperature is circulated inside the cathode electrode substrate. Further, an etching gas for etching the film to be etched can be introduced into the anode electrode substrate.

The chamber is evacuated to a vacuum after the film to be etched is disposed, and then a high-frequency power is applied to the cathode electrode from a high-frequency power supply to generate a discharge and generate plasma. The introduced gas is dissociated to generate ions and the like, which are accelerated by the electric field and collide with the film to be etched on the cathode electrode substrate to etch the film to be etched.

Here, the relationship between the temperature of the cathode electrode of the dry etching apparatus and the etching rate of the film to be etched will be described. FIG. 9 shows the relationship between the etching rate and the substrate temperature. As shown in the figure, the horizontal axis shows the temperature of the cathode electrode, and the vertical axis shows the etching rates of the film to be etched and the ITO film.

According to the figure, it is understood that the etching rate is constant irrespective of the temperature of the cathode electrode. That is, it is found that the etching rate of the film to be etched does not depend on the cathode electrode temperature. Next, the relationship between the degree of vacuum in the chamber and the etching rates of the film to be etched and the ITO film will be described.

FIG. 10 shows the relationship between the degree of vacuum in the chamber and the etching rates of the film to be etched and ITO.
As shown in the figure, the horizontal axis indicates the degree of vacuum in the chamber,
The vertical axis indicates the etching rate of the ITO film. According to the figure, it can be seen that the etching rate of the film to be etched is substantially constant regardless of the degree of vacuum in the chamber. That is, it is understood that the etching rate of the film to be etched does not depend on the degree of vacuum in the chamber.

Further, the relationship between the degree of vacuum and the residue during the etching of the film to be etched will be described. FIG. 11 is a table showing the relationship between the conditions etched by the dry etching method of the present invention and the residues of the film to be etched.
2 shows a graph in which the values are plotted.

The values in the table shown in FIG. 11 are the results of measuring the residue, which is the remaining thickness of the ITO film after etching the ITO film with the first etching gas and then etching with the second etching gas. is there. As shown in FIGS. 11 and 12, the horizontal axis represents the degree of vacuum in the chamber when the dry etching is performed using the first etching gas and then the ITO film is etched using the second etching gas. Represents the thickness of the residue at each degree of vacuum.

It can be clearly seen that the thickness of the residue is very large when the degree of vacuum in the chamber during etching with the second etching gas is 20 mTorr or more, but becomes very small when the degree of vacuum is less than 20 mTorr. Here, the residue of the ITO film, which is a transparent conductive film, is obtained by etching with a second etching gas, observing a cross-sectional SEM, and measuring the thickness of the remaining ITO film.

Further, HBr is used as the first etching gas.
And Cl2 gas was used as the second etching gas. In the present invention, as the transparent conductive film of the film to be etched, in addition to the ITO film, In2O3 (indium oxide)
There are transparent conductive films such as films, SnO2 (tin oxide) films, and ZnO (zinc oxide) films.

Here, the SEM of the surface of the ITO film before and after etching by the dry etching method of the present invention was used.
The photograph is shown in FIG. 13A shows the surface of the etched ITO film when the degree of vacuum in the chamber at the time of etching is 20 mTorr, and FIG. 13B shows the state where the degree of vacuum at the time of etching is 30 mTorr.
The surface of the state where the ITO film is etched at the time of rr is shown.

As shown in the figure, one area (a) has an IT
The region where the O film is etched, and the other region (b) is IT
The ITO film remains in the region where the O film was covered with the resist film at the time of etching, and a step is generated from the region (a). In the area (a) of FIG.
The surface is flat with no residue of the film (in the figure, it looks uniform black with no white spots). Therefore, it is understood that the ITO film has been completely etched. On the other hand, in the region shown in FIG. 3B, the ITO film remains and has irregularities (in FIG. 4, white spots which are residues of the ITO film are seen).

Next, the degree of vacuum in the chamber at the time of etching and the variation in the remaining ITO film after etching will be described. FIG. 14 shows the relationship between the degree of vacuum in the chamber and the in-plane variation of the residue (surface thickness) of the film to be etched. As shown in the figure, the horizontal axis indicates the degree of vacuum in the chamber, and the vertical axis indicates the variation in the etching rate in the plane. The variation is shown as a ratio (%) of the variation to the average value of the thickness of each point in the plane.

According to the figure, the degree of vacuum in the chamber is 3
It can be seen that when the pressure reaches 0 mTorr, the variation becomes about two to three times more than when the variation is less than 30 mTorr. That is, it is understood that when the pressure is 30 mTorr or more, a portion where the product produced by the etching is hardly exhausted is formed in the surface, and a portion where an extremely large amount of residue is generated is generated.

Here, FIG. 15 shows a film I to be etched.
The number of etching treatments on the substrate provided with the TO film and the number of particles (size 0.
3 to 10 μm). As shown in the figure, the horizontal axis indicates the number of processed sheets, and the vertical axis indicates the number of particles.

An ITO film having a thickness of 2000 Å was formed on the substrate on which the TFT was formed with an insulating film interposed therebetween, followed by dry etching with HBr and then etching with Cl ₂ gas. From the figure, it can be seen that no increase in particles is observed even after processing 100 sheets. This is because the generation of particles was suppressed by performing dry cleaning using Cl ₂ gas after etching the ITO film using HBr.

The above is summarized as follows. (1) The thickness of the residue is very large when the degree of vacuum in the chamber at the time of etching with the second etching gas is 20 mTorr or more, but becomes very thin when the degree of vacuum is less than 20 mTorr. (2) When the degree of vacuum in the chamber becomes 30 mTorr, the variation in the substrate becomes larger than when it is less than 30 mTorr.

(3) No increase in particles is observed even when a large number of sheets are processed. (4) The etching rate of the film to be etched is substantially constant regardless of the degree of vacuum in the chamber. (5) The etching rate is almost constant irrespective of the temperature of the cathode electrode. From these facts, it can be seen that by switching from the first etching gas to the second etching gas and setting the degree of vacuum at the time of etching to less than 20 mTorr, no residue is left and no particles are generated. In the above-described embodiment, the active matrix type liquid crystal display device has been described. However, the present invention can be applied to a known simple matrix type liquid crystal display device.

[0065]

According to the present invention, the characteristics of a semiconductor device and a liquid crystal display device can be improved because no residue remains after the etching of the film to be etched.

[Brief description of the drawings]

FIG. 1 is a process sectional view showing an embodiment of the present invention.

FIG. 2 is a process sectional view showing one embodiment of the present invention.

FIG. 3 is a process sectional view showing an embodiment of the present invention.

FIG. 4 is a sectional view showing one embodiment of the present invention.

FIG. 5 is a sectional view showing an embodiment of the present invention.

FIG. 6 is a block diagram showing an embodiment of the present invention.

FIG. 7 is an equivalent circuit diagram showing an embodiment of the present invention.

FIG. 8 is a schematic sectional view of an etching apparatus showing one embodiment of the present invention.

FIG. 9 is a characteristic diagram showing one embodiment of the present invention.

FIG. 10 is a characteristic diagram showing one embodiment of the present invention.

FIG. 11 is a characteristic diagram showing one embodiment of the present invention.

FIG. 12 is a characteristic diagram showing one embodiment of the present invention.

FIG. 13 is a perspective photograph showing an embodiment of the present invention.

FIG. 14 is a characteristic diagram showing one embodiment of the present invention.

FIG. 15 is a characteristic diagram showing one embodiment of the present invention.

[Explanation of symbols]

 Reference Signs List 1 TFT substrate 20 ITO film 20 'Pixel electrode 22 Counter electrode substrate

Claims (4)

(57) [Claims] In one embodiment, the first etching gas contains In ₂ O ₃ .
After the non-etched film is dry-etched, the first
A dry etching method for continuously dry-etching the film to be etched by changing the etching gas to a second etching gas, wherein at least the degree of vacuum of the system at the time of dry etching using the second etching gas is less than 20 mTorr. A dry etching method, characterized in that: 2. The method according to claim 1, wherein the first etching gas is hydrogen bromide or hydrogen iodide, and the second etching gas is
The dry etching method according to claim 1, wherein the dry etching method is a chlorine-based gas. 3. The method according to claim 1, wherein the chlorine gas is Cl ₂ or BC.
l ₃ or a mixed gas thereof
The dry etching method according to claim 2 . 4. The method of claim 1 to claim 3, wherein said dry etching is reactive ion etching
The dry etching method according to claim 1.