JP3186708B2 - Method for manufacturing semiconductor device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

The present invention relates to a method for manufacturing a semiconductor device, and more particularly to a method for gettering a heavy metal in a device active region on the outermost surface of a silicon substrate.

[0002]

2. Description of the Related Art In recent years, with the miniaturization and high integration of semiconductor devices, it has been pointed out that a slight amount of heavy metal contamination in a semiconductor device manufacturing process has an adverse effect on electrical characteristics of the semiconductor device.

[0003] Contamination by a trace amount of heavy metal is present near the gate oxide film to degrade the oxide film breakdown voltage of the MOS transistor, or is present near the capacitance insulating film of the trench capacitor to degrade the charge retention characteristics. I do. Further, a deep energy level is formed in the forbidden band to become a recombination center for minority carriers, thereby increasing the leakage current of the PN junction.

An example of a method for gettering a heavy metal present in an element active region near the surface of a silicon substrate is described in JP-A-1-26856.

A method for gettering heavy metals described in Japanese Patent Application Laid-Open No. 1-28566 will be described with reference to FIGS. According to the heavy metal gettering method described in JP-A-1-26856, a gate oxide film 801 is first formed on a silicon substrate 800 as shown in FIG.

Next, as shown in FIG. 23B, a polycrystalline silicon film 802 serving as a gate electrode is formed on the gate oxide film 801.

Subsequently, as shown in FIG. 24C, B (boron) ions 8 are formed in the polycrystalline silicon film 802.
03 is ion-implanted in a concentration range of 1 × 10 ¹⁵ / cm ² to 1 × 10 ¹⁶ / cm ² .

[0008] Further, as shown in FIG.
P (phosphorus) ions 804 are ion-implanted into the polycrystalline silicon film 802 in a concentration range of 5 × 10 ¹³ / cm ^{2 to} 5 × 10 ¹⁴ / cm ² .

Next, when a heat treatment is performed in polycrystalline silicon film 802 doped with boron and phosphorus, metal 806 existing in gate oxide film 801 (FIG. 25)
(E)) is gettered in the polycrystalline silicon film 805 as shown in FIG.

As described above, the method of gettering heavy metals described in Japanese Patent Application Laid-Open No. Hei 1-26856 discloses a method of doping P which does not significantly affect the sheet resistance of the gate electrode, thereby reducing the gate insulating film. Of the semiconductor device, thereby suppressing fluctuations in the electrical characteristics of the semiconductor element (such as the threshold voltage of the transistor).

[0011]

However, in the heavy metal gettering method described in Japanese Patent Application Laid-Open No. 26856/1990, the heavy metal gettered in the polycrystalline silicon film 802 is subjected to a heat treatment in a later step. Is re-emitted, and the re-emitted heavy metal is present in the element active region near the surface of the silicon substrate, and has a problem of adversely affecting the electrical characteristics of the semiconductor element.

It is an object of the present invention to provide a method of manufacturing a semiconductor device which can effectively getter heavy metals existing in an element active region near a gate oxide film and a trench capacitance insulating film.

[0013]

[0014]

[0015]

[0016]

[0017]

[0018]

[0019]

Means for Solving the Problems To achieve the above object,
In the method of manufacturing a semiconductor device according to the present invention, a step of forming a gate oxide film on a silicon substrate, a step of forming an amorphous silicon film on the gate oxide film, Forming a mask pattern made of a silicon oxide film on the amorphous silicon film, implanting an impurity element ion whose conductivity type is not determined into the amorphous silicon film, and heat-treating the silicon substrate to form the amorphous silicon film. The method includes a step of converting a silicon film into a polycrystalline silicon film, and a step of forming a gate electrode by removing the polycrystalline silicon film into which the impurity element whose conductivity type is not determined by ion implantation is removed by dry etching.

Further, in the method of manufacturing a semiconductor device according to the present invention, a step of forming a trench in a silicon substrate, a step of forming an amorphous silicon film on the silicon substrate and filling the trench, A step of ion-implanting an impurity element whose conductivity type is not determined on the surface of the silicon film, and a step of converting the amorphous silicon film into a polycrystalline silicon film by heat-treating the silicon substrate;
Removing the polycrystalline silicon film present on the surface of the silicon substrate.

Further, in the method of manufacturing a semiconductor device according to the present invention, a step of forming a trench in a silicon substrate; a step of forming a first amorphous silicon film in the silicon substrate to fill the trench; A second amorphous silicon film in which an impurity element whose conductivity type is not determined is introduced into the second amorphous silicon film;
Forming an amorphous silicon film, converting the first and second amorphous silicon films into a polycrystalline silicon film by heat-treating the silicon substrate, and forming a polycrystalline silicon film on the surface of the silicon substrate. The second polycrystallized
Removing the amorphous silicon film.

[0022]

A step of forming a gate oxide film on the silicon substrate; a step of forming a first amorphous silicon film on the gate oxide film; and determining a conductivity type on the amorphous silicon film. Forming a second amorphous silicon film into which an impurity element not to be introduced is introduced, and converting the first and second amorphous silicon films into a polycrystalline silicon film by heat-treating the silicon substrate. Forming a gate electrode by patterning the polycrystalline silicon film ; and forming a metal silicide on the diffusion layer and the gate electrode of the silicon substrate.

[0024]

[0025]

Embodiments of the present invention will be described below with reference to the drawings.

In order to prevent the heavy metal gettered in the polycrystalline film from being re-emitted by a heat treatment in a later step, the heavy metal must be removed from the gettered region or must not be re-emitted. What is necessary is just to fix a heavy metal.

In the first method of the present invention, a heavy metal present in an element region on a substrate is gettered in a region other than the element region, and the region where the heavy metal is gettered is removed. Masking, implanting ions into regions other than the device region, and performing a heat treatment to reduce the crystal grain size in the region other than the device region, and further masking the device active region again; The region other than the device active region is removed by etching.

Next, a case where the element region is a gate electrode will be described as a specific example. Forming a mask pattern of a silicon oxide film on the amorphous silicon film to be a gate electrode,
Oxygen or nitrogen ions are implanted into the amorphous silicon film and heat treatment (crystallization) is performed.

In the region into which oxygen or nitrogen ions are implanted, the growth of crystal grains is suppressed and the crystal grain size becomes smaller than in the region which is masked by the silicon oxide film and is not implanted. It is known that a heavy metal is gettered by forming a strain field due to lattice mismatch at a crystal grain boundary in a polycrystalline silicon film.

Since the gettering sites per unit volume increase as the crystal grain size becomes smaller, heavy metals existing in the vicinity of the gate oxide film and the trench capacitance insulating film and in the device active region on the substrate surface are reduced in the polycrystalline silicon film. Is preferentially obtained in a region having a smaller crystal grain size, that is, a region doped with oxygen or nitrogen.

Thereafter, the gate electrode formed by removing the polycrystalline silicon film by dry etching using the silicon oxide film as a mask contains almost no heavy metal, so that the heavy metal will not be re-emitted in the subsequent heat treatment step. .

This method is also applicable to a trench capacitor electrode forming step. In this case, oxygen or nitrogen is ion-implanted into a surface portion of the amorphous silicon film to be a trench capacitor electrode, or a second amorphous silicon film is doped with oxygen or nitrogen after forming the first amorphous silicon film. Form amorphous silicon.

After that, when the amorphous silicon is crystallized by performing a heat treatment, the heavy metal present in the device active region near the trench becomes a region having a smaller crystal grain size in the polycrystallized silicon film, ie, oxygen or nitrogen. Gettering is preferentially performed on the doped region.

After that, if the polycrystalline silicon film containing the heavy metal present above the trench on the silicon substrate is removed, the capacitor electrode formed in the trench portion contains almost no heavy metal, so that the heavy metal is removed in the subsequent heat treatment step. Will not release again.

Further, in the second method of the present invention, the element region where the heavy metal exists on the substrate is converted into a metal silicide, and the heavy metal is fixed in the element region. Implantation and heat treatment for reducing the crystal grain size of the element region are performed, and further, the element region is converted into metal silicide to fix a heavy metal in the element region.

Next, a case where the element region is a gate electrode will be described as a specific example. Doping oxygen or nitrogen ions by ion implantation into the outermost surface of the first polycrystalline silicon film serving as a gate electrode, or adding impurities (oxygen or nitrogen) whose conductivity type is not determined on the first polycrystalline silicon film A doped second polycrystalline silicon film is formed.

When the amorphous silicon film having such a structure is crystallized by heat treatment, the region of the first polycrystalline silicon film which is doped with oxygen or nitrogen has a crystal grain size of the first polycrystalline silicon film. Since the crystal grain size is smaller than that of the polycrystalline silicon film, the strain field due to the lattice mismatch increases, and the gettering ability increases, as in the first method of the present invention.

Therefore, the heavy metal present in the device active region near the gate oxide film is preferentially gettered by the oxygen or nitrogen doped region existing above the first polycrystalline silicon film.

In this state, after the patterning of the gate electrode and the formation of the sidewall film, the diffusion layer and the gate electrode are subjected to metal silicidation, whereby the oxygen, nitrogen, or oxygen existing above the first polycrystalline silicon film is removed. The heavy metal gettered in the halogen-doped region is also converted to metal silicide at the same time, and is fixed to the gate electrode.

Therefore, the heavy metal is not re-emitted in the subsequent heat treatment step. By using these methods, heavy metals are effectively removed from the element active region on the substrate surface such as near the gate oxide film or near the trench capacitance element, so that deterioration of the gate oxide film breakdown voltage, charge retention characteristics, junction leak characteristics, and the like is reduced. Can be suppressed.

Next, a specific example of the present invention will be described as an embodiment with reference to the drawings.

(Embodiment 1) FIGS. 1 to 5 are sectional views showing a case in which a method of manufacturing a semiconductor device according to Embodiment 1 of the present invention is applied to a step of forming a gate electrode.

First, as shown in FIG. 1A, a gate oxide film 101 is formed on a silicon substrate 100.

Next, as shown in FIG. 1B, an amorphous silicon film 10 serving as a gate electrode is formed on the gate oxide film 101.
2 is formed using a known CVD method.

Subsequently, as shown in FIG. 2C, a silicon oxide film 103 is formed on the amorphous silicon film 102 by using a known CVD method.

Further, as shown in FIG. 2D, a photoresist 104 is applied on the silicon oxide film 103, and the gate electrode is patterned by using a known photolithography technique.

Next, as shown in FIG. 3E, the unnecessary silicon oxide film 1 is
03 is removed using a known dry etching technique, and a silicon oxide film pattern 1 composed of a silicon oxide film 103 is removed.
05 is formed.

Subsequently, after the photoresist 104 is removed, oxygen ions 106 are implanted into the amorphous silicon film 102 using the silicon oxide film pattern 105 as a mask, as shown in FIG. A high-concentration oxygen implantation region 107 is formed in the high-quality silicon film 102.

The implantation dose of oxygen ions 106 is 1 ×
A concentration range of 10 ¹⁵ / cm ² to 1 × 10 ¹⁷ / cm ² ,
Preferably, implantation is performed at 1 × 10 ¹⁶ / cm ² . The implantation energy is such that the oxygen ions 106
02 may be set to an energy value so as not to penetrate through. For example, when the thickness of the amorphous silicon film 102 is 0.2 μm, the implantation energy is 40 to 60 KeV.
May be set in the range.

Next, as shown in FIG. 4G, the amorphous silicon film 102 is heat-treated in a nitrogen atmosphere to form a polycrystalline silicon film.

The heat treatment conditions are, for example, 950 ° C.
For about 30 minutes. At this time, the high-concentration oxygen injection region 1
07 has a smaller crystal grain size and a higher density of crystal grain boundaries serving as gettering sites as compared with the non-oxygen implanted region masked by the silicon oxide film 105.
Gettering ability is improved.

Therefore, the heavy metal 109 (FIG. 4) existing in the gate oxide film 101 and the element active region 108 near the substrate surface.
5H is selectively gettered in the high-concentration oxygen implantation region 107 in the polycrystalline silicon film 102, as shown in FIG.

Subsequently, as shown in FIG. 5J, using the silicon oxide film pattern 105 as a mask, the polycrystalline silicon film 102 is removed by a known dry etching technique to form a gate electrode 110.

FIG. 6 is a diagram showing a heavy metal distribution in a semiconductor device formed by using the manufacturing method according to the first embodiment of the present invention.

As is clear from FIG. 6, in the region (FIG. 6 (a)) where the oxygen ions 106 are not implanted because of being masked by the silicon oxide film 105, there is almost no heavy metal. It can be seen that heavy metal exists in the polycrystalline silicon film in the region (FIG. 6 (b)) into which is implanted.

According to the first embodiment of the present invention, the heavy metal 10
Polycrystalline silicon film remaining after the high-concentration oxygen implantation region 108 containing a large amount of
Has almost no heavy metals.

Therefore, since the heavy metal gettered on the gate electrode 110 is not re-emitted by various heat treatments in the subsequent semiconductor device manufacturing process following FIG. 5J, the breakdown voltage characteristics of the gate oxide film 110 and Deterioration of junction leak characteristics can be prevented.

In the first embodiment of the present invention, the polycrystalline silicon is removed by dry etching using the silicon oxide film as a mask when the gate electrode 110 is formed. However, the presence of this silicon oxide film causes inconvenience in later steps. If this occurs, the silicon oxide film may be removed once by wet etching after performing oxygen ion implantation + crystallization heat treatment, and then a mask pattern may be formed again using photoresist.

(Embodiment 2) FIGS. 7 to 10 are sectional views showing the order of steps in a case where a method of manufacturing a semiconductor device according to Embodiment 2 of the present invention is applied to a step of forming a trench capacitor electrode.

In the method of manufacturing a semiconductor device according to the second embodiment of the present invention, first, as shown in FIG. 7A, a photoresist 301 is applied on a silicon substrate 300, and trenches are formed by using a known lithography technique. Patterning for formation is performed.

Next, as shown in FIG. 7B, a trench 302 is formed in the silicon substrate 300 using a photoresist 301 as a mask by a known dry etching technique.

Subsequently, after the photoresist 301 is removed, as shown in FIG.
Is thermally oxidized to form a trench capacitance insulating film 303 on the surface of the torch 302.

Next, as shown in FIG. 8D, an amorphous silicon film 304 serving as a capacitance electrode is formed on the torch capacitance insulating film 303.

Further, as shown in FIG. 9E, oxygen ions 305 are implanted into the surface of the amorphous silicon film 304 to form a high-concentration oxygen implanted region 306.

Subsequently, as shown in FIG. 9F, a heat treatment is performed on the silicon substrate 300 to form an amorphous silicon film 304.
Is converted to a polycrystalline silicon film 307.

This heat treatment is performed, for example, in a nitrogen atmosphere at 9
Perform at a temperature of 50 ° C. for 30 minutes. At this time, since the high oxygen concentration implantation region 306 is converted into the polycrystalline silicon film 308 having fine crystal grains, the heavy metal 309 (FIG. 10) existing near the silicon substrate surface in the trench capacitance portion is formed.
(G)) shows a polycrystalline silicon film 3 having fine crystal grains.
08 is preferentially obtained (FIG. 10 (h)).

Next, as shown in FIG. 10I, the polycrystalline silicon film 308 having fine crystal grains is removed by etching.

According to the second embodiment of the present invention, the remaining polycrystalline silicon film 307 does not emit heavy metals in a heat treatment step in the subsequent step following FIG. Is used as a trench capacitor electrode, it is possible to prevent the charge retention characteristics from deteriorating.

(Embodiment 3) FIGS. 11 to 13 are sectional views showing a case in which a method of manufacturing a semiconductor device according to Embodiment 3 of the present invention is applied to a step of forming a trench capacitor electrode in the order of steps.

The method of manufacturing a semiconductor device according to the third embodiment of the present invention includes the steps up to the stage shown in FIGS.
This is performed in the same steps as in the second embodiment.

In the second embodiment, oxygen ions are implanted after forming an amorphous silicon film on a silicon substrate in the process steps shown in FIGS. 8D and 8E.

On the other hand, in the third embodiment of the present invention,
As shown in FIG. 11A, a first amorphous silicon film 404 is formed on a silicon substrate 400 by a CVD method.

Subsequently, as shown in FIG.
A second amorphous silicon film 406 doped with oxygen is formed on the amorphous silicon film 404 by using the CVD method.

The second amorphous silicon film 406 is made of SiH
Growth is performed at a temperature of about 550 ° C. using a mixed gas of ₄ + N ₂ O. The gas mixture ratio was such that the partial pressure of SiH ₄ was 60 pa.
At a partial pressure of N ₂ O of 3.0 pa.

Subsequently, as shown in FIG.
A heat treatment is performed on the silicon substrate 400 at 950 ° C. for 30 minutes in a nitrogen atmosphere to crystallize the first amorphous silicon film 404 and the second amorphous silicon film 406 to form a polycrystalline silicon film.

At this time, the second amorphous silicon film 406 doped with oxygen has an average crystal grain size of 15 nm.
The first amorphous silicon film 404 in which the second polycrystalline silicon film 408 is not doped with oxygen becomes a first polycrystalline silicon film 407 having an average crystal grain size of 200 nm.

At this time, as shown in FIG. 13E, the heavy metal 409 (FIG. 12D) existing in the vicinity of the trench has an increased gettering ability due to an increase in the density of crystal grain boundaries serving as gettering sites. Gettering is preferentially performed on the improved second polycrystalline silicon film 408.

Subsequently, as shown in FIG.
The second polycrystalline silicon film 408 is removed.

As a result, similarly to the second embodiment, a trench capacitance element and a device active region with less heavy metal contamination can be formed.

(Embodiment 4) FIGS. 14 to 19 are sectional views showing a case where a method of manufacturing a semiconductor device according to Embodiment 4 of the present invention is applied to a step of forming a gate electrode and a step of forming source / drain regions. It is.

In the method for manufacturing a semiconductor device according to the fourth embodiment of the present invention, as shown in FIG.
A gate oxide film 501 is formed on the substrate.

Next, as shown in FIG. 14B, an amorphous silicon film 502 is formed on the gate oxide film 501 by a known CV method.
It is formed to a thickness of about 0.25 μm using D technology.

Subsequently, as shown in FIG. 15C, oxygen ions 503 are implanted into the surface of the amorphous silicon film 502 to form a high-concentration oxygen region 504.

Here, the implantation energy of the oxygen ion implantation is set in the energy range of 10 to 20 KeV, preferably at 15 KeV. Further, the implantation dose is set in a concentration range of 1 × 10 ¹⁵ / cm ² to 1 × 10 ¹⁷ / cm ² , preferably, at 1 × 10 ¹⁶ / cm ² .

Subsequently, as shown in FIG.
The silicon substrate 500 is subjected to a heat treatment at 950 ° C. for 30 minutes in a nitrogen atmosphere to turn the amorphous silicon 502 into a polycrystalline silicon film 505.

At this time, the high-concentration oxygen implantation region 504 is
Since the growth of crystal grains is suppressed as compared with a region into which oxygen is not implanted, a polycrystalline silicon film 506 having fine crystal grains is obtained.

As a result, in this region, the density of the crystal grain boundary serving as a gettering site increases, so that the gettering ability is improved.

Therefore, heavy metal 508 existing in gate oxide film 501 and element active region 507 (FIG. 15D)
As shown in FIG. 16E, gettering is preferentially performed on the polycrystalline silicon film 506 having fine crystal grains existing at the uppermost portion of the polycrystalline silicon film 505 serving as a gate electrode. FIG. 20 shows the distribution of heavy metals in the semiconductor element at this time.

Next, as shown in FIG. 16F, a photoresist 509 is applied on the polycrystalline silicon film 505,
The gate electrode is patterned using a known photolithography technique.

Next, as shown in FIG. 17 (g), the polysilicon film 50 is
5 is removed using a known dry etching technique, and a gate electrode 510 is formed.

Further, as shown in FIG. 17H, a silicon oxide film 511 is formed on the gate electrode 510 by using a known CVD technique.

Next, as shown in FIG. 18I, the silicon oxide film 511 is etched back using a known dry etching, and the side wall 512 is formed on the gate electrode 510.
To form

Further, as shown in FIG. 18J, a titanium film 513 is formed on the silicon substrate 50 by a known sputtering method.
0 surface.

Next, as shown in FIG. 19K, the silicon substrate 500 is heated in a nitrogen atmosphere to silicide the titanium film 513 on the diffusion layer and the gate electrode.

Finally, unreacted titanium 514 remaining in portions other than the diffusion layer and the gate electrode is selectively removed by wet etching to form a salicide structure as shown in FIG.

According to the fourth embodiment of the present invention, the second polycrystalline silicon film to which the heavy metal has been preferentially gettered reacts with titanium to be silicided. It is fixed in the silicide film on the electrode surface.

Therefore, the heavy metal is not re-emitted to the gate oxide film or the active region of the element by the heat treatment in the post-process subsequent to FIG. Can be.

(Embodiment 5) FIGS. 21 to 22 are sectional views showing, in order of process, a case where a method of manufacturing a semiconductor device according to Embodiment 5 of the present invention is applied to a gate electrode forming step and a source / drain region forming step. It is.

In the method of manufacturing a semiconductor device according to the fifth embodiment of the present invention, steps similar to those of the second embodiment are performed up to the steps shown in FIGS.

In the fourth embodiment, in the process step shown in FIG. 15C, an oxygen ion implantation is performed after an amorphous silicon film is formed on a silicon substrate.

In the method of manufacturing a semiconductor device according to the fifth embodiment of the present invention, as shown in FIG. 21A, oxygen is doped on a first amorphous silicon film 702 formed on a silicon substrate 700. Second amorphous silicon film 7
04 is formed.

The second amorphous silicon film 704 is made of SiH
It is grown at a temperature of about 550 ° C. using a mixed gas of ₄ + N ₂ O. The gas mixture ratio was such that the partial pressure of SiH ₄ was 60 pa.
At a partial pressure of N ₂ O of 3.0 pa.

Subsequently, as shown in FIG.
A heat treatment is performed on the silicon substrate 700 at 950 ° C. for 30 minutes in a nitrogen atmosphere to crystallize the first amorphous silicon film 702 and the second amorphous silicon film 704 into a polycrystalline silicon film.

At this time, the second amorphous silicon film 704 doped with oxygen is formed by adding a second amorphous silicon film 706 having an average crystal grain size of 15 nm to the first amorphous silicon film undoped with oxygen. The silicon film 702 becomes a first polycrystalline silicon film 705 having an average crystal grain size of 200 nm.

As a result, in the second polycrystalline silicon film 706 having a small crystal grain size, the density of the crystal grain boundary serving as a gettering site is increased, so that the gettering ability is improved. Therefore, the device active region 70 near the gate oxide film
The heavy metal 708 (FIG. 22 (c)) existing in FIG.
As shown in (d), gettering is selectively performed in the second polysilicon film 706.

Thereafter, the gate electrode pattern forming step shown in the fourth embodiment, that is, from FIG.
Through the step shown in (l), the second polycrystalline silicon film 70 in which the heavy metal was preferentially gettered is obtained.
Since 6 reacts with titanium to form silicide, the gettered heavy metal is fixed in the silicide film on the surface of the gate electrode.

Therefore, the heavy metal does not re-emit to the gate oxide film or the active region of the element due to the subsequent heat treatment, so that the breakdown voltage characteristics and the junction leak characteristics of the gate oxide film can be prevented from deteriorating.

In the above-described five embodiments, oxygen is used as an impurity element introduced for forming the gettering region, that is, for forming a polycrystalline silicon film having fine crystal grains. However, nitrogen can also be used. The impurity element whose conductivity type is not determined may be appropriately selected from oxygen, nitrogen, or a halogen element.

Although the case where the element region is the gate electrode and the trench capacitor electrode has been described, other regions may be used.

[0110]

As described above, according to the present invention, in a method for forming an element region such as a gate electrode or a trench capacitance electrode of a semiconductor device, growth of crystal grains in the element region during crystallization heat treatment is suppressed. Due to the increase in the density of the crystal grain boundaries outside the element region, the heavy metal was preferentially gettered to the region other than the element region, and the region was removed or silicided to fix the heavy metal and gettered. The heavy metal can be prevented from being re-emitted to the element region in a subsequent heat treatment step.

Therefore, by using the present invention,
It is possible to prevent the electrical characteristics of the semiconductor device from deteriorating, such as the initial withstand voltage characteristic, the TDDB characteristic, the charge retention characteristic, and the junction leakage characteristic of the gate oxide film, and to improve the characteristics of the semiconductor device and the production yield.

[Brief description of the drawings]

FIG. 1 is a cross-sectional view showing a case where a method of manufacturing a semiconductor device according to a first embodiment of the present invention is applied to a step of forming a gate electrode in the order of steps.

FIG. 2 is a cross-sectional view showing a case where the method for manufacturing a semiconductor device according to the first embodiment of the present invention is applied to a step of forming a gate electrode in the order of steps.

FIG. 3 is a cross-sectional view showing the order of steps in a case where the method for manufacturing a semiconductor device according to the first embodiment of the present invention is applied to a gate electrode forming step;

FIG. 4 is a cross-sectional view showing, in order of process, a case where the method for manufacturing a semiconductor device according to Embodiment 1 of the present invention is applied to a step of forming a gate electrode.

FIG. 5 is a cross-sectional view showing a case where the method for manufacturing a semiconductor device according to the first embodiment of the present invention is applied to a step of forming a gate electrode in the order of steps.

FIG. 6 is a diagram showing heavy metal distribution in a semiconductor device formed by using the manufacturing method according to the first embodiment of the present invention.

FIG. 7 is a cross-sectional view showing, in order of process, a case where the method of manufacturing a semiconductor device according to Embodiment 2 of the present invention is applied to a process of forming a trench capacitor electrode.

FIG. 8 is a cross-sectional view showing, in order of process, a case where the method of manufacturing a semiconductor device according to Embodiment 2 of the present invention is applied to a process of forming a trench capacitor electrode.

FIG. 9 is a cross-sectional view showing, in order of process, a case where the method of manufacturing a semiconductor device according to Embodiment 2 of the present invention is applied to a process of forming a trench capacitor electrode.

FIG. 10 is a cross-sectional view showing, in order of process, a case where the method for manufacturing a semiconductor device according to Embodiment 2 of the present invention is applied to a process of forming a trench capacitor electrode.

FIG. 11 is a sectional view illustrating a case where the method of manufacturing a semiconductor device according to the third embodiment of the present invention is applied to a process of forming a trench capacitor electrode in the order of processes.

FIG. 12 is a cross-sectional view showing a case where the method for manufacturing a semiconductor device according to the third embodiment of the present invention is applied to a step of forming a trench capacitor electrode in the order of steps.

FIG. 13 is a cross-sectional view showing, in order of process, a case where the method for manufacturing a semiconductor device according to Embodiment 3 of the present invention is applied to a process of forming a trench capacitor electrode.

FIG. 14 is a cross-sectional view showing, in order of process, a case where the method for manufacturing a semiconductor device according to Embodiment 4 of the present invention is applied to a gate electrode forming step and a source / drain region forming step.

FIG. 15 is a cross-sectional view showing a case where the method for manufacturing a semiconductor device according to the fourth embodiment of the present invention is applied to a gate electrode forming step and a source / drain region forming step in the order of steps.

FIG. 16 is a cross-sectional view showing, in order of process, a case where the method for manufacturing a semiconductor device according to Embodiment 4 of the present invention is applied to a gate electrode forming step and a source / drain region forming step.

FIG. 17 is a cross-sectional view showing, in order of process, a case where the method for manufacturing a semiconductor device according to Embodiment 4 of the present invention is applied to a gate electrode forming step and a source / drain region forming step.

FIG. 18 is a cross-sectional view showing, in order of process, a case where the method for manufacturing a semiconductor device according to Embodiment 4 of the present invention is applied to a gate electrode forming step and a source / drain region forming step.

FIG. 19 is a cross-sectional view showing, in order of process, a case where the method for manufacturing a semiconductor device according to Embodiment 4 of the present invention is applied to a gate electrode forming step and a source / drain region forming step.

FIG. 20 is a diagram showing heavy metal distribution in a semiconductor device formed by using the manufacturing method according to the fourth embodiment of the present invention.

FIG. 21 is a cross-sectional view showing, in order of process, a case where the method for manufacturing a semiconductor device according to Embodiment 5 of the present invention is applied to a gate electrode forming step and a source / drain region forming step.

FIG. 22 is a cross-sectional view showing, in order of process, a case where the method for manufacturing a semiconductor device according to Embodiment 5 of the present invention is applied to a gate electrode forming step and a source / drain region forming step.

FIG. 23 is a sectional view illustrating a method of manufacturing a semiconductor device according to a conventional example in the order of steps.

FIG. 24 is a sectional view illustrating a method of manufacturing a semiconductor device according to a conventional example in the order of steps.

FIG. 25 is a sectional view illustrating a method of manufacturing a semiconductor device according to a conventional example in the order of steps.

[Description of sign]

 REFERENCE SIGNS LIST 100 silicon substrate 101 gate oxide film 102 amorphous silicon film 103 silicon oxide film 104 photoresist 105 silicon oxide film mask 106 oxygen ions 107 high-concentration oxygen implantation region 108 element active region 109 heavy metal 110 gate electrode 300 silicon substrate 301 photoresist 302 Trench 303 Capacitance insulating film 304 Amorphous silicon film 305 Oxygen ion 306 High-concentration oxygen implanted region 307 Polycrystalline silicon film 308 Polycrystalline silicon film having fine crystal grains 309 Heavy metal 400 Silicon substrate 403 Capacitive insulating film 404 First non-structure Crystalline silicon film 406 second amorphous silicon film 407 first polycrystalline silicon film 408 second polycrystalline silicon film 409 heavy metal 500 silicon substrate 501 gate oxide film 502 amorphous silicon film Film 503 oxygen ions 504 high-concentration oxygen implantation region 505 polycrystalline silicon 506 polycrystalline silicon having fine crystal grains 507 device active region 508 heavy metal 509 photoresist 510 gate electrode 511 silicon oxide film 512 sidewall 513 titanium film 514 unreacted Titanium film 700 silicon substrate 701 gate oxide film 702 first amorphous silicon film 704 second amorphous silicon film 705 first polycrystalline silicon 706 second polycrystalline silicon 707 element active region 708 heavy metal

────────────────────────────────────────────────── ─── Continuation of the front page (56) References JP-A-5-109737 (JP, A) JP-A-7-201873 (JP, A) JP-A-1-243549 (JP, A) JP-A-5-2018 75045 (JP, A) JP-A-9-17998 (JP, A) JP-A-62-285470 (JP, A) JP-A-5-129219 (JP, A) (58) Fields investigated (Int. Cl. ⁷ , DB name) H01L 21/322 H01L 21/28 301 H01L 29/78

Claims (4)

(57) [Claims] 1. A forming a silicon substrate on a gate oxide film, a step of forming an amorphous silicon film on the gate oxide film, a mask pattern of a silicon oxide film on the amorphous silicon film Forming an amorphous silicon film into a polycrystalline silicon film by heat-treating the silicon substrate by implanting an impurity element ion whose conductivity type is not determined into the amorphous silicon film. A method of manufacturing a semiconductor device, comprising: converting a polycrystalline silicon film into which an impurity element whose conductivity type is not determined is ion-implanted by dry etching to form a gate electrode. 2. A step of forming a trench in a silicon substrate, a step of forming an amorphous silicon film in the silicon substrate and filling the trench, and a step of forming a conductivity type on a surface portion of the amorphous silicon film. Implanting an impurity element that is not determined, converting the amorphous silicon film into a polycrystalline silicon film by heat-treating the silicon substrate, and removing the polycrystalline silicon film present on the silicon substrate surface. Removing the semiconductor device. 3. A step of forming a trench in a silicon substrate, a step of forming a first amorphous silicon film in the silicon substrate and filling the trench, and a step of forming a trench on the first amorphous silicon film. Forming a second amorphous silicon film into which an impurity element whose conductivity type is not determined is introduced, and heat-treating the silicon substrate to convert the first and second amorphous silicon films into a polycrystalline silicon film. And a step of removing the polycrystalline second amorphous silicon film existing on the surface of the silicon substrate. Forming a wherein a silicon substrate a gate oxide film on, forming a first amorphous silicon film on the gate oxide film, the conductivity type on said amorphous silicon film Forming a second amorphous silicon film into which an impurity element that is not determined is introduced, and converting the first and second amorphous silicon films into a polycrystalline silicon film by heat-treating the silicon substrate And forming a gate electrode by patterning the polycrystalline silicon film ; and forming a metal silicide on a diffusion layer and a gate electrode of the silicon substrate.