JP3182977B2 - Manufacturing method of multilayer laminate - Google Patents
Manufacturing method of multilayer laminateInfo
- Publication number
- JP3182977B2 JP3182977B2 JP10157593A JP10157593A JP3182977B2 JP 3182977 B2 JP3182977 B2 JP 3182977B2 JP 10157593 A JP10157593 A JP 10157593A JP 10157593 A JP10157593 A JP 10157593A JP 3182977 B2 JP3182977 B2 JP 3182977B2
- Authority
- JP
- Japan
- Prior art keywords
- straight line
- hole
- wiring board
- reference position
- marks
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Description
【０００１】[0001]
【産業上の利用分野】本発明は複数の内層材を有し、こ
の内層材の少なくとも１以上が多層配線板で且つ外層に
回路形成する銅箔を備えた多層積層板の製造方法に関
し、具体的には上記多層配線板の外層の回路形成の際
に、上記回路形成の基準となり、且つ多層積層板の成形
の際に、ピンが貫通する穴を設けた多層積層板の製造方
法に関するものである。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method of manufacturing a multilayer laminate having a plurality of inner layers, at least one of which is a multilayer wiring board and a copper foil for forming a circuit on an outer layer. More specifically, the present invention relates to a method for producing a multilayer laminate having a hole through which a pin penetrates when forming a circuit of an outer layer of the multilayer wiring board, which serves as a reference for the circuit formation, and when forming the multilayer laminate. is there.
【０００２】[0002]
【従来の技術】多層のプリント配線板に用いられる多層
積層板は、回路が形成された１枚乃至複数の内層材にプ
リプレグを介して重ねて積層体とし、この積層体の内層
材とプリプレグ間の位置ずれを防止するために、上記積
層体の穴にピンを貫通して、この積層体に銅箔等を重ね
合わせ、加熱加圧して成形する方法が知られている。2. Description of the Related Art A multilayer laminated board used for a multilayer printed wiring board is formed by laminating one or more inner layer materials on which a circuit is formed via a prepreg, and forming a laminate between the inner layer material and the prepreg. In order to prevent misalignment, a method is known in which a pin is penetrated through a hole in the laminate, a copper foil or the like is superimposed on the laminate, and the laminate is molded by heating and pressing.
【０００３】近年の高密度化に伴い、上記内層材とし
て、複数の多層配線板を用いる方法が採用されている。
この内層材として用いる多層配線板は、片面又は両面に
回路を形成した内層配線板にプリプレグを重ね、その外
側に銅箔等を配して加熱加圧した後に、内層配線板に設
けられた基準位置マークを目印とし、この基準位置マー
クの中心に穴を明け、この穴を基準に外側に配した銅箔
等に回路を形成する。さらに、この多層配線板を内層材
とした多層積層板の成形の際、上記穴にピンを貫通す
る。しかし、この基準位置マークの中心に穴を明けてい
ると、多層積層板の成形の際、穴の位置ずれがありピン
が通らない問題が生じている。With the recent increase in density, a method using a plurality of multilayer wiring boards as the inner layer material has been adopted.
The multilayer wiring board used as the inner layer material is formed by laminating a prepreg on an inner layer wiring board having a circuit formed on one side or both sides, arranging a copper foil or the like on the outside thereof, heating and pressing, and then applying a reference Using the position mark as a mark, a hole is formed in the center of the reference position mark, and a circuit is formed on a copper foil or the like disposed outside with reference to the hole. Further, when forming a multilayer laminated board using the multilayer wiring board as an inner layer material, a pin is penetrated through the hole. However, if a hole is formed at the center of the reference position mark, there is a problem that the hole is misaligned and the pin cannot pass through when the multilayer laminate is formed.
【０００４】[0004]
【発明が解決しようとする課題】本発明は上記の問題点
を解消するためになされたもので、その目的とするとこ
ろは、複数の穴の明いた多層配線板を内層材として用い
て成形する際に、穴の位置ずれが生じない多層積層板の
製造方法を提供することにある。SUMMARY OF THE INVENTION The present invention has been made to solve the above problems, and an object of the present invention is to mold a multilayer wiring board having a plurality of holes as an inner layer material. In this case, it is an object of the present invention to provide a method for manufacturing a multilayer laminate in which no positional displacement of holes occurs.
【０００５】[0005]
【課題を解決するための手段】本発明に係る多層積層板
の製造方法は、複数の内層材（４０）を有し、この内
層材（４０）の少なくとも１以上が多層配線板（３５）
である多層積層板の製造方法において、上記多層配線
板（３５）の外層回路（３８）の形成の基準となり、且
つ多層積層板の成形の際に、ピン（３６）が貫通する穴
（３７）をこの多層配線板（３５）に設けるにあたっ
て、上記多層配線板（３５）の内層配線板（３４）の
基板の同一直線（１）上に位置する２ケの基準位置マー
クをＸ線で検出し、上記直線（１）の延長線上、若し
くはこの直線（１）と平行な直線（３）上に、所望の間
隔で２ケの穴（６）（７）を明け、必要に応じて、上
記穴（６）又は穴（７）を基点とした所望の寸法の箇所
に、必要数の穴を設けた多層配線板（３５）を内層材
（４０）として用いることを特徴とする。A method for manufacturing a multilayer laminate according to the present invention comprises a plurality of inner layers (40), wherein at least one of the inner layers (40) is a multilayer wiring board (35).
In the method for manufacturing a multilayer laminate, a hole (37) through which a pin (36) penetrates is used as a reference for forming an outer layer circuit (38) of the multilayer wiring board (35) and is formed when the multilayer laminate is formed. Is provided on this multilayer wiring board (35), two reference position marks located on the same straight line (1) of the substrate of the inner wiring board (34) of the multilayer wiring board (35) are detected by X-rays. On the extension of the straight line (1) or on a straight line (3) parallel to the straight line (1), two holes (6) and (7) are formed at a desired interval, and if necessary, the holes are formed. (6) A multi-layer wiring board (35) having a required number of holes at a desired dimension starting from the hole (7) is used as the inner layer material (40).
【０００６】[0006]
【作用】多層配線板の作製過程において、内層配線板の
回路の密度や加熱条件等で、内層配線板は収縮量に差を
生じる。本発明では、内層配線板の基準位置マークの上
に穴を設ける代わりに、内層配線板の基準位置マーク間
を結ぶ直線の延長線上、若しくはこの直線と平行な直線
上に、新たに所望の寸法で基準となる穴を設けるので、
内層配線板の収縮量の影響を受けることがない。この新
たに設けた穴を基点として、必要な個数の穴を設けれ
ば、多層配線板に設けられた穴は内層配線板の収縮の影
響を受けていないので、この多層配線板を内層材として
用いる多層積層板の成形の際に、ピンの位置ずれが生じ
ない。In the process of manufacturing a multilayer wiring board, the amount of shrinkage of the inner wiring board varies depending on the circuit density of the inner wiring board, heating conditions, and the like. In the present invention, instead of providing a hole on the reference position mark of the inner wiring board, a new desired dimension is added on an extension of a straight line connecting the reference position marks of the inner wiring board or on a straight line parallel to this straight line. Since a reference hole is provided in
It is not affected by the shrinkage of the inner wiring board. If the required number of holes are provided with the newly provided holes as a base point, the holes provided in the multilayer wiring board are not affected by the shrinkage of the inner wiring board, so this multilayer wiring board is used as the inner layer material. There is no displacement of the pins during molding of the multilayer laminate used.
【０００７】[0007]
【実施例】以下本発明を一実施例に基づいて詳細に説明
する。DESCRIPTION OF THE PREFERRED EMBODIMENTS The present invention will be described below in detail based on an embodiment.
【０００８】図１は本発明が適用される２枚の多層配線
板を内層材とした１０層の多層配線板を示す断面図であ
る。本発明は、図１の如く、複数の内層材（４０）を有
し、この内層材（４０）の少なくとも１以上に多層配線
板（３５）を用い、内層材（４０）、（４０）間、及び
内層材（４０）とプリプレグ（３２）間の位置ずれ防止
のために、内層材（４０）とプリプレグ（３２）に設け
た穴（３７）にピン（３６）を貫通する多層積層板の成
形に有用である。FIG. 1 is a cross-sectional view showing a ten-layer multilayer wiring board using two multilayer wiring boards to which the present invention is applied as an inner layer material. As shown in FIG. 1, the present invention has a plurality of inner layer materials (40), a multilayer wiring board (35) is used for at least one of the inner layer materials (40), and the inner layer materials (40), (40) In order to prevent misalignment between the inner layer material (40) and the prepreg (32), a multi-layer laminated board that passes through the pin (36) through a hole (37) provided in the inner layer material (40) and the prepreg (32) is used. Useful for molding.
【０００９】上記内層材（４０）として用いられる多層
配線板（３５）は、図５に示す如く、外層回路（３
８）、外層絶縁層（３３）、及び回路（３９）が形成さ
れた内層配線板（３４）で構成される。この多層配線板
（３５）は、金属箔を張ったガラスエポキシ樹脂積層
板、ガラスポリイミド樹脂積層板等の基板に回路（３
９）と基準位置マークが形成された内層配線板（３４）
にプリプレグを重ね、その外側に銅箔等の金属箔を配し
て加熱加圧することにより、プリプレグの樹脂が硬化し
外層絶縁層（３３）が形成されると共に、金属箔、外層
絶縁層（３３）、及び内層配線板（３４）が一体化した
積層板が得られ、その後、この積層板に穴（３７）を明
け、この穴（３７）を基準に外側に配した金属箔に外層
回路（３８）が形成さたものである。As shown in FIG. 5, a multilayer wiring board (35) used as the inner layer material (40) has an outer layer circuit (3).
8), an inner wiring board (34) on which an outer insulating layer (33) and a circuit (39) are formed. The multilayer wiring board (35) is provided with a circuit (3) on a substrate such as a glass epoxy resin laminated board or a glass polyimide resin laminated board covered with metal foil.
9) and the inner layer wiring board (34) on which the reference position mark is formed
A prepreg is placed on the outer surface of the prepreg, and a metal foil such as a copper foil is placed on the outside of the prepreg and heated and pressurized, whereby the resin of the prepreg is cured to form an outer insulating layer (33). ), And a laminated board in which the inner wiring board (34) is integrated is obtained. Thereafter, a hole (37) is formed in the laminated board, and an outer layer circuit ( 38) is formed.
【００１０】本発明で用いられる上記多層配線板（３
５）に設ける穴（３７）の決め方について、図２〜図４
に示す実施例に基づいて説明する。The multilayer wiring board (3) used in the present invention
FIGS. 2 to 4 show how to determine the hole (37) provided in 5).
A description will be given based on the embodiment shown in FIG.
【００１１】内層配線板（３４）のヨコ方向の収縮が殆
どなく、基準とする穴を３ケ所明ける場合について、図
２により説明する。図２（ａ）に示す如く、内層配線板
（３４）の基準位置マークのうち基板の略同一タテ方向
に設けられた２ケのマークＡ，Ｂ点をＸ線で検出し、Ａ
−Ｂを通る直線（１）の上に中心点（５）を求める。直
線（１）の延長線上に、上記中心点（５）から、設計図
面で指定される所望の寸法の箇所に２ケの穴（６）
（７）を明ける。次に、上記穴（６）又は（７）を基準
とした所望の寸法の箇所に穴（１０）を明ける際の穴
（１０）の位置の決め方を示す。図２（ｂ）に示す如
く、上記Ａ−Ｂ点を通る直線（１）と異なる位置に位置
する基準位置マークＣ点をＸ線で検出し、このＣ点上を
通り、且つ上記基準位置マークＡ−Ｂ間を通る直線
（１）と平行な直線（２）を求める。この直線（２）
と、穴（６）を通り、直線（１）に垂直な垂線（９）と
の交点（８）を求め、この交点（８）から直線（２）上
に、設計図面で指定される所望の寸法の箇所に、図２
（ｃ）に示す如く、穴（１０）を明ける。FIG. 2 shows a case where the inner wiring board (34) hardly contracts in the horizontal direction and three reference holes are formed. As shown in FIG. 2A, two marks A and B, which are provided in substantially the same vertical direction of the substrate among the reference position marks on the inner wiring board (34), are detected by X-rays.
The center point (5) is obtained on the straight line (1) passing through -B. On the extension of the straight line (1), two holes (6) are formed from the center point (5) to a place having a desired dimension specified in the design drawing.
Start (7). Next, how to determine the position of the hole (10) when drilling the hole (10) at a location of a desired size based on the hole (6) or (7) will be described. As shown in FIG. 2B, a reference position mark C located at a position different from the straight line (1) passing through the point AB is detected by an X-ray, and the reference point mark passing through the point C and the reference position mark is detected. A straight line (2) parallel to the straight line (1) passing between AB is obtained. This straight line (2)
And an intersection (8) with a perpendicular (9) passing through the hole (6) and perpendicular to the straight line (1), and from this intersection (8) on a straight line (2), Figure 2 shows the dimensions
A hole (10) is made as shown in FIG.
【００１２】内層配線板（３４）のヨコ方向の収縮があ
り、基準とする穴を３ケ所明ける場合について、図３に
より説明する。図３（ａ）に示す如く、内層配線板の基
準位置マークのうち基板の略同一タテ方向に設けられた
２ケのマークＡ，Ｂ点をＸ線で検出し、Ａ−Ｂを通る直
線（１）の上に中心点（５）を求める。直線（１）の延
長線上に、上記中心点（５）から、設計図面で指定され
る所望の寸法の箇所に２ケの仮の点（１１）（１２）を
設定する。次に、図３（ｂ）に示す如く、上記Ａ−Ｂ点
を通る直線（１）と異なる位置に位置する基準位置マー
クＣ点をＸ線で検出し、このＣ点上を通り、且つ上記基
準位置マークＡ−Ｂ間を通る直線（１）と平行な直線
（２）を求める。これら直線（１）（２）の間隔を所望
の距離となるよう平行に移動する。これら直線（１）と
直線（２）と垂直な垂線（１３）上に中心点（１４）を
求め、この中心点（１４）から設計図面で指定される所
望の寸法、上記直線（１）を平行移動して直線（３）
を、上記直線（２）を平行移動して直線（４）を設定す
る。上記直線（３）上の仮の点（１１）に相当する箇所
に穴（６）を、仮の点（１２）に相当する箇所に穴
（７）を明ける。さらに、直線（４）上に、穴（６）か
ら設計図面で指定される所望の寸法の箇所に穴（１０）
を明けると図３（ｃ）の通りとなる。The case where the inner wiring board (34) contracts in the horizontal direction and three reference holes are formed will be described with reference to FIG. As shown in FIG. 3A, two marks A and B provided in the same vertical direction of the substrate among the reference position marks of the inner wiring board are detected by X-rays, and a straight line passing through AB ( A center point (5) is obtained on 1). On the extension of the straight line (1), two temporary points (11) and (12) are set from the center point (5) to locations of desired dimensions specified in the design drawing. Next, as shown in FIG. 3 (b), a reference position mark C located at a position different from the straight line (1) passing through the point AB is detected by an X-ray. A straight line (2) parallel to the straight line (1) passing between the reference position marks AB is obtained. The straight lines (1) and (2) are moved in parallel so as to have a desired distance. A center point (14) is determined on a perpendicular line (13) perpendicular to the straight line (1) and the straight line (2), and the straight line (1) having a desired size specified in a design drawing is determined from the center point (14). Translate and move straight (3)
Is moved in parallel with the straight line (2) to set a straight line (4). A hole (6) is formed at a position corresponding to the provisional point (11) on the straight line (3), and a hole (7) is formed at a position corresponding to the provisional point (12). Further, on the straight line (4), a hole (10) is formed from the hole (6) to a place of a desired size specified in the design drawing.
3C becomes as shown in FIG.
【００１３】基準とする穴を４ケ所明ける場合につい
て、図４により説明する。図４（ａ）に示す如く、内層
配線板（３４）の基準位置マークのうち基板の略同一タ
テ方向に設けられた２ケのマークＡ，Ｂ点をＸ線で検出
し、Ａ−Ｂを通る直線（１）の上に中心点（５）を求め
る。直線（１）の延長線上に、上記中心点（５）から、
設計図面で指定される所望の寸法の箇所に２ケの仮の点
（２１）（２２）を設定する。次に、図４（ｂ）に示す
如く、上記Ａ−Ｂ点を通る直線（１）と異なる位置に位
置し、略同一の基板のタテ方向に設けられた２ケの基準
位置マークＣ，Ｄ点をＸ線で検出し、上記Ｃ−Ｄ線上の
中央点（２３）を求め、この中央点（２３）を通り、且
つ上記基準位置マークＡ−Ｂ点を通る直線（１）と平行
な線（２）を求める。次に図４（ｃ）に示す如く、これ
ら直線（１）（２）の間隔を所望の距離となるよう平行
に移動する。これら直線（１）と直線（２）と垂直な垂
線（２４）上に中心点（２５）を求め、この中心点（２
５）から設計図面で指定される所望の寸法、上記直線
（１）を平行移動して直線（３）を、上記直線（２）を
平行移動して直線（４）を設定する。上記直線（３）上
の仮の点（２１）に相当する箇所に穴（６）を、仮の点
（２２）に相当する箇所に穴（７）を明ける。さらに、
直線（４）上に、穴（６）から設計図面で指定される所
望の寸法の箇所に穴（２８）を、穴（７）から設計図面
で指定される所望の寸法の箇所に穴（２９）を明ける。A case where four reference holes are drilled will be described with reference to FIG. As shown in FIG. 4 (a), two marks A and B provided in substantially the same vertical direction of the substrate among the reference position marks of the inner wiring board (34) are detected by X-rays, and AB is detected. A center point (5) is obtained on the straight line (1) that passes. From the center point (5) on the extension of the straight line (1),
Two temporary points (21) and (22) are set at a position of a desired size specified in the design drawing. Next, as shown in FIG. 4B, two reference position marks C and D are provided at positions different from the straight line (1) passing through the point AB and provided in the vertical direction of substantially the same substrate. A point is detected by X-rays, a center point (23) on the CD line is determined, and a line passing through the center point (23) and parallel to the straight line (1) passing through the reference position mark AB point. Find (2). Next, as shown in FIG. 4C, the distance between the straight lines (1) and (2) is moved in parallel so as to be a desired distance. A center point (25) is obtained on a perpendicular line (24) perpendicular to the straight line (1) and the straight line (2).
From 5), a straight line (3) is set by translating the straight line (1), and a straight line (4) is moved by translating the straight line (2). A hole (6) is formed at a position corresponding to the temporary point (21) on the straight line (3), and a hole (7) is formed at a position corresponding to the temporary point (22). further,
On the straight line (4), a hole (28) is formed from the hole (6) at a position of a desired size specified in the design drawing, and a hole (29) is formed from the hole (7) at a position of a desired size specified in the design drawing. ).
【００１４】上述のようにして、多層配線板（３５）の
基準となる穴（３７）の箇所を決めるが、上記実施例に
のみに限定されない。穴（３７）の数、及び個数は多層
積層板のサイズや層の数により適宜決定される。いずれ
にしろ、内層配線板の基準位置マークの上に穴を設ける
代わりに、内層配線板（３４）の基準位置マーク間を結
ぶ直線（１）の延長線上、若しくはこの直線と平行な直
線（３）上に、新たに所望の寸法で基準となる穴（６）
（７）を設けるので、この穴（６）（７）は内層配線板
（３４）の加工の過程で生じる収縮量の影響を受けな
い。さらに、必要に応じて、上記穴（６）又は穴（７）
を基点として所望の寸法の箇所に、必要数の穴を設け
る。As described above, the position of the hole (37) serving as a reference of the multilayer wiring board (35) is determined, but is not limited to the above embodiment. The number and number of the holes (37) are appropriately determined according to the size and the number of layers of the multilayer laminate. In any case, instead of providing a hole on the reference position mark of the inner wiring board, an extension of the straight line (1) connecting the reference position marks of the inner wiring board (34) or a straight line (3) parallel to this straight line ) On which a new reference hole with desired dimensions (6)
Since (7) is provided, the holes (6) and (7) are not affected by the amount of shrinkage generated in the process of processing the inner wiring board (34). Further, if necessary, the hole (6) or the hole (7)
The required number of holes are provided at locations of desired dimensions with reference to.
【００１５】図１に示すように、上記穴（３７）を明
け、外層回路（３８）を形成した多層配線板（３５）を
１枚以上含む内層材（４０）を用い、内層材（４０）に
プリプレグ（３２）を介して重ね、上記穴（３７）にピ
ン（３６）を通し、この外側に銅等の金属箔（３１）を
配して加熱加圧し、多層積層板が製造される。As shown in FIG. 1, an inner layer material (40) including at least one multilayer wiring board (35) having an opening (37) formed therein and an outer layer circuit (38) is used. And a prepreg (32), a pin (36) is passed through the hole (37), a metal foil (31) of copper or the like is placed on the outside of the hole, and heating and pressing are performed to manufacture a multilayer laminate.
【００１６】[0016]
【発明の効果】本発明によると、複数の穴の明いた多層
配線板を内層材として成形する際に、穴の位置ずれを起
こすことなく多層積層板を製造できる。According to the present invention, when forming a multilayer wiring board having a plurality of holes as an inner layer material, a multilayer laminated board can be manufactured without causing displacement of the holes.
【図１】本発明の一実施例に係る多層積層板を示す断面
図である。FIG. 1 is a sectional view showing a multilayer laminate according to one embodiment of the present invention.
【図２】本発明の一実施例に係る、穴明け位置を決める
順序を示す平面図である。FIG. 2 is a plan view showing an order for determining a drilling position according to an embodiment of the present invention.
【図３】本発明の一実施例に係る、穴明け位置を決める
順序を示す平面図である。FIG. 3 is a plan view showing an order for determining a drilling position according to an embodiment of the present invention.
【図４】本発明の一実施例に係る、穴明け位置を決める
順序を示す平面図である。FIG. 4 is a plan view showing an order for determining a drilling position according to an embodiment of the present invention.
【図５】本発明の一実施例に係る多層積層板に用いられ
る多層配線板の断面図である。FIG. 5 is a sectional view of a multilayer wiring board used for a multilayer laminate according to one embodiment of the present invention.
１ 直線 ２ 直線 ３ 直線 ４ 直線 ６ 穴 ７ 穴 ３１ 金属箔 ３２ プリプレグ ３３ 外層絶縁層 ３４ 内層配線板 ３５ 多層配線板 ３６ ピン ３７ 穴 ３８ 外層回路 ４０ 内層材 REFERENCE SIGNS LIST 1 straight line 2 straight line 3 straight line 4 straight line 6 hole 7 hole 31 metal foil 32 prepreg 33 outer layer insulating layer 34 inner layer wiring board 35 multilayer wiring board 36 pin 37 hole 38 outer layer circuit 40 inner layer material
───────────────────────────────────────────────────── フロントページの続き (56)参考文献 特開 平３−276795（ＪＰ，Ａ) 特開 平２−69993（ＪＰ，Ａ) 特開 昭61−225894（ＪＰ，Ａ) 特開 平１−209794（ＪＰ，Ａ) 特開 昭62−208807（ＪＰ，Ａ) (58)調査した分野(Int.Cl.7，ＤＢ名) H05K 3/46 ──────────────────────────────────────────────────続 き Continuation of the front page (56) References JP-A-3-276795 (JP, A) JP-A-2-69993 (JP, A) JP-A-61-225894 (JP, A) JP-A-1- 209794 (JP, A) JP-A-62-208807 (JP, A) (58) Fields investigated (Int. Cl. 7 , DB name) H05K 3/46
Claims (4)
材（４０）の少なくとも１以上が多層配線板（３５）で
ある多層積層板の製造方法において、 上記多層配線板（３５）の外層回路（３８）の形成の
基準となり、且つ多層積層板の成形の際に、ピン（３
６）が貫通する穴（３７）をこの多層配線板（３５）に
設けるにあたって、 上記多層配線板（３５）の内層配線板（３４）の基板
の同一直線（１）上に位置する２ケの基準位置マークを
Ｘ線で検出し、 上記直線（１）の延長線上、若しくはこの直線（１）
と平行な直線（３）上に、所望の間隔で２ケの穴（６）
（７）を明け、 必要に応じて、上記穴（６）又は穴（７）を基点とし
た所望の寸法の箇所に、必要数の穴を設けた多層配線板
（３５）を内層材（４０）として用いることを特徴とす
る多層積層板の製造方法。1. A method for manufacturing a multilayer laminate having a plurality of inner layer materials (40), wherein at least one of the inner layer materials (40) is a multilayer wiring board (35). Of the outer layer circuit (38), and the pin (3)
In providing a hole (37) through which the multilayer wiring board (35) passes through the multilayer wiring board (35), two holes (37) positioned on the same straight line (1) of the substrate of the inner wiring board (34) of the multilayer wiring board (35). The reference position mark is detected by an X-ray, and is on an extension of the straight line (1) or the straight line (1).
Two holes (6) at desired intervals on a straight line (3) parallel to
(7) is opened, and if necessary, a multilayer wiring board (35) provided with a required number of holes at a desired size from the hole (6) or the hole (7) is used as an inner layer material (40). A) a method for producing a multilayer laminate.
（３４）の基準位置マークとして、３ケのマークＡ，
Ｂ，Ｃ点が形成されており、上記基準位置マークのうち
基板の略同一タテ方向に設けられた２ケのマークＡ，Ｂ
点をＸ線で検出し、 上記マークＡ−Ｂを通る直線（１）の延長線上に、Ａ
とＢ点の中心点（５）からの所望の間隔で２ケの穴
（６）（７）を明け、 上記Ａ−Ｂ点を通る直線（１）と異なる位置に位置す
る基準位置マークＣ点をＸ線で検出し、 このＣ点上を通り、且つ上記基準位置マークＡ−Ｂ間
を通る直線（１）と平行な直線（２）上で、上記穴
（６）又は穴（７）からの所望の寸法の箇所に穴（１
０）を明けることを特徴とする請求項１の多層積層板の
製造方法。2. The three marks A, 3 as reference position marks on the inner wiring board (34) of the multilayer wiring board (35).
Points B and C are formed, and two marks A and B of the reference position marks provided in substantially the same vertical direction of the substrate.
A point is detected by an X-ray, and on the extension of the straight line (1) passing through the mark AB, A
And two reference holes (6) and (7) at desired intervals from the center point (5) of point B, and a reference position mark C located at a position different from the straight line (1) passing through point AB. Is detected from the hole (6) or the hole (7) on a straight line (2) passing through the point C and parallel to the straight line (1) passing between the reference position marks AB. Hole (1)
2. The method for producing a multilayer laminate according to claim 1, wherein 0) is completed.
（３４）の基準位置マークとして、３ケのマークＡ，
Ｂ，Ｃ点が形成されており、上記基準位置マークのうち
基板の略同一タテ方向に設けられた２ケのマークＡ，Ｂ
点をＸ線で検出し、 上記Ａ−Ｂ点を通る直線（１）上と異なる位置に位置
する基準位置マークＣ点をＸ線で検出し、 このＣ点上を通り、且つ上記基準位置マークＡ−Ｂ点
を通る直線（１）と平行な直線（２）を求め、これら直
線（１）（２）の間隔を所望の距離となるよう平行に移
動し、 上記直線（１）を平行に移動した線（３）上に所望の
間隔で２ケの穴（６）（７）を明け、上記線（２）を平
行に移動した線（４）上で、上記穴（６）又は穴（７）
を基点とした所望の寸法の箇所に穴（１０）を明けるこ
とを特徴とする請求項１の多層積層板の製造方法。3. Three marks A, 3 as reference position marks on the inner wiring board (34) of the multilayer wiring board (35).
Points B and C are formed, and two marks A and B of the reference position marks provided in substantially the same vertical direction of the substrate.
A point is detected by an X-ray, a reference position mark C located at a position different from the position on the straight line (1) passing through the point AB is detected by an X-ray, and the reference position mark passing through the point C is detected. A straight line (2) parallel to the straight line (1) passing through the point A-B is determined, and the distance between the straight lines (1) and (2) is moved in parallel so as to be a desired distance. Two holes (6) and (7) are formed at a desired interval on the moved line (3), and the hole (6) or the hole (6) is formed on the line (4) obtained by moving the line (2) in parallel. 7)
2. A method for manufacturing a multilayer laminate according to claim 1, wherein a hole (10) is formed at a position having a desired size based on the following.
（３４）の基準位置マークとして、４ケのマークＡ，
Ｂ，Ｃ，Ｄ点が形成されており、上記基準位置マークの
うち基板の略同一タテ方向に設けられた２ケのマーク
Ａ，Ｂ点をＸ線で検出し、 上記Ａ−Ｂ点を通る直線（１）上と異なる位置に位置
し、略同一の基板のタテ方向に設けられた２ケの基準位
置マークＣ，Ｄ点をＸ線で検出し、上記Ｃ−Ｄ線上の中
央点（２３）を求め、 この中央点（２３）を通り、且つ上記基準位置マーク
Ａ−Ｂ点を通る直線（１）と平行な線（２）を求め、こ
れら直線（１）（２）の間隔を所望の距離となるよう平
行に移動し、 上記直線（１）を平行に移動した線（３）上に所望の
間隔で２ケの穴（６）（７）を明け、上記線（２）を平
行に移動した線（４）上で、上記穴（６）又は穴（７）
を基点とした所望の寸法の箇所に穴（２８）及び穴（２
９）を明けることを特徴とする請求項１の多層積層板の
製造方法。4. Four marks A, 4 as reference position marks on the inner wiring board (34) of the multilayer wiring board (35).
Points B, C, and D are formed. Of the reference position marks, two marks A and B provided in substantially the same vertical direction of the substrate are detected by X-rays and pass through the point AB. Two reference position marks C and D, which are located at different positions on the straight line (1) and are provided in the vertical direction of substantially the same substrate, are detected by X-rays, and the center point (23) on the CD line is detected. ), And a line (2) passing through the center point (23) and parallel to the line (1) passing through the reference position mark AB is obtained, and the interval between these lines (1) and (2) is determined. Are moved in parallel so as to have a distance of 2 and two holes (6) and (7) are formed at a desired interval on a line (3) obtained by moving the straight line (1) in parallel, and the line (2) is parallelized. On the line (4) moved to the above, the hole (6) or the hole (7)
Hole (28) and hole (2)
9. The method according to claim 1, further comprising the step of:
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP10157593A JP3182977B2 (en) | 1993-04-27 | 1993-04-27 | Manufacturing method of multilayer laminate |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP10157593A JP3182977B2 (en) | 1993-04-27 | 1993-04-27 | Manufacturing method of multilayer laminate |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH06310860A JPH06310860A (en) | 1994-11-04 |
| JP3182977B2 true JP3182977B2 (en) | 2001-07-03 |
Family
ID=14304201
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP10157593A Expired - Fee Related JP3182977B2 (en) | 1993-04-27 | 1993-04-27 | Manufacturing method of multilayer laminate |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP3182977B2 (en) |
Families Citing this family (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN104254210B (en) * | 2014-09-19 | 2017-11-07 | 江西景旺精密电路有限公司 | Pcb board and the preparation method for preventing layer sequence error from flowing into process after milling side |
-
1993
- 1993-04-27 JP JP10157593A patent/JP3182977B2/en not_active Expired - Fee Related
Also Published As
| Publication number | Publication date |
|---|---|
| JPH06310860A (en) | 1994-11-04 |
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