JP3156449B2 - Digital recording and playback device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a digital recording / reproducing apparatus.

2. Description of the Related Art FIG. 5 is a diagram showing a configuration of a conventional digital recording / reproducing apparatus. In FIG. 5, 1 is an input signal conversion circuit, 2 is a high efficiency coding circuit, 3 is a correction coding circuit,
4 is a correction encoding memory, 5 is a modulation circuit, 6 is a recording medium, 7 is a demodulation circuit, 8 is a correction decoding circuit, 9 is a correction decoding memory, 10 is a high-efficiency decoding circuit, and 11 is an output signal. A conversion circuit, 12 is an input / output signal changeover switch, and 13 is a signal display circuit. The recording medium 6 here may be a magnetic or optical disk, a magnetic tape, or a memory. FIG. 6 is a timing chart showing the delay of each conventional signal processing circuit. 6, reference numeral 21 denotes a delay time Di1 of the input signal conversion circuit 1, and 22 denotes a delay time Di of the high-efficiency encoding circuit 2.
2, 23 are the delay times Di3 of the correction coding circuit 3, 24 are the delay times Di4 of the modulation circuit 5, and 25 are the delay times of the demodulation circuit 7.
Do4, 26 are delay times Do3 of the correction decoding circuit 8, 27 are delay times Do2 of the high-efficiency decoding circuit 10, 28 are delay times Do1, 29 of the output signal conversion circuit 11, and 29 are the total of recording delay times Dial, 30 Is the total playback delay time Doall.
At the time of recording, an input signal conversion circuit 1
And converts it in the processing time Di1, and the input signal conversion circuit 1
Processing time in the high-efficiency encoding circuit 2
The signal 4 encoded by Di2 and encoded by the high-efficiency encoding circuit 2 is stored in a memory 4 for correction encoding,
In (3), a correction code is added in the processing time Di3, and the signal to which the correction code is added in the correction encoding circuit 3 is modulated in the modulation circuit 5 in the processing time Di4, and is recorded on the recording medium 6. Therefore, in order to record, there is a time corresponding to Dial, which is the sum of the delay times of the respective signal processing circuits. The recording input signal can be displayed on the signal display circuit 13 by switching the input / output signal switch 12.
At the time of reproduction, the signal reproduced from the recording medium 6 is demodulated in the demodulation circuit 7 in the processing time Do4, the signal demodulated in the demodulation circuit 7 is stored in the correction decoding memory 9, and the processing time Do3 is processed in the correction decoding circuit 8. The correction process was performed by the correction code added at the time of recording, and the signal subjected to the correction process by the correction decoding circuit 8 was decoded by the high-efficiency decoding circuit 10 in the processing time Do2 and decoded by the high-efficiency decoding circuit 10 The signal is converted by the output signal conversion circuit 11 into the form of the signal input in the processing time Do1, and is output. Therefore, in order to reproduce, the sum of the delay time of each signal processing circuit, Dial
have only l time. The reproduced output signal can be displayed on the signal display circuit 13 by switching the input / output signal switch 12.

However, the conventional configuration described above has the following problems. In the conventional technology, since the delay time of each signal processing circuit is different, the time Diall for recording and the time Doall for reproduction do not become the same. In this case, the continuity of the recording output signal to the reproduction output signal cannot be maintained, and the display of the signal display circuit is disturbed. SUMMARY OF THE INVENTION In view of the problems of the prior art, the present invention relates to a digital recording / reproducing apparatus for recording / reproducing digital data obtained by digitizing a video signal and an audio signal on / from a recording medium. It is an object of the present invention to provide a digital recording / reproducing apparatus including a reproduction or recording delay time control circuit for a time corresponding to a difference between delay times of processing circuits.

SUMMARY OF THE INVENTION In order to solve the above problems, the present invention relates to a digital recording / reproducing apparatus for recording / reproducing digital data obtained by digitizing a video signal and an audio signal on / from a recording medium. A digital recording / reproducing apparatus comprising a reproduction or recording delay time control circuit for a time corresponding to a difference between a circuit delay time and a delay time of a signal processing circuit required for reproduction.

According to the present invention, the continuity of the recording input signal and the reproduction output signal is maintained at the time of transition from recording to reproduction, and the delay time is controlled so that the display of the signal display circuit is not disturbed. .

(Embodiment 1) An embodiment of the present invention will be described below with reference to the accompanying drawings. In the configuration diagram of the embodiment, the description of the blocks with the same reference numerals as those in the related art is omitted. FIG. 1 is a diagram showing a configuration of a digital recording / reproducing apparatus according to a first embodiment of the present invention. In FIG. 1, 3
1 is an output delay time control circuit, and 32 is a correction decoding circuit having an output delay time control circuit 31. FIG. 2 is a timing chart showing the delay of each signal processing circuit according to the first embodiment of the present invention. In FIG. 2, reference numeral 33 denotes a delay time Dodela of the output delay time control circuit 31 in the correction decoding circuit 32.
y and 34 are the total delay times of the reproduction signal processing circuit having the correction decoding circuit 32 having the output delay time control circuit 31.
Doalla. Compared with the recording delay time Diall and the reproduction delay time Doall in the related art, the following is performed when the reproduction side delay time Doall is shorter than the recording delay time Diall by Diall−Doall = Dodelay. When performing reproduction, the recording medium 6
The demodulated signal is demodulated in the demodulation circuit 7 in the processing time Do4, and the demodulated signal is stored in the correction decoding memory 9,
Correction decoding circuit 32 having output delay time control circuit 31
In, a correction process is performed using the correction code added during recording in the processing time Do3. Here, the signal subjected to the correction processing by the correction decoding circuit 31 is not immediately sent to the high-efficiency decoding circuit 10, but is stored in the correction decoding memory 9 by the delay time Dodelay in the output delay time control circuit 31, and is delayed. After the signal is processed in the high-efficiency decoding circuit 10 for the processing time Do
2 and outputs the decoded signal to an output signal conversion circuit 11
In step (1), the signal is converted into the form of the signal input in the processing time Do1 and output. By doing so, the playback delay time Doa 11a becomes
It becomes Doall + Dodelay, which is the same as Diall, and the synchronization of the recording input signal and the reproduction output signal becomes the same. Therefore, by switching the input / output signal changeover switch 12, the signal display circuit 13 is switched.
, The continuity of the recording input signal and the reproduction output signal can be maintained, and the display of the signal display circuit 13 is not disturbed. (Embodiment 2) FIG. 3 is a diagram showing the configuration of a digital recording / reproducing apparatus according to a second embodiment of the present invention. In FIG.
41 is an input delay time control circuit, and 42 is a correction encoding circuit having the input delay time control circuit 41. FIG. 4 is a timing chart showing the delay of each signal processing circuit according to the second embodiment of the present invention. In FIG. 4, reference numeral 43 denotes a delay time Dide of the input delay time control circuit 41 in the correction encoding circuit 42.
lay, 44 is the total delay time of the recording signal processing circuit having the correction encoding circuit 42 having the input delay time control circuit 41
Dialla. Compared with the recording delay time Diall and the reproduction delay time Doall in the related art, when the recording delay time Diall is shorter than the reproduction-side delay time Doall by Doall−Diall = Didelay, the following is performed. When recording is performed, the signal is input to the recording input signal input signal conversion circuit 1 and converted in the processing time Di1, and the signal converted in the input signal conversion circuit 1 is coded in the high efficiency coding circuit 2 in the processing time Di2 to achieve high efficiency. The signal 4 encoded by the encoding circuit 2 is stored in a memory 4 for correction encoding, and a correction encoding circuit 42 having an input delay time control circuit 41 adds a correction code with a processing time Di3. Here, the signal subjected to the correction processing by the correction encoding circuit 41 is not immediately sent to the modulation circuit 5, but the input delay time control circuit 41 delays the signal by storing it in the correction encoding memory 4 by the delay time Didelay and delaying the signal. Is modulated in the modulation circuit 5 for the processing time Di4, and is recorded on the recording medium 6. By doing so, the recording delay time is Dial + Didel
ay is the same as Doall, and the synchronization of the recording input signal and the reproduction output signal is the same. Therefore, when the input / output signal changeover switch 12 is switched and displayed on the signal display circuit 13, the continuity of the recording input signal and the reproduction output signal can be maintained, and the display of the signal display circuit does not disturb.

As described above, according to the present invention, the continuity of the recording input signal and the reproduction output signal can be maintained at the time of transition from recording to reproduction without increasing the memory, and the signal display circuit can be used. It is possible to prevent the display from being disturbed, and the practical effect is great.

[Brief description of the drawings]

FIG. 1 is a block diagram showing a configuration of a digital recording / reproducing apparatus according to a first embodiment of the present invention.

FIG. 2 is a timing chart showing delay of each signal processing circuit according to the first embodiment of the present invention;

FIG. 3 is a block diagram showing a configuration of a digital recording / reproducing apparatus according to a second embodiment of the present invention;

FIG. 4 is a timing chart showing a delay of each signal processing circuit according to the second embodiment of the present invention;

FIG. 5 is a block diagram showing a configuration of a conventional digital recording / reproducing apparatus.

FIG. 6 is a timing chart showing the delay of each conventional signal processing circuit.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 Input signal conversion circuit 2 High efficiency coding circuit 3 Correction coding circuit 4 Memory for correction coding 5 Modulation circuit 6 Recording medium 7 Modulation circuit 8 Correction decoding circuit 9 Memory for correction coding 10 High efficiency coding circuit 11 Output Signal conversion circuit 12 Input / output signal changeover switch 13 Signal display circuit 31 Output delay time control circuit 32 Correction decoding circuit 41 Input delay time control circuit 42 Correction encoding circuit

──────────────────────────────────────────────────続 き Continued on the front page (58) Field surveyed (Int.Cl. ⁷ , DB name) H04N 5/91-5/956 G11B 20/10-20/12

Claims (8)

(57) [Claims] 1. A digital recording / reproducing apparatus for recording / reproducing digital data obtained by digitizing a video signal and an audio signal on / from a recording medium, wherein a delay time of a signal processing circuit required for recording and a delay time of the signal processing circuit required for reproduction are provided. A digital recording / reproducing apparatus comprising a reproduction delay time control circuit for a time corresponding to a time difference. 2. The recording apparatus according to claim 1, further comprising a recording delay time control circuit for a time corresponding to a difference between a delay time of the signal processing circuit required for recording and a delay time of the signal processing circuit required for reproduction. Digital recording and playback device. 3. A signal processing circuit having a reproduction delay time adding means for a time corresponding to a difference between a delay time of a signal processing circuit required for recording and a signal processing circuit required for recording and a delay time of a signal processing circuit required for reproduction. The digital recording / reproducing apparatus according to claim 1, wherein 4. A signal processing circuit having a recording delay time adding means for a time corresponding to a difference between a delay time of a signal processing circuit required for recording and a signal processing circuit required for recording and a delay time of a signal processing circuit required for reproduction. The digital recording / reproducing apparatus according to claim 1, wherein 5. A memory and a delay time of a signal processing circuit from a reference signal of a video signal during recording to a reference signal of a recording medium, and a delay time of a signal processing circuit from a reference signal of a recording medium to a reference signal of a video signal during reproduction. 2. The digital recording / reproducing apparatus according to claim 1, further comprising a signal processing circuit having a reproduction delay time adding means for a time corresponding to a difference between the delay times. 6. A memory and a delay time of a signal processing circuit from a reference signal of a video signal during recording to a reference signal of a recording medium, and a delay time of a signal processing circuit from a reference signal of a recording medium to a reference signal of a video signal during reproduction. 2. The digital recording / reproducing apparatus according to claim 1, further comprising a signal processing circuit having a reproduction delay time adding means for a time corresponding to a difference between the delay times. 7. A helical scan type digital recording / reproducing apparatus for recording / reproducing digital data to / from a recording track inclined in a longitudinal direction on a magnetic tape by a rotary head, comprising: a memory and a video signal for recording. Reproduction of the time corresponding to the difference between the delay time of the signal processing circuit from the reference signal to the reference signal on the magnetic tape and the delay time of the signal processing circuit from the reference signal on the magnetic tape to the reference signal of the video signal during reproduction A digital recording / reproducing apparatus comprising a signal processing circuit having delay time adding means. 8. A helical scan type digital recording / reproducing apparatus for recording / reproducing digital data to / from a recording track inclined in a longitudinal direction on a magnetic tape by a rotary head, comprising a memory and a video signal for recording. Reproduction of the time corresponding to the difference between the delay time of the signal processing circuit from the reference signal to the reference signal on the magnetic tape and the delay time of the signal processing circuit from the reference signal on the magnetic tape to the reference signal of the video signal during reproduction A digital recording / reproducing apparatus comprising a signal processing circuit having delay time adding means.