JP3156246B2 - Field effect type semiconductor device and manufacturing method - Google Patents

Description

Description: TECHNICAL FIELD The present invention relates to a novel structure of a field-effect semiconductor device, and more particularly to a highly reliable field-effect semiconductor device having excellent hot carrier resistance. .

[Conventional technology]

2. Description of the Related Art In recent years, semiconductor integrated circuit elements (ICs) have made remarkable progress using field effect semiconductor devices as components.

As the world demands more sophisticated processing, faster operation, and more convenient functions, these ICs are pursuing higher integration and higher density, and the element size of one field-effect semiconductor device is becoming smaller and smaller. Is coming.

The voltage required for this field-effect semiconductor device to operate does not necessarily decrease in proportion to the reduction in device dimensions, so recent high-density, highly integrated ICs have an increased electric field applied inside the device. However, a problem has occurred in the reliability of the device. In particular, variation in device characteristics due to the hot carrier phenomenon is an important problem that determines the reliability limit of a submicron device.

The average energy of carriers moving in the semiconductor is considered to be 3/2 kT, where T is the temperature. When an electric field is applied to the carrier, the carrier receives energy. While this energy is small, it becomes thermal energy due to the interaction between the carrier and the lattice, and is released into the crystal. On the other hand, when the electric field intensity increases, the flow of energy to the lattice vibration cannot be made in time, and the average energy value of the carriers becomes larger than 3/2 kT. Such a carrier is in a state higher than the lattice temperature, and this state is called a hot carrier.

Such hot carriers are generated by being accelerated in a portion where a strong electric field is concentrated, such as near a drain and near a gate oxide film of a field effect semiconductor device. Hot electrons generated in the vicinity are injected into the gate oxide film and trapped at the Si / SiO ₂ interface or at the trapping center in SiO ₂ . This trapped hot carriers, to form a space charge, V _T of the field effect semiconductor device, by changing the characteristics such as gm, was allowed to impair the reliability of the IC.

Various methods have been tried as measures against this hot carrier, but devices such as DD (double drain) LDD (lightly doped drain) and the like have been devised as an improvement of the device structure.

[Object of the invention]

The present invention provides a novel and highly reliable field effect semiconductor device that is resistant to the hot carrier phenomenon.

[Configuration of the invention]

In order to achieve the above object, the present invention provides a field effect type semiconductor device, comprising a gate electrode, a gate insulating film, and a plurality of different layers below the gate insulating film, and a half of the gate insulating film side. It has an insulating film and a semiconductor layer below the semi-insulating film.

With such a structure, when a voltage is applied to the gate electrode, the channel is formed not in the region directly below the gate insulating film but in the semiconductor layer portion. Therefore, hot carriers generated in such an element must pass through the semi-insulating film in order to reach the gate insulating film, so that the hot carriers reach the gate insulating film with sufficiently high energy. And disappears. This improves hot carrier resistance.

 The present invention will be described below with reference to the drawings.

FIG. 1 is a schematic sectional view of a field-effect semiconductor device according to the present invention.

In the drawing, single crystal silicon or the like can be used as the substrate (1).

An element isolation region (LOCOS) is formed on the semiconductor layer (1).
(2) is provided to separate the periphery of the field effect type semiconductor device. A source / drain region (3) is formed in the semiconductor layer (1), and a semi-insulating film (5) is formed to cover the source / drain region (3) and the semiconductor layer (1).

As the semi-insulating film (5), silicon nitride (Si ₃ N _4-x 0 <X
<4) If silicon carbide (Si _y C _1−y 0 <y <1) or silicon oxide (SiO _2−z 0 <Z <2) or semi-insulating material, widely used materials can be selected and used. it can.

On the semi-insulating film (5), a gate insulating film (6) and a gate electrode (7) are provided between the source and the drain.

The source / drain region (3) has a structure in which a source / drain electrode (4) is connected.

FIG. 2A shows an energy band diagram corresponding to the XX ′ plane in FIG. FIG. 2 (A) is an energy band diagram in a flat band state. The semiconductor (1) in FIG. 1 is a P-type single crystal silicon semiconductor, and the semi-insulating film (5) is silicon nitride Si ₃ N _{4. This} shows the situation when _-x 0 <X <4 is used.

FIG. 2B shows an energy band when a positive voltage is applied to the gate electrode (7) of the field effect semiconductor device having such a configuration. In this case, a channel is formed below the gate insulating film (6) by applying a voltage to the gate electrode (7). The channel is formed not near the gate insulating film (6) but near the region (8) in the first semiconductor layer (1) thereunder, and the source and drain currents flow from the source electrode (4) to the source (3). It flows through the path: channel (8)-drain (3)-drain electrode (4).

As described above, the carrier flows not through the gate insulating film (6) but through the channel (8) formed at a position distant from the gate insulating film (6). A strong electric field region is formed, and even if hot carriers are generated, the hot carriers are
Since it passes through the semi-insulating film and disappears or reduces energy, it reaches the gate insulating film, without damaging the gate insulating film or forming a trap at the gate insulating film semiconductor layer interface, It improves the reliability of field-effect semiconductor devices.

In addition, since the semi-insulating film (5) can appropriately flow carriers, a recombination center of carriers is not newly formed in the semi-insulating film.

Furthermore, according to the structure of the present invention, since the channel is not formed immediately below the gate insulating film, the carrier is trapped by the interface state at the interface of the gate insulating film, or the carrier is scattered by fixed charges existing near the interface, and the carrier is Can also be solved at the same time.

Further, as long as the material to be used does not change the concept of the present invention, a wide range of materials can be selected irrespective of amorphous, polycrystalline or crystalline.

 Hereinafter, the present invention will be described with reference to examples.

Embodiment 1 FIG. 3 is a schematic vertical sectional view showing a manufacturing process of the field-effect semiconductor device of the present invention.

In FIG. 3A, in this embodiment, the substrate (1) is used.
Used a P-type conductive single crystal silicon semiconductor. A silicon nitride film corresponding to the element region is formed on the substrate to form an isolation region (2) around the element region of the field-effect semiconductor device.
Si ₃ N ₄ is formed to a thickness of about 2000 mm by low-pressure CVD, and as a mask, the entire substrate is oxidized at 1150 ° C. for about 2 hours to form an isolation region (2) around the element of the field-effect semiconductor device. about
The silicon nitride film was formed to a thickness of 1.5 μm, and the silicon nitride film was removed by etching to obtain the state shown in FIG. At this time, the first mask was used.

Then by a plasma CVD method on the substrate top surface, it was formed to a thickness of about 100Å silicon nitride for the semi-insulating film _{(Si 3 N 4-x 0} <X <4). The conditions at that time are shown below.

・ Substrate temperature 280 ℃ ・ Reaction gas SiH ₄ + N ₂・ Rf power 200W ・ Reaction pressure 0.1 Torr At this time, the amount of nitrogen is smaller than that in the production of normal silicon nitride film. The resulting SiN film was formed. This SiN film has semi-insulating properties,
Like the iN film, it also had a blocking effect on impurities.

Further, a silicon oxide film is formed on the upper surface of the semi-insulating film (5) by a photo CVD method to form a gate insulating film (6).

 The conditions at this time are shown below.

・ Substrate temperature 150 ℃ ・ Reaction gas Si ₂ H ₆ + O ₂・ UV light power 600W ・ Reaction pressure 4.1 Torr In particular, light CV is applied to the gate insulating film forming process as in this embodiment.
By using the method D, the order of the interface generated at the interface between the gate insulating film and the semiconductor layer can be extremely reduced, and the element characteristics of the field-effect semiconductor device can be improved.

The gate insulating film was etched using a second mask and using a known photolithography technique as shown in FIG. 3B.

Next, a polycrystalline silicon coating was formed on this upper surface to a thickness of about 2000 mm by using a low pressure CVD method.

 The conditions are shown below.

Substrate temperature 350 ° C. Reaction gas SiH ₄ Reaction pressure 3.0 Torr Thereafter, the polycrystalline silicon coating and the gate insulating film are removed by etching using a third mask, and FIG. 3 (C)
As described above, a gate insulating film (6), a gate electrode (7), and a source / drain electrode (4) were formed. The width of this gate electrode is 1.5 μm or less, and in this embodiment, it can be 0.8 μm, which is a submicron width.

In this embodiment, the gate electrode and the gate insulating film are etched with one third mask to have a self-aligned structure.

Next, the photoresist at the time of etching the polycrystalline silicon is removed, and phosphorus ions are implanted into the entire surface of the substrate by ion implantation to form source and drain regions and to reduce the resistance of the gate electrode (7) source and drain electrodes (4). Was. Thereafter, annealing was performed at 450 ° C. for 30 minutes to make the impurities active.

Thus, the field-effect semiconductor device in the state shown in FIG. 3D was completed.

In this example, when a semi-insulating film was formed, the film was manufactured under conditions that contained as little hydrogen as possible. That is, if a large amount of hydrogen is present in the semi-insulating film (5), the hydrogen moves and reacts with the Si—O bond near the gate insulating film, and a new interface state is formed near this. Therefore, it is important that the semi-insulating film (5) does not contain extra hydrogen or a large amount of hydrogen.

After the formation of the film, the amount of hydrogen in the film may be reduced by vacuum annealing, plasma treatment in an inert gas, or the like.

Although the impurity doping into the source and drain regions is performed by the ion implantation method, other methods such as impurity diffusion from phosphorus glass may be used.

As a result of operating this element continuously for one month in the operating state, V _{T and} gm hardly changed. Extrapolated based on this data, the changes of V _{T and} gm after 10 years were within 3%. Was. Thus, the device structure of the present invention has very high long-term reliability.

In this embodiment, the silicon nitride film is used as the semi-insulating film, but the same effect can be obtained by using other silicon carbide or silicon oxide films.

Thus, even if the width of the gate electrode is 1 μm or less,
The reliability of the field effect type semiconductor device was very high. As a result, the size limit of the field-effect type semiconductor device is no longer limited by reliability, but only by process technology.

Embodiment 2 FIG. 4 is a schematic vertical sectional view showing a manufacturing process of the field-effect semiconductor device of the present invention.

In FIG. 4A, in this embodiment, the substrate (1) is used.
Used a P-type conductive single crystal silicon semiconductor. A silicon nitride film corresponding to the element region is formed on the substrate to form an isolation region (2) around the element region of the field-effect semiconductor device.
Si ₃ N ₄ is formed to a thickness of about 2000 mm by low-pressure CVD, and as a mask, the entire substrate is oxidized at 1150 ° C. for about 2 hours to form an isolation region (2) around the element of the field-effect semiconductor device. The silicon nitride film was formed and removed by etching to obtain the state shown in FIG. At this time, the first mask was used.

Next, silicon nitride (S
i ₃ N _4-x 0 <X <4) was formed to a thickness of about 100 °. The conditions at that time are shown below.

・ Substrate temperature 300 ℃ ・ Reaction gas SiH ₄ + N ₂・ Rf power 200W ・ Reaction pressure 0.1 Torr At this time, the amount of nitrogen is smaller than that in the production of a normal silicon nitride film. A film was formed. This SiN film has semi-insulating properties,
Like the film, it also had a blocking effect on impurities.

Further, a silicon oxide film is formed on the upper surface of the semi-insulating film (5) by a photo CVD method to form a gate insulating film (6).

 The conditions at this time are shown below.

・ Substrate temperature 150 ℃ ・ Reaction gas Si ₂ H ₆ + N ₂ O ・ UV light power 600W ・ Reaction pressure 5.0 Torr In particular, as shown in this embodiment, light CV
By using D, the order of the interface generated at the interface between the gate insulating film and the semiconductor layer can be extremely reduced, and the element characteristics of the field-effect semiconductor device can be improved.

Next, an N-type polycrystalline silicon film was formed on this upper surface to a thickness of about 2000 mm by using a low pressure CVD method.

 The conditions are shown below.

Substrate temperature 350 ° C. Reaction gas SiH ₄ + PH ₃ Reaction pressure 3.0 Torr This gate insulating film and N-type polycrystalline silicon film are applied to a known photolithography technique using a second mask as shown in FIG. 3 (B). Use 0.9μ gate electrode width
The etching was performed on the self-alignment so as to obtain m.

Next, source and drain regions were formed by implanting phosphorus ions over the entire surface of the substrate by ion implantation, leaving the photoresist when the polycrystalline silicon was etched. After this
Annealing was performed at 450 ° C. for 30 minutes to activate the impurities to obtain the state shown in FIG. 4 (C).

At this time, since the impurity was implanted through the semi-insulating layer (5), the semi-insulating film also has sufficient conductivity.
After this, aluminum is deposited on this upper surface by sputtering.
After the formation of 3000 mm, the third mask is used to remove the aluminum and the semi-insulating film, and the source and drain electrodes (4)
The structure shown in FIG. 4 (D) was obtained.

At this time, a part of the semi-insulating layer remains between the aluminum wiring and the source and drain regions (3), and the reaction between the aluminum and the semiconductor layer is prevented by the part of the semi-insulating layer. Was able to increase the reliability.

In the above embodiments, all the semi-insulating films are formed by the CVD method. However, the present invention is not particularly limited to this method. In order to reduce the operating voltage of the field-effect semiconductor device, the semi-insulating film is further formed. When the semiconductor substrate is thinned, a thin film can be formed more precisely by directly nitriding, carbonizing, or oxidizing the semiconductor substrate. At this time, if these processes are performed using energy such as plasma or laser, the semi-insulating film can be formed more quickly.

〔effect〕

By adopting the structure of the present invention, the channel of the field effect type semiconductor device can be formed at a remote position, not directly below the gate insulating film, and the deterioration of the element characteristics due to the hot carrier phenomenon can be prevented. The device could be realized.

As a result, the element size of the field-effect semiconductor device can be further reduced, and the integration degree of the IC chip can be further improved.

Further, since the semi-insulating film allows carriers to pass through appropriately, no new carrier trap is formed in the semi-insulating film.

In addition, since a semi-insulating film having a blocking function is formed between the source and drain regions and the source and drain electrodes, it is possible to prevent a reaction between the electrode material and the semiconductor layer and to improve long-term reliability. .

[Brief description of the drawings]

FIG. 1 is a schematic view of a field-effect semiconductor device according to the present invention. FIG. 2 shows an energy band diagram of the field effect type semiconductor device of the present invention. 3 and 4 show the steps of manufacturing the field-effect semiconductor device of the present invention. DESCRIPTION OF SYMBOLS 1 ... Substrate 2 ... Element isolation region 3 ... Source and drain region 4 ... Source and drain region electrode 5 ... Semi-insulating film 7 ... Gate electrode 6 ... Gate insulating film

Claims (5)

(57) [Claims] A gate electrode, a gate insulating film, a source region,
In a field-effect semiconductor device including a drain region, a channel formation region, a source electrode, and a drain electrode, the source region, the drain region, and the channel formation region are provided in a semiconductor containing silicon as a main component. A single-layer film having a semi-insulating property is provided on the entire surface of the drain region and the channel formation region, and the source electrode contacts the single-layer film, and the source electrode contacts the single-layer film on the source region. A field-effect semiconductor device, wherein a drain electrode is provided on the drain region. 2. A gate electrode, a gate insulating film, a source region,
In a field-effect semiconductor device including a drain region, a channel formation region, a source electrode, and a drain electrode, the source region, the drain region, and the channel formation region are provided in a semiconductor containing silicon as a main component. Silicon nitride (Si ₃ N _4-x , 0 <x <4), silicon carbide (S
i _y C _1-y , 0 <y <1) or silicon oxide (SiO _{2 -z} , 0 <z)
A single-layer film made of <2), wherein the source electrode is provided on the source region, in contact with the single-layer film, the drain electrode is provided on the drain region, in contact with the single-layer film. A field-effect-type semiconductor device characterized in that: 3. A gate electrode, a gate insulating film, a source region,
In a field-effect semiconductor device having a drain region, a channel formation region, a source electrode, and a drain electrode, the source region, the drain region, and the channel formation region are provided on a semiconductor substrate; A single-layer film having a semi-insulating property is provided on the entire surface of the region, and the single-layer film is formed by oxidizing, nitriding, or carbonizing a semiconductor substrate. A field-effect-type semiconductor device, wherein a source electrode is provided on the source region, in contact with the single-layer film, and the drain electrode is provided on the drain region. 4. A semiconductor substrate is nitrided, carbonized or oxidized to form a semi-insulating single-layer film in contact with the entire surface of the source region, the drain region and the channel formation region, and a gate insulating film is formed on the single-layer film. Forming a source electrode on the source region in contact with the single-layer film, and forming a drain electrode on the drain region in contact with the single-layer film. Method. 5. The method for manufacturing a field-effect semiconductor device according to claim 4, wherein the single-layer film is formed by using plasma or laser.