JP3153949B2 - Device for automatically detecting defective pixels in solid-state image sensor, method for automatically detecting defective pixels in solid-state image sensor, automatic defect correction device, and camera - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a device for automatically detecting a defective pixel of a solid-state image sensor, for example, which automatically detects a defective pixel of a CCD image sensor and automatically corrects an image signal from the defective pixel. The present invention relates to a method for automatically detecting a defective pixel of a solid-state imaging device, an automatic defect correction device, and a camera.

[0002]

2. Description of the Related Art In a solid-state image pickup device formed of a semiconductor such as a CCD image pickup device or the like, a defective pixel whose sensitivity is reduced due to a local crystal defect of the semiconductor or the like may be generated. It is known that image quality degradation caused by an imaging output signal occurs.

Conventionally, when such a defective pixel is detected, it is detected using an expensive device such as an enormous memory or an averaging device in an inspection process in the manufacture of the solid-state imaging device, and the defect is detected for each solid-state imaging device. The system is shipped with defective data for pixels, and has not been automatically detected in a set. Therefore, pixel defects due to scratches or the like caused by some stress factor after shipment cannot be dealt with at all.

Therefore, in recent years, there has been proposed a defect detection / correction system capable of detecting and correcting defective pixels even when the defective pixels are incorporated in a device such as a video camera. In this type of defect detection and correction system, when detecting and scanning one screen, defective pixels are detected in order from the edge of the screen, and defect data for the pixels is sequentially stored in a memory. The defect data stored at the time of this defect detection is address data for specifying the absolute position of the defective pixel or data obtained by adding level data indicating the magnitude of the defect level.

Therefore, when this defect detection and correction system is actually mounted on a device such as a video camera, the amount of data that can store defect data is limited by the storage capacity of the memory. Is considered a reasonable amount of data.

[0006]

However, in the conventional defect detection and correction system, defect detection is sequentially inspected from the first line in the screen, and when a defective pixel is detected, the defect data is stored in a memory in real time. Since the scanning of one frame is ended, the number of existing defective pixels is assumed to be the number of storage capacities of the memory (for example, 10).
When the number exceeds the threshold value, there is a disadvantage that the defect data of the defective pixel detected thereafter cannot be stored.

In particular, when the defect detection level is fixed to an arbitrary value without making a selection based on the magnitude of the defect level (magnitude), the defect is detected after exceeding an allowable number corresponding to the storage capacity of the memory. Regarding the defective pixel, even if the defect level is very high, the defect data cannot be stored, so that the defect correction can be performed only in the first half of the screen regardless of the level of the defect level.

SUMMARY OF THE INVENTION The present invention has been made in view of the above circumstances, and has as its object to efficiently detect defective pixels over the entire screen by effectively using a memory having a limited storage capacity. And defect correction.

[0009]

According to the present invention, an apparatus for automatically detecting defective pixels of a solid-state image sensor can store n pieces of address data and defect level data of defective pixels of the solid-state image sensor 3 as shown in FIGS. A storage unit 20; a defect level of a defective pixel from the solid-state imaging device 3 when n defective pixels are stored in the storage unit 20;
A defect level comparing means 21 for comparing the defect levels of the n defective pixels stored in 0 with this defect level comparing means 2;
When 1 determines that the defect level of the defective pixel from the solid-state imaging device 3 is higher, the address data and the defect level data of the defective pixel are stored in place of the defective pixel determined to have the lower defect level. And a write control unit 22.

An automatic defect correction apparatus according to the present invention is an automatic defect correction apparatus using the above-described automatic defect pixel detection apparatus for a solid-state imaging device. A correction pulse generation circuit 12 that compares the current address of the solid-state imaging device 3 and generates a defect correction pulse when they match with each other, and responds to the defect correction pulse with respect to the imaging output signal of the solid-state imaging device 3 And a defect correction circuit 8 for correcting defects.

[0011]

According to the present invention, the defective pixels of the solid-state imaging device are automatically detected as defective pixels from the highest level to the allowable number of defective pixels. Thus, a memory having a reduced storage capacity can be effectively used, and defective pixel detection and defect correction can be efficiently performed over the entire screen.

[0012]

BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 is a block diagram showing an embodiment of an apparatus for automatically detecting defective pixels of a solid-state image sensor, a method of automatically detecting defective pixels of a solid-state image sensor, an automatic defect correcting apparatus, and a camera according to the present invention. FIG. 2 shows a configuration diagram in which a CCD image sensor, which is a solid-state image sensor, is applied to a video camera.
In the above, the subject is formed on the imaging screen of the CCD imaging device 3 by an optical system including the lens 1 and the aperture 2. The aperture 2 of the optical system is controlled to be opened and closed by the microcomputer 4 when a defective pixel is detected and a defect is corrected, which will be described later.

In FIG. 2, reference numeral 5 denotes a timing generator. The timing generator 5 generates various timing signals such as a vertical clock signal and a horizontal clock signal, and transfers the vertical signals from each pixel (photo sensor) in the CCD image sensor 3. Reading signal charge to register,
Driving such as vertical transfer by a vertical transfer register and horizontal transfer by a horizontal transfer register is performed.

The image pickup output signal of the CCD image pickup device 3 is sampled and held (S / H) and automatic gain control (AGC).
The data is supplied to an analog-to-digital (A / D) conversion circuit 7 through a circuit 6, and is converted from analog to digital by the A / D conversion circuit 7 and becomes, for example, 10-bit data. It is supplied to the automatic detection device 9.

The image pickup output signal corrected for defects by the defect correction circuit 8 is supplied to a signal processing circuit 10, which performs various kinds of signal processing, and outputs a luminance (Y) signal and a chroma (C) signal. The luminance signal and the chroma signal are supplied to an encoder 11, a required video signal is obtained by the encoder 11, and the video signal is derived from a video signal output terminal 13.

Here, an example of an automatic defective pixel detecting apparatus according to the present invention will be described with reference to FIG. In FIG.
Reference numeral 9a denotes an image signal input terminal to which an image output signal from the A / D conversion circuit 7 is supplied.
The image pickup output signal supplied to the
And to the latch circuit 24.

In the defect detection comparator 23, the level of the imaging output signal and the detection level input terminal 23a
The defect detection comparator 23 supplies a flag signal indicating that the pixel is defective to the address writing control circuit 22 when the defect detection comparator 23 determines that the pixel is defective. .

Reference numeral 9b denotes a vertical clock input terminal to which a vertical clock signal from the timing generator 5 is supplied. The vertical clock signal from the vertical clock input terminal 9b is supplied to the vertical address counter 25. The current vertical address data is obtained at the output side, and this vertical address data is supplied to the address write control circuit 22.

Reference numeral 9c denotes a horizontal clock input terminal to which a horizontal clock signal from the timing generator 5 is supplied. The horizontal clock signal from the horizontal clock input terminal 9c is supplied to a horizontal address counter 26. The current horizontal address data is obtained at the output side of 26, and this horizontal address data is supplied to the address write control circuit 22.

Reference numeral 20 can store, for example, defect level data of two defective pixels, vertical address data and horizontal address data of odd fields thereof, and vertical address data and horizontal address data of even fields thereof.
It is a RAM having two storage units 20a and 20b.

The switch 2 switches the defect level data in the two storage units 20a and 20b of the RAM 20.
7 and to one input terminal of the defect level comparison circuit 21 and the output signal of the latch circuit 24 to the defect level comparison circuit 21. In the defect level comparison circuit 21, the two storage units 20a of the RAM 20
And 20b are compared with the defect level of the imaging output signal latched by the latch circuit 24. When it is determined that the defect level of the imaging output signal is large, the defect level data is determined. It is supplied to the address write control circuit 22.

In the address write control circuit 22, a flag signal indicating that the pixel is a defective pixel is supplied from the defect detection comparator 23, and the defect level comparison circuit 21 stores the defect stored in, for example, one storage unit 20a of the RAM 20. When it is determined that the level is lower than the defect level of the imaging output signal supplied to the imaging signal input terminal 9a, the defect level data of the newly supplied imaging output signal, the vertical address data of the odd field of the defective pixel, and The horizontal address data, the vertical address data of the even-numbered fields, and the horizontal address data are written into one storage unit 20a of the RAM 20.

The operation of the above-described apparatus for automatically detecting a defective pixel of the CCD image pickup device will be further described with reference to FIG. 3. To start the detection, the video camera is turned on.
At this time, the microcomputer 4 closes the lens aperture 2 to bring the CCD image pickup device 3 into an all black state in which no light enters, and the RAM 4
The contents stored in one and the other storage units 20a and 20b of the memory 20 are reset (step S1). Next, a defect pixel is detected by the defect detection comparator 23 from the image pickup output signal, and defect level data of the first and second defective pixels (A) and (B) determined to be defective pixels, and their odd numbers The vertical address data and the horizontal address data of the field and the vertical address data and the horizontal address data of the even field are stored in one and the other storage units 20a and 20b of the RAM 20, respectively (step S).
2).

Further, when the third defective pixel (C) is detected by the defect detection comparator 23 (step S3), the defect level of the defective pixel (C) latched by the latch circuit 24 and one of the defective levels are determined. The defect level of the defective pixel (A) stored in the storage unit 20a is compared with the defect level comparison circuit 21 to determine the level (Step S).
4, S5).

In this case, when the defect level of the new defective pixel (C) is higher than the defect level of the defective pixel (A) stored in one storage unit 20a, the new defective pixel (C) The defect level data, the vertical address data and the horizontal address data of the odd field, and the vertical address data and the horizontal address data of the even field are rewritten and stored in the one storage section 20a (step S6). After this rewrite storage, step S
3 and a new defective pixel is detected.

In this case, if the defect level of the defective pixel (A) is higher than the defect level of the defective pixel (C), then the defect level of the new defective pixel (C) and the other storage unit The defect level of the defective pixel (B) stored in 20b is compared with the defect level of the defective pixel (B) by the defect level comparison circuit 21, and the level is determined (steps S7 and S8).

In this case, when the defect level of the new defective pixel (C) is higher than the defect level of the defective pixel (B) stored in the other storage unit 20b, this new defective pixel (C) The defect level data, the vertical address data and the horizontal address data of the odd field, and the vertical address data and the horizontal address data of the even field are rewritten and stored in the other storage section 20b (step S6). After this rewrite storage, step S
The process returns to step S3 and waits for the detection of a new defective pixel.

In this case, if the defect level of the defective pixel (B) is higher than the defect level of the defective pixel (C), the process returns to step S3 to wait for the detection of a new defective pixel.

When a new defective pixel is detected, the above operation is repeated over the entire image pickup screen of the CCD image sensor 3, and the detection is terminated.

Therefore, according to the apparatus for automatically detecting defective pixels of the CCD image pickup device of this embodiment, the defect levels of the first and second defective pixels among the defective pixels in the entire area of the image pickup screen of the CCD image pickup device 3 are respectively determined. Defect level data, vertical and horizontal address data in odd fields, and vertical and horizontal address data in even fields can be automatically detected and stored.

The defect correction using the automatic detecting device for defective pixels of the CCD image pickup device is performed as follows. One and the other storage units 20a and 20 of the RAM 20
b are supplied to vertical address comparators 28a and 28b, respectively, and the horizontal address data of one and the other storage units 20a and 20b are respectively supplied to horizontal address comparators 29a and 29b.
, And the current vertical address from the vertical address counter 25 is supplied to the vertical address comparators 28a and 28b, respectively.
Is supplied to the horizontal address comparators 29a and 29b, respectively.

In the vertical address comparators 28a and 28b, one and the other storage units 20a and 20b
When the vertical address data (odd field and even field) stored in b coincides with the current vertical address (odd field and even field) from the vertical address counter 25, the coincidence output signal is output to the horizontal address comparator 29a and the horizontal address comparator 29a, respectively. 29b.

In the horizontal address comparators 29a and 29b, when the coincidence output signal is supplied from the vertical address comparators 28a and 28b, the horizontal address comparator 29a and the horizontal address comparator 29b and the horizontal address data stored in the other storage units 20a and 20b are used. When the current horizontal address from the address counter 26 matches, the match signal is supplied to the correction pulse generation circuit 12 via the OR circuit 30, and the correction pulse generation circuit 12 generates a defect correction pulse at this timing. The generated defect correction pulse is supplied to the defect correction circuit 8.

In the defect correction circuit 8, the imaging output signal of the defective pixel in the imaging output signal from the CCD imaging device 3 is specified by the defect correction pulse. Defect correction is performed by replacement with the imaging output signal before the pixel (previous value replacement) or replacement with the average value signal of the imaging output signals before and after this (average value replacement).

The above is repeated until the imaging mode ends.

According to the present embodiment, the permissible number of defective pixels is detected and stored as a defective pixel from a large defect level, and this is corrected, so that the RAM 20 having a limited storage capacity in any environment is used. Can be used effectively to efficiently detect and store defective pixels over the entire screen and perform defect correction associated therewith. Also, in order to detect the permissible number from the pixels with the highest defect level and correct this,
Image quality deterioration due to correction can be suppressed to the utmost.

In the above embodiment, the memory (RA) for storing the defect level data and the address data of the defective pixel is used.
Although the allowable number n of the storage capacities of M) is set to two 20a, 20b, it can be easily understood that the same configuration as described above can be adopted even if the allowable number n is a required number such as ten.

In the above embodiment, the defect levels of all defective pixels stored in the RAM 20 are compared with the defect levels of new defective pixels.
If the defect level having the smallest defect level among the defective pixels stored in M20 is determined, and the defect level of the newest defective pixel is compared with the defect level of the newest defective pixel, There is an advantage that the comparison process and the like are simplified.

Further, in the above-described embodiment, the previous value replacement or the average value replacement is performed for the defect correction. However, in the above-described example, since the defect level is stored, the defect correction is performed using this defect level. (For example, JP-A-60-51)
No. 378).

The present invention is not limited to the above-described embodiment, but may adopt various other configurations without departing from the gist of the present invention.

[0041]

According to the present invention, the defective pixels of the solid-state image sensor are automatically detected as defective pixels from the highest level to the allowable number of defective pixels. Memory with limited storage capacity (R
AM) can be effectively used, and there is an advantage that defective pixel detection and defect correction can be efficiently performed over the entire screen.

[Brief description of the drawings]

FIG. 1 is a configuration diagram showing an embodiment of an automatic detection device for defective pixels of a solid-state imaging device according to the present invention.

FIG. 2 is a configuration diagram illustrating an example of a video camera to which the present invention has been applied.

FIG. 3 is a diagram for explanation of the present invention.

[Explanation of symbols]

 Reference Signs List 3 CCD imaging device 8 Defect correction circuit 9 Automatic detection device for defective pixel 12 Correction pulse generation circuit 20 RAM 21 Defect level comparison circuit 22 Address writing control circuit 23 Defect detection comparator 24 Latch circuit 25 Vertical address counter 26 Horizontal address counter

Claims (19)

(57) [Claims] 1. A storage means capable of storing n (n is a natural number) address data and defect level data of a defective pixel of a solid-state imaging device, and said solid-state imaging means when said n defective pixels are stored in said storage means. Defect level comparing means for comparing the defect level of the defective pixel from the element with the defect level of the n defective pixels stored in the storage means; and the defect level comparing means detects the defect level of the defective pixel from the solid-state imaging device. And a write control means for storing the address data and the defect level data of the defective pixel in place of the defective pixel determined to have a low defect level when it is determined that the defect level is larger. Automatic detection device for defective pixels. 2. The apparatus according to claim 1, wherein the smallest defective pixel having the smallest defect level among the n defective pixels stored in the storage means is determined in advance. Wherein the defect level of the minimum defective pixel and the defect level of the defective pixel from the solid-state image sensor are compared by the defect level comparing means. apparatus. 3. An automatic defect correction device using the automatic defect pixel detection device of the solid-state imaging device according to claim 1, wherein the address data of the n defective pixels stored in the storage means and the solid-state image data. A correction pulse generation circuit that compares the current address of the image sensor with a current address and generates a defect correction pulse when they match, and performs defect correction on an imaging output signal of the solid-state image sensor in response to the defect correction pulse An automatic defect correction device, comprising: a defect correction circuit. 4. The automatic defect correction device according to claim 3, wherein the defect correction of the defect correction circuit is performed using defect level data of a defective pixel stored in the storage means. Defect correction device. 5. A solid-state image sensor, storage means capable of storing n (n is a natural number) address data and defect level data of defective pixels of the solid-state image sensor, and n defective pixels are stored in the storage means. A defect level comparing means for comparing the defect level of the defective pixel from the solid-state image sensor with the defect levels of the n defective pixels stored in the storage means; Writing control means for storing, when it is determined that the defect level of the pixel is higher, the address data and the defect level data of the defective pixel in place of the defective pixel determined to have the lower defect level. An automatic detection device, comprising: a camera; 6. The camera according to claim 5, wherein a minimum defective pixel having the smallest defect level of the n defective pixels stored in the storage means is determined in advance, and the defect level of the minimum defective pixel is determined. And a defect level comparison unit for comparing only the defect level of the defective pixel from the solid-state imaging device with the defect level. 7. The camera according to claim 5, wherein the address data of the n defective pixels stored in the storage means is compared with a current address of the solid-state imaging device, and a defect correction pulse is output when the addresses match. And a defect correction circuit for performing defect correction on an imaging output signal of the solid-state imaging device in response to the defect correction pulse. 8. The camera according to claim 7, wherein the defect correction of the defect correction circuit is performed using the defect level data of the defective pixel stored in the storage means. 9. The camera according to claim 5, further comprising an optical system that forms an image of light on the solid-state imaging device. 10. The apparatus for automatically detecting a defective pixel of a solid-state imaging device according to claim 1, wherein the level of an output signal from said solid-state imaging device is compared with a predetermined detection level to determine a defective pixel. An automatic detection device for a defective pixel of a solid-state imaging device, comprising a detection unit. 11. The automatic detection device for a defective pixel of a solid-state imaging device according to claim 1, wherein the writing control means stores address data of an even field and address data of an odd field as address data of the defective pixel. An automatic detection device for a defective pixel of a solid-state imaging device, characterized in that it is stored in a memory. 12. The solid-state image pickup device according to claim 1, wherein the data of the defective pixel stored in the storage means is reset before the start of the detection of the defective pixel. Automatic detection device for defective pixels of the image sensor. 13. The camera according to claim 5, further comprising: a defect detection unit that determines a defective pixel by comparing a level of an output signal from the solid-state imaging device with a preset detection level. camera. 14. The camera according to claim 5, wherein said writing means stores address data of an even field and address data of an odd field as address data of said defective pixel in said storage means. 15. The camera according to claim 5, wherein the data of the defective pixel stored in the storage means is reset when the power of the camera is turned on. 16. A storage means capable of storing n pieces of address data and defect level data of defective pixels of a solid-state image sensor, and a defective pixel from the solid-state image sensor when n pieces of defective pixels are stored in the storage means. And a defect level comparing means for comparing the defect level of the defective pixel having the smallest defect level among the n defective pixels stored in the storage means with the defect level comparing means. Writing control means for storing the address data and the defect level data of the defective pixel in place of the defective pixel having the lowest defect level when it is determined that the other defect level is higher. Automatic detection device for defective pixels. 17. A solid-state imaging device, storage means capable of storing n pieces of address data and defect level data of a defect of the solid-state imaging element, and said solid-state image sensor when said storage means stores n defective pixels. Defect level comparing means for comparing the defect level of the defective pixel from the image sensor with the defect level of the defective pixel having the smallest defect level among the n defective pixels stored in the storage means; Writing control means for storing the address data and the defect level data of the defective pixel in place of the defective pixel having the lowest defect level when it is determined that the defect level is higher than that of the solid-state imaging device. Features camera. 18. A first step of storing n (n is a natural number) address data and defect level data of a defective pixel of a solid-state imaging device, and when n address data and defect level data of a defective pixel are stored. A second step of comparing the defect level data of the newly detected defective pixel with the defect level data of the previously stored defective pixel; and the step of comparing the defect level of the newly detected defective pixel with the already stored defect level. And a third step of storing the address data and the defect level data of the newly detected defective pixel in place of the already stored defective pixel when it is determined that the defective pixel is higher than the defective level of the defective pixel. A method for automatically detecting defective pixels of a solid-state imaging device. 19. The method for automatically detecting defective pixels of a solid-state imaging device according to claim 18, wherein the minimum defective pixel having the smallest defect level of the n defective pixels stored in the first step is determined in advance. In the second step, only the defect level of the minimum defective pixel is compared with the defect level of the newly detected defective pixel. Detection method.