JP3153151B2 - Reset control circuit of portable information terminal using load circuit - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

The present invention relates to a reset control circuit for a portable information terminal or the like using a central processing unit (hereinafter referred to as a CPU).

[0002]

2. Description of the Related Art FIG. 5 shows an example of a conventional reset control circuit of a portable information terminal. In FIG. 5, 1 is a power supply for supplying a power supply voltage to each block, 2 is a wireless unit having a function of transmitting and receiving wireless signals, and 3 is a CPU, which controls and processes operations of the wireless unit 2 and peripheral blocks. 4 is ROM,
A peripheral block having various functions such as a RAM, an IRDA circuit, etc., 5 is a low voltage detection circuit for monitoring the voltage value of the power supply 1 and detecting a certain voltage or less, and 6 is a pull-up resistor for an output signal of the low voltage detection circuit. (Resistance value: large), 9 is a reset signal to be given to the CPU 3 and uses the low voltage detection signal of the low voltage detection circuit 5.

The reset control circuit is configured as described above, and its operation will be described below. FIG. 6 shows an output waveform of the low voltage detection circuit 5 with respect to a change in the input voltage. The output port of the low voltage detection circuit 5 is constituted by an N-CH open drain output, and is "L" when the input voltage is lower than the low voltage detection level.
It becomes "open" when the output is above the low voltage detection level.
In order to determine the logic at the time of “open”, the pull-up resistor 6 is used, and a low voltage detection signal as shown in FIG. 6 is obtained with respect to the power supply voltage.

[0004] The generation of a reset signal due to low voltage detection is as follows.
This indicates that the power supply voltage is a voltage that affects the normal operation of the peripheral block, and the CPU 3 that has received the reset signal due to the detection of the low voltage immediately stops the operation of the wireless unit 2, the peripheral block 4, and the CPU 3 itself. Do the work you want. When the reset signal is released, the CPU 3 performs a reset release operation such as initialization of the CPU 3, the wireless unit 2, and the peripheral block 4.

FIG. 7 shows a state in which the load current has significantly changed due to the operation of the radio unit 2, the CPU 3, and the peripheral block 4 when the power supply voltage is a voltage value immediately before low voltage detection occurs. I have. FIG. 7 shows the wireless unit 2 and CPU
3 and the peripheral block 4 are operating, and the power supply voltage fluctuates due to a large change in load current.
At this time, since the power supply voltage is a voltage value immediately before low voltage detection is generated, the detection signal of the low voltage detection circuit 5 and a reset signal (hereinafter, referred to as a reset signal) are, as shown in the reset signal of FIG. LOW "← →" HIGH "is repeated, and many reset signals are generated in a short time,
An extremely short reset signal may be generated.

[0006]

The first problem is that when the power supply voltage is a voltage value just before low voltage detection of the low voltage detection circuit 5 occurs, the radio unit 2, the CPU 3, and the peripheral blocks When the load current changes significantly due to the operation of the power supply 4, the power supply voltage fluctuates due to a large change in the load current, and the reset signal repeats “LOW” →→ “HIGH”, and many reset signals are generated in a short time. Or an extremely short reset signal is generated. The reason is that the generation of a large number of reset signals in a short time or the generation of an extremely short reset signal cannot secure a reliable reset signal, and the CPU 3 that receives the reset signal receives the reset signal.
This causes a malfunction of the device.

SUMMARY OF THE INVENTION The present invention solves the above-mentioned conventional problem. In order to prevent a malfunction due to a reset operation, a reset signal is reliably generated by detecting a low voltage, and a current consumption when the load circuit is operated. It is an object of the present invention to provide a reset control circuit capable of suppressing the reset.

[0008]

Means for Solving the Problems The invention according to claim 1
At least the central processing unit and the power supply voltage as the input voltage
Low voltage detection circuit and load current to supply voltage
And the detection signal of the low-voltage detection circuit
As the reset signal of the implanter and the control signal of the above load circuit
The load circuit operates when low voltage is detected.
To allow the central processing unit to operate the load circuit.
Has the function of outputting an enable signal,
Therefore, switching for controlling the operation signal of the load circuit is performed.
Circuit and the central processing unit recognizes the occurrence of low voltage.
Feature to stop the operation of the load circuit.
And The invention according to claim 2 provides at least central processing.
A device, a low-voltage detection circuit that uses a power supply voltage as an input voltage,
A load circuit for applying load current to the power supply voltage
The detection signal of the pressure detection circuit is used as the reset signal of the central processing unit.
It is configured to be used as a control signal for the load circuit,
The load circuit is configured to operate by detecting the pressure.
The low voltage detection circuit has an operation permission function, and the central processing
A function of outputting the load circuit operation permission signal to the
When the central processing unit recognizes the occurrence of low voltage, the load circuit
Operation of the low-voltage detection circuit by the circuit operation permission signal
It is characterized by being configured to be. The present invention relates to a central processing unit, a low-voltage detection circuit whose output voltage can be controlled by an operation permission signal using a power supply voltage as an input voltage, a load circuit for applying a large load current to the power supply voltage, and an operation of the load circuit. And a switching circuit for controlling the load circuit. The output signal of the low-voltage detection circuit is used as a reset signal for the central processing unit and a control signal of the load circuit. It is characterized in that it is configured to control the operation of. According to the configuration of the present invention, the power supply voltage fluctuates due to a large change in the load current, a large number of reset signals or extremely short reset signals are prevented from being generated in a short time, a reliable reset signal can be obtained, and the low processing power of the central processing unit can be obtained. Malfunction due to reset of voltage detection can be prevented, and current consumption when a low voltage is detected and the load circuit operates can be suppressed.

[0009]

BEST MODE FOR CARRYING OUT THE INVENTION

§1. First Embodiment [1] Description of Configuration FIG. 1 shows an example of a reset control circuit of a portable information terminal according to a first embodiment of the present invention. In FIG. 1, 1 is a power supply for supplying a power supply voltage to each block, 2 is a wireless unit having a function of transmitting and receiving wireless signals, and 3 is a unit that controls and processes operations of the wireless unit 2 and peripheral blocks and controls a load circuit. CPU 4 having a function of outputting a signal to perform
A peripheral block having various functions such as an RDA circuit, 5 is a low voltage detection circuit having a function of monitoring a voltage value of the power supply 1 and detecting a voltage equal to or lower than a certain voltage, and 6 is a pull-up resistor of an output signal of the low voltage detection circuit. (Resistance: large), 7 is a load composed of a P-ch field effect transistor for generating a load current by switching operation, and a current limiting resistor (resistance: small) when the transistor is turned on. Circuit, 8
Is a switching circuit controlled by a detection signal output permission signal from the CPU 3 with a P-ch field effect transistor, and 9 is a C using a low voltage detection signal of the low voltage detection circuit 5.
A reset signal 10 given to the PU 3 is a load circuit operation permission signal for controlling the operation of the load circuit 7.

[2] Description of Operation The reset control circuit is constructed as described above, and its operation will be described below. FIG. 2 illustrates a case where the power supply voltage 1 is a voltage value immediately before low voltage detection occurs,
This shows a state in which the load current due to the operation of the peripheral block 3 and the peripheral block 4 has significantly changed, and a voltage drop has occurred due to the internal resistance of the battery. 2 shows that the radio unit 2, the CPU 3 and the peripheral block 4 are operating, FIG. 2 shows the operation state of the load circuit 7, and FIG. 2 shows the operation state of the switching circuit (the operation state of the load circuit operation enable signal 10). State). When the power supply voltage fluctuates due to a large change in the load current, the power supply voltage 1 falls below the low voltage detection level, and the low voltage is detected by the low voltage detection circuit 5, the reset signal becomes “HIG”.
The logic changes from “H” to “LOW.” The detection signal “LOW” of the low voltage detection circuit 5 and the switching circuit 8 are turned on.
As a result, the load circuit 7 starts operating, and a large load is applied to the power supply voltage 1 to cause a further voltage drop. The operations of the radio unit 2, the CPU 3 and the peripheral block 4 are stopped, and the load current for them is reduced. However, the logic of the reset signal 9 is maintained at "LOW" without being inverted, and a sufficient time can be secured for the CPU 3 to recognize that the low-voltage reset has occurred.

The load circuit operation enable signal 10 output by the CPU 3 is "LOW" output at the time of normal voltage. However, when it is recognized that a reset due to a low voltage has occurred, the current consumption caused by the operation of the load circuit 7 is suppressed. Then, the CPU 3 outputs “HIGH” to the load circuit operation permission signal 10 to turn off the switching circuit 8 and stop the operation of the load circuit 7. Thereafter, when the power supply voltage 1 exceeds the low voltage level and the detection signal of the low voltage detection circuit 5 outputs “HIGH”, the CPU 3 receives the cancellation of the reset signal, and
Performs reset release operation. The CPU 3 performs an operation of setting the logic of the load circuit operation permission signal 10 to “LOW” and preparing an operation of turning on the switching circuit 8 in preparation for generation of the detection signal of the low voltage detection during the reset release operation.

§2. 2. Second Embodiment [1] Description of Configuration FIG. 3 shows an example of a reset control circuit of a portable information terminal according to a second embodiment of the present invention. In FIG. 3, reference numeral 1 denotes a power supply for supplying a power supply voltage to each block, 2 denotes a radio unit having a function of transmitting and receiving radio signals, and 3 denotes a control unit for controlling and processing operations of the radio unit 2 and peripheral blocks and controlling a load circuit. CPU 4 having a function of outputting a signal to perform
A peripheral block having various functions such as an RDA circuit, 5 a function of monitoring the voltage value of the power supply 1 and detecting a voltage equal to or lower than a certain voltage, and a low voltage detection circuit having an operation permission function, and 6 an output of the low voltage detection circuit. Signal pull-up resistor (resistance value:
Large), 7 is a load circuit composed of a P-ch field effect transistor for generating a load current by switching operation, and a current limiting resistor (resistance value: small) when the transistor is turned on. A reset signal 10 given to the CPU 3 using the low voltage detection signal of the low voltage detection circuit 5 is a load circuit operation permission signal for controlling the operation of the load circuit 7.

[2] Description of Operation The reset control circuit is configured as described above, and its operation will be described below. FIG. 4 illustrates a case where the wireless unit 2 and the CPU
This shows a state in which the load current due to the operation of the peripheral block 3 and the peripheral block 4 has significantly changed, and a voltage drop has occurred due to the internal resistance of the battery. 4 shows that the radio unit 2, the CPU 3 and the peripheral block 4 are operating, FIG. 4 shows the operation state of the load circuit, and FIG.
And shows the state of operation of the low voltage detection circuit. When the power supply voltage 1 fluctuates due to a large change in load current, the power supply voltage 1 falls below the low voltage detection level, and the low voltage is detected by the low voltage detection circuit 5, the reset signal becomes “HIG”.
The logic changes from “H” to “LOW.” The load circuit 7 starts operating in response to the detection signal “LOW” of the low voltage detection circuit 5, and a large load is applied to the power supply voltage 1, causing a further voltage drop. 2. Even if the operation of the CPU 3 and the peripheral block 4 is stopped and the load current for them is reduced, the logic of the reset signal is kept "LOW" without being inverted, and the CPU 3 recognizes that a low-voltage reset has occurred. Can secure enough time.

The load circuit operation permission signal 10 output from the CPU 3 is a "LOW" output at the time of a normal voltage. However, when it is recognized that a reset due to a low voltage has occurred, the current consumption caused by the operation of the load circuit 7 is suppressed. Then, the CPU 3 stops the operation of the low voltage detection circuit 5 by outputting “HIGH” to the load circuit operation permission signal 10, and the low voltage detection circuit 5 outputs “HIGH” and stops the operation of the load circuit 7. Let it. Thereafter, when the power supply voltage exceeds the low voltage level and the detection signal of the low voltage detection circuit 5 outputs “HIGH”, the CPU 3 receives the release of the reset signal 9 and performs a reset release operation. The CPU 3 performs an operation of setting the logic of the load circuit operation permission signal 10 to “LOW” in preparation for generation of the detection signal of the low voltage detection during the reset release operation, and permits the operation of the low voltage detection circuit 5. Perform the operation.

The embodiment of the present invention has been described in detail with reference to the drawings. However, the specific configuration is not limited to this embodiment, and a design change or the like may be made without departing from the gist of the present invention. Even if there is, it is included in the present invention.

[0016]

The first effect is that, as described above, the power supply voltage fluctuates due to a large change in the load current, and the generation of a large number of reset signals or extremely short reset signals in a short time is prevented, and a reliable reset is performed. A signal is obtained, and malfunction due to resetting of the low voltage detection of the central processing unit can be prevented. The reason is that a low-voltage detection signal is generated to operate the load circuit and apply a large load to the power supply, thereby causing the CPU,
This is because, even when the load current is significantly changed due to the stoppage of the operation of the radio unit and the peripheral blocks, the logic of the detection signal is prevented from being inverted again until the CPU recognizes the reset signal due to the low voltage. . The second effect is that current consumption when a low voltage is detected and the load circuit operates can be reduced. The reason is that, after the CPU recognizes the reset signal due to the low voltage, the control of the switching circuit or the control of the low voltage detection circuit is performed by the load circuit operation permission signal, so that the operation of the load circuit is stopped as short as possible. Because.

[Brief description of the drawings]

FIG. 1 is a block diagram illustrating an example of a reset control circuit of a portable information terminal according to a first embodiment of the present invention.

FIG. 2 is an explanatory diagram showing an example of a waveform of each unit of the portable information terminal to which the reset control circuit according to the embodiment is applied.

FIG. 3 is a block diagram illustrating an example of a reset control circuit of a portable information terminal according to a second embodiment of the present invention. .

FIG. 4 is an explanatory diagram showing an example of a waveform of each unit of the portable information terminal to which the reset control circuit according to the embodiment is applied.

FIG. 5 is a block diagram showing an example of a conventional reset control circuit of a portable information terminal.

FIG. 6 is an explanatory diagram showing an example of input / output waveforms of the low voltage detection circuit.

FIG. 7 is an explanatory diagram showing an example of a power supply voltage and a waveform of a reset signal of a conventional portable information terminal.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 ... Power supply 2 ... Radio | wireless part 3 ... CPU 4 ... Peripheral block 5 ... Low voltage detection circuit 6 ... Pull-up resistance (resistance value: large) 7 ... Load circuit 8 ... Switching circuit 9 ... Reset signal 10: Load circuit operation enable signal

Claims (2)

(57) [Claims] At least a central processing unit, a low voltage detection circuit using a power supply voltage as an input voltage, a load circuit for applying a load current to the power supply voltage, and a central processing unit for detecting a detection signal of the low voltage detection circuit configured as to be used as the reset signal and the control signal of the load circuit is configured as to operate the load circuit by the detection of a low voltage, the machine that outputs a load circuit operation permission signal to said central processing unit
The load circuit is enabled by a load circuit operation enable signal.
A switching circuit for controlling the operation signal of
When the central processing unit recognizes the occurrence of a low voltage, the load circuit operates.
A reset control circuit characterized in that the operation is stopped . 2. At least a central processing unit and a power supply voltage
Low voltage detection circuit for input voltage and load current for power supply voltage
And the detection signal of the low voltage detection circuit.
Signal of central processing unit and control of the above load circuit
It is configured to be used as a signal.
Is configured such that load circuit operates, has an operating permission function to the low voltage detection circuit, said central processing
A function to output the above load circuit operation enable signal to the
When the central processing unit recognizes the occurrence of a low voltage,
The operation of the low-voltage detection circuit is stopped by the load circuit operation enable signal.
A reset control circuit characterized by being configured to stop .