JP3147267B2 - Electron emitting device and method of manufacturing the same - Google Patents
Electron emitting device and method of manufacturing the sameInfo
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- JP3147267B2 JP3147267B2 JP23596493A JP23596493A JP3147267B2 JP 3147267 B2 JP3147267 B2 JP 3147267B2 JP 23596493 A JP23596493 A JP 23596493A JP 23596493 A JP23596493 A JP 23596493A JP 3147267 B2 JP3147267 B2 JP 3147267B2
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- electron
- emitting device
- thin film
- emitting
- forming
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Description
【0001】[0001]
【産業上の利用分野】本発明は電子放出素子、および簡
単な製法で高効率に電子を放出できる電子放出素子の製
造方法に関するものである。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an electron-emitting device and a method for manufacturing an electron-emitting device capable of efficiently emitting electrons by a simple manufacturing method.
【0002】[0002]
【従来の技術】従来、電子放出素子としては、熱電子源
と冷陰極電子源の2種類が知られている。冷陰極電子源
には電界放出型(FE)、金属/絶縁層/金属型(以
下、MIMと略す)や表面伝導型電子放出素子(SC
E)等がある。2. Description of the Related Art Conventionally, two types of electron-emitting devices, a thermionic electron source and a cold cathode electron source, are known. Field emission type (FE), metal / insulating layer / metal type (hereinafter abbreviated as MIM), and surface conduction type electron emitting device (SC) are used as cold cathode electron sources.
E).
【0003】電界放出型(FE)の例としては、W.
P.Dyke&W.W.Dolan,“Field e
mission”,Advance in Elect
ronPhysics、8、89(1956)および
C.A.Spindt、“Physical prop
erties of thin film−field
emission cathodes with mo
lybdenum cones”、J.Appl.Ph
ys.、47、5248(1976)等が知られてい
る。[0003] An example of a field emission type (FE) is disclosed in W.S.
P. Dyke & W. W. Dolan, "Field e
mission ", Advance in Elect
ronPhysics, 8, 89 (1956) and C.I. A. Spindt, “Physical prop
artists of thin film-field
emission cathodes with mo
lybdenum cones ", J. Appl. Ph.
ys. , 47, 5248 (1976).
【0004】MIM型の例としては、C.A.Mea
d、“The tunnel−emission am
plifier、J.Appl.Phys.、32、6
46(1961)等が知られている。As an example of the MIM type, C.I. A. Mea
d, "The tunnel-emission am
plier, J. et al. Appl. Phys. , 32, 6
46 (1961) and the like are known.
【0005】SCE型の例としては、M.I.Elin
son、Radio Eng. Electron P
ys.、10(1965)等がある。SCEは基板上に
形成された小面積の薄膜に、膜面に平行に電流を流すこ
とにより、電子放出が生ずる現象を利用するものであ
る。As an example of the SCE type, M. I. Elin
son, Radio Eng. Electron P
ys. , 10 (1965). The SCE utilizes a phenomenon in which electron emission occurs when a current flows in a small-area thin film formed on a substrate in parallel with the film surface.
【0006】この表面伝導型電子放出素子(SCE)と
しては、前記エリンソン等によるSnO2 薄膜を用いた
もの、Au薄膜によるもの[G.Dittmer:“T
hin Solid Films”、9、317(19
72)]、In2 O3 /SnO2 薄膜によるもの[M.
Hartwell and C.G.Fonstad:
“IEEE Trans.ED Conf.”、519
(1975)]、カーボン薄膜によるもの[荒木久
他:真空、第26巻、第1号、22頁(1983)]等
が報告されている。As the surface conduction electron-emitting device (SCE), a device using an SnO 2 thin film by Elinson et al., A device using an Au thin film [G. Dittmer: "T
Hin Solid Films ", 9, 317 (19
72)], a thin film of In 2 O 3 / SnO 2 [M.
Hartwell and C.M. G. FIG. Fonstad:
"IEEE Trans. ED Conf.", 519
(1975)], using a carbon thin film [Hisashi Araki]
Others: Vacuum, Vol. 26, No. 1, p. 22 (1983)] and the like.
【0007】これらの表面伝導型電子放出素子の典型的
な素子構成として前述のM.ハートウェルの素子構成を
図6に示す。図6(a)は素子の平面図、図6(b)は
AA線断面図である。同図において1は絶縁性基板であ
る。電子放出部形成用薄膜4は、スパッタで形成された
H型形状の金属酸化物薄膜等からなり、後述のフォーミ
ングと呼ばれる通電処理により電子放出部5が形成され
る。4は電子放出部を含む薄膜である。As a typical device configuration of these surface conduction electron-emitting devices, the above-mentioned M.D. FIG. 6 shows the device configuration of the Hartwell. FIG. 6A is a plan view of the element, and FIG. 6B is a sectional view taken along the line AA. In FIG. 1, reference numeral 1 denotes an insulating substrate. The electron-emitting portion forming thin film 4 is formed of an H-shaped metal oxide thin film or the like formed by sputtering, and the electron-emitting portion 5 is formed by an energization process called forming described below. Reference numeral 4 denotes a thin film including an electron emitting portion.
【0008】従来、これらの表面伝導型電子放出素子に
おいては、電子放出を行う前に電子放出部形成薄膜4を
予めフォーミングと呼ばれる通電処理によって電子放出
部5を形成するのが一般的であった。即ち、フォーミン
グとは、前記電子放出部形成用薄膜4の両端に電圧を印
加通電し、電子放出部形成用薄膜を局所的に破壊、変形
もしくは変質せしめ、電気的に高抵抗な状態にした電子
放出部5を形成することである。尚、電子放出部5は電
子放出部形成用薄膜4の一部に亀裂が発生し、その亀裂
付近から電子放出が行なわれる場合もある。以下、フォ
ーミングにより発生した電子放出部を含む電子放出部形
成用薄膜を電子放出部を含む薄膜4と呼ぶ。Conventionally, in these surface-conduction electron-emitting devices, the electron-emitting portion forming thin film 4 is generally formed with an electron-emitting portion 5 by an energization process called forming before electron emission. . That is, the forming means that an electron is applied by applying a voltage to both ends of the thin film 4 for forming an electron emitting portion, causing the thin film for forming an electron emitting portion to be locally destroyed, deformed or deteriorated, and brought into an electrically high-resistance state. That is, the emission part 5 is formed. In the electron emitting portion 5, a crack may be generated in a part of the thin film 4 for forming the electron emitting portion, and the electron emission may be performed from the vicinity of the crack. Hereinafter, the thin film for forming the electron emitting portion including the electron emitting portion generated by the forming is referred to as a thin film 4 including the electron emitting portion.
【0009】前記フォーミング処理をした表面伝導型電
子放出素子は上述の電子放出部を含む薄膜4に電圧を印
加し、素子表面に電流を流すことにより、上述の電子放
出部5より電子を放出せしめるものである。In the surface-conduction type electron-emitting device subjected to the forming treatment, a voltage is applied to the thin film 4 including the above-described electron-emitting portion, and a current is caused to flow through the surface of the device, thereby causing the electron-emitting portion 5 to emit electrons. Things.
【0010】[0010]
【発明が解決しようとする課題】しかしながら、上記の
様な従来の表面伝導型電子放出素子において、実用化、
特に、表示装置に対する実用化を妨げている問題点とし
て、下記の理由を挙げることができる。However, in the above-mentioned conventional surface conduction type electron-emitting device,
In particular, the following reasons can be cited as problems that hinder practical application to display devices.
【0011】1)電子放出が行われている状態において
も、素子を流れる電流はその一部が絶縁性基板1内を流
れるのでジュール熱の発生要因となっている可能性があ
る。 2)絶縁性基板1内を流れる電流は、絶縁性基板1内や
絶縁性基板1上に付着した不純物等に大きく影響を受け
るので素子間のバラツキが大きくなってしまう。 3)電子放出の効率があまり良くない。これは基板1内
を経由して流れる電流が大きいことによる可能性が1つ
の要因として考えられる。 以上のような問題点があるため、表面伝導型電子放出素
子は、素子構造が簡単であるという利点があるにもかか
わらず、産業上積極的に応用されるには至っていなかっ
た。1) Even in a state where electrons are being emitted, a part of the current flowing through the element flows through the insulating substrate 1, which may cause Joule heat. 2) The current flowing in the insulating substrate 1 is greatly affected by impurities and the like adhering to the inside of the insulating substrate 1 and on the insulating substrate 1, so that the variation between elements becomes large. 3) The efficiency of electron emission is not very good. This may be due to a large current flowing through the inside of the substrate 1 as one factor. Due to the above-described problems, the surface conduction electron-emitting device has not been actively used in industry, despite the advantage that the device structure is simple.
【0012】本発明は、この様な従来技術の問題点を解
決するためになされたものであり、電子放出が行われて
いる状態においても素子の温度上昇が小さく、電子放出
の素子間のバラツキが小さく、電子放出の効率が良好な
電子放出素子およびその製造方法を提供することを目的
とするものである。SUMMARY OF THE INVENTION The present invention has been made to solve the above-mentioned problems of the prior art. Even when electrons are being emitted, the temperature rise of the device is small, and the variation in the electron emission between the devices. It is an object of the present invention to provide an electron-emitting device having small electron emission efficiency and good electron emission efficiency, and a method for manufacturing the same.
【0013】[0013]
【課題を解決するための手段】即ち、本発明は、絶縁性
基板上の一対の電極間に導電性膜を有し、該導電性膜の
一部に、該電極間に電圧を印加することで形成された、
亀裂部を有する電子放出素子において、該基板が導電性
膜の亀裂部内で溝部を有することを特徴とする電子放出
素子である。That is, the present invention has a conductive film between a pair of electrodes on an insulating substrate , and a voltage is applied to a part of the conductive film between the electrodes. Formed by
In an electron-emitting device having a crack, the substrate is made of a conductive material.
An electron-emitting device having a groove in a crack of the film .
【0014】また、本発明は、電子放出素子の製造方法
において、絶縁性基板上に―対の電極を形成する工程
と、該電極間に導電性膜を形成する工程と、該電極間に
電圧を印加することで該導電性膜の一部に亀裂部を形成
する工程と、該亀裂部内の該基板の一部を除去し、該亀
裂部内に溝部を形成する工程とを有することを特徴とす
る電子放出素子の製造方法である。Further, according to the present invention, there is provided a method of manufacturing an electron-emitting device, comprising: forming a pair of electrodes on an insulating substrate; forming a conductive film between the electrodes; A step of forming a crack in a part of the conductive film by applying a pressure, and a step of removing a part of the substrate in the crack and forming a groove in the crack. This is a method for manufacturing an electron-emitting device.
【0015】以下、本発明を詳細に説明する。本発明者
らは、上記問題点を鑑みて検討した結果、素子の電子放
出の際における絶縁性基板の影響を極力取り除くため
に、導電性薄膜あるいは微粒子の島状膜からなる導電性
膜からなる不連続状態膜を保持している絶縁性基板にお
いて、前記導電性膜の不連続部の位置の基板に溝部を形
状した構造の電子放出素子を見出した。Hereinafter, the present invention will be described in detail. The present inventors have studied in view of the above-mentioned problems, and as a result, in order to remove the influence of the insulating substrate during the electron emission of the element as much as possible, the conductive film is formed of a conductive thin film or a conductive film formed of an island-like film of fine particles. In an insulating substrate holding a discontinuous film, an electron-emitting device having a structure in which a groove is formed in the substrate at the position of the discontinuous portion of the conductive film was found.
【0016】この新規な本発明に関わる電子放出素子の
基本的な構成と製造方法および特性について概説する。
図1は本発明にかかわる基本的な電子放出素子の構成を
示す構成図である。図1(a)は素子の平面図、図1
(b)はBB線断面図である。同図において、1は絶縁
性基板、2及び3は素子電極、4は電子放出材料で形成
される薄膜、5は電子放出部である。6は絶縁性基板に
加工された溝部を示す。The basic structure, manufacturing method and characteristics of the new electron-emitting device according to the present invention will be outlined.
FIG. 1 is a configuration diagram showing the configuration of a basic electron-emitting device according to the present invention. FIG. 1A is a plan view of the device, and FIG.
(B) is a BB line sectional view. In the figure, 1 is an insulating substrate, 2 and 3 are device electrodes, 4 is a thin film formed of an electron emitting material, and 5 is an electron emitting portion. Reference numeral 6 denotes a groove formed in the insulating substrate.
【0017】本発明における電子放出部を含む薄膜4の
うち電子放出部5としては粒径が数十Åの導電性微粒子
からなり、電子放出部5以外の電子放出部を含む薄膜4
は微粒子膜からなる。なお、ここで述べる微粒子膜と
は、複数の微粒子が集合した膜であり、その微細構造と
して、微粒子が個々に分散配置した状態のみならず、微
粒子が互いに隣接、あるいは重なり合った状態(島状も
含む)の膜をさす。またこれとは別に電子放出部を含む
薄膜4は、導電性微粒子が分散されたカーボン薄膜等の
場合がある。In the present invention, the electron emitting portion 5 of the thin film 4 including the electron emitting portion is made of conductive fine particles having a particle diameter of several tens of mm, and includes the electron emitting portion other than the electron emitting portion 5.
Consists of a fine particle film. Note that the fine particle film described here is a film in which a plurality of fine particles are aggregated, and has a fine structure not only in a state in which the fine particles are individually dispersed and arranged, but also in a state in which the fine particles are adjacent to each other or overlapped (island shape). Inclusive). Alternatively, the thin film 4 including the electron-emitting portion may be a carbon thin film in which conductive fine particles are dispersed.
【0018】電子放出部を含む薄膜4の具体例を挙げる
ならばPd,Ru,Ag,Au,Ti,In,Cu,C
r,Fe,Zn,Sn,Ta,W,Pb等の金属、Pd
O,SnO2 ,In2 O3 ,PbO,Sb2 O3 等の酸
化物、HfB2 ,ZrB2 ,LaB6 ,CeB6 ,YB
4 ,GdB4 等の硼化物、TiC,ZrC,HfC,T
aC,SiC,WC等の炭化物、TiN,ZrN,Hf
N等の窒化物、Si,Ge等の半導体、カーボン、Ag
Mg,NiCu,Pb,Sn等である。Pd, Ru, Ag, Au, Ti, In, Cu, C
metals such as r, Fe, Zn, Sn, Ta, W, Pb, Pd
Oxides such as O, SnO 2 , In 2 O 3 , PbO, Sb 2 O 3 , HfB 2 , ZrB 2 , LaB 6 , CeB 6 , YB
4, GdB boride such as 4, TiC, ZrC, HfC, T
carbides such as aC, SiC, WC, TiN, ZrN, Hf
Nitride such as N, semiconductor such as Si and Ge, carbon, Ag
Mg, NiCu, Pb, Sn and the like.
【0019】そして、電子放出部を含む薄膜4は真空蒸
着法、スパッタ法、化学的気相堆積法、分散塗布法、デ
ィッピング法、スピナー法等によって形成される。The thin film 4 including the electron-emitting portion is formed by a vacuum deposition method, a sputtering method, a chemical vapor deposition method, a dispersion coating method, a dipping method, a spinner method, or the like.
【0020】次に、本発明の電子放出素子の製造方法に
ついて説明する。本発明の電子放出部5を有する電子放
出素子の製造方法としては様々な方法があるが、その一
例の製造工程図を図2に示す。4は電子放出部形成用薄
膜で例えば微粒子膜が挙げられる。Next, a method for manufacturing the electron-emitting device of the present invention will be described. There are various methods for manufacturing an electron-emitting device having the electron-emitting portion 5 of the present invention. FIG. 2 shows a manufacturing process diagram of one example. Reference numeral 4 denotes a thin film for forming an electron emitting portion, for example, a fine particle film.
【0021】以下、順をおって製造方法の説明を図2及
び第3図に基づいて説明する。 1)絶縁性基板1を洗剤、純水および有機溶剤により十
分に洗浄後、真空蒸着技術、フォトリソグラフィー技術
により絶縁性基板1の面上に素子電極2,3を形成する
(図2(a)参照)。素子電極の材料としては導電性を
有するものてあればどのようなものであっても構わない
が、例えばニッケル金属が挙げられ、素子電極間隔L1
は2μm、素子電極長さW1は300μm、素子電極
2,3の膜厚dは1000Åである。Hereinafter, the manufacturing method will be described in order with reference to FIG. 2 and FIG. 1) After sufficiently washing the insulating substrate 1 with a detergent, pure water and an organic solvent, the device electrodes 2 and 3 are formed on the surface of the insulating substrate 1 by vacuum deposition technology and photolithography technology (FIG. 2A). reference). Any material may be used as the material of the device electrode as long as it has conductivity. For example, a nickel metal may be used, and the device electrode interval L1
Is 2 μm, the element electrode length W1 is 300 μm, and the film thickness d of the element electrodes 2 and 3 is 1000 °.
【0022】2)絶縁性基板1上に設けられた素子電極
2と素子電極3との間に、素子電極2,3に掛かる様に
有機金属溶液を塗布して放置することにより、有機金属
薄膜を形成する。なお、有機金属溶液とは、前記Pd,
Ru,Ag,Au,Ti,In,Cu,Cr,Fe,Z
n,Sn,Ta,W,Pd等の金属を主元素とする有機
化合物の溶液が用いられる。2) An organometallic solution is applied between the device electrodes 2 and 3 provided on the insulating substrate 1 so as to cover the device electrodes 2 and 3 and is allowed to stand. To form In addition, the organic metal solution refers to the Pd,
Ru, Ag, Au, Ti, In, Cu, Cr, Fe, Z
A solution of an organic compound containing a metal such as n, Sn, Ta, W, or Pd as a main element is used.
【0023】この後、有機金属薄膜を加熱焼成処理し、
リフトオフ、エッチング等によりパターニングし、電子
放出部形成用薄膜4を形成する。(図2(b)参照)Thereafter, the organic metal thin film is subjected to a heating and baking treatment,
Patterning is performed by lift-off, etching, or the like to form a thin film 4 for forming an electron-emitting portion. (See FIG. 2 (b))
【0024】3)つづいて、フォーミングと呼ばれる通
電処理を素子電極2,3間に電圧を不図示の電源により
印加し施すと、電子放出部形成用薄膜4の部位に構造の
変化した電子放出部5が形成される(図2(C)参
照)。この通電処理により電子放出部形成用薄膜4を局
所的に破壊、変形もしくは変質せしめ、構造の変化した
部位を電子放出部5と呼ぶ。先に説明したように、電子
放出部5は金属微粒子で構成されていることを本出願人
らは観察している。3) Subsequently, when an energizing process called forming is applied between the element electrodes 2 and 3 by applying a voltage from a power supply (not shown), the electron emitting portion having a changed structure is formed at the portion of the thin film 4 for forming the electron emitting portion. 5 is formed (see FIG. 2C). The portion where the thin film 4 for forming an electron emission portion is locally broken, deformed or deteriorated by this energization treatment and the structure is changed is referred to as an electron emission portion 5. As described above, the present applicant has observed that the electron-emitting portion 5 is made of fine metal particles.
【0025】4)上記のような方法によって形成された
電子放出部5は薄膜4の一部に亀裂を有し、かつ亀裂内
が金属微粒子で構成された不連続状態となっている。さ
らにこの後に、前記電子放出部形成用薄膜4の島構造を
マスクとしてドライ・エッチング・プロセスまたはウエ
ット・エッチング・プロセス等により電子放出部5の部
分の絶縁性基板1を取り除くことによって溝部6を形成
して本発明の電子放出素子が作製される(図2(d)参
照)。4) The electron emitting portion 5 formed by the above-described method has a crack in a part of the thin film 4, and the inside of the crack is in a discontinuous state composed of fine metal particles. Further, thereafter, the trench 6 is formed by removing the insulating substrate 1 in the portion of the electron emitting portion 5 by a dry etching process or a wet etching process using the island structure of the electron emitting portion forming thin film 4 as a mask. Thus, the electron-emitting device of the present invention is manufactured (see FIG. 2D).
【0026】上述のような素子構成と製造方法によって
作成された本発明にかかわる電子放出素子の基本特性に
ついて図3、図4を用いて説明する。The basic characteristics of the electron-emitting device according to the present invention produced by the above-described device structure and manufacturing method will be described with reference to FIGS.
【0027】図3は、図2で示した構成を有する電子放
出素子の電子放出特性を測定するための測定評価装置の
概略構成図である。図3において、1は絶縁性基板、2
及び3は素子電極、4は薄膜、5は電子放出部を示す。
また、8は素子に電子電圧Vfを印加するための電源、
9は素子電極2,3間の電子放出部を含む薄膜4を流れ
る素子電流Ifを測定するための電流計、10は素子の
電子放出部より放出される放出電流Ieを捕捉するため
のアノード電極、11はアノード電極10に電圧を印加
するための高圧電源、12は素子の電子放出部5より放
出される放出電流Ieを測定するための電流計である。FIG. 3 is a schematic configuration diagram of a measurement and evaluation device for measuring the electron emission characteristics of the electron-emitting device having the configuration shown in FIG. In FIG. 3, 1 is an insulating substrate, 2
Reference numerals 3 and 3 denote device electrodes, 4 a thin film , and 5 an electron emitting portion.
8 is a power supply for applying an electron voltage Vf to the element,
Reference numeral 9 denotes an ammeter for measuring a device current If flowing through the thin film 4 including an electron-emitting portion between the device electrodes 2 and 3. Reference numeral 10 denotes an anode electrode for capturing an emission current Ie emitted from the electron-emitting portion of the device. , 11 are high voltage power supplies for applying a voltage to the anode electrode 10, and 12 is an ammeter for measuring an emission current Ie emitted from the electron emission portion 5 of the device.
【0028】電子放出素子の上記素子電流If、放出電
流Ieの測定にあたっては、素子電極2,3に電源8と
電流計9とを接続し、該電子放出素子の上方に電源11
と電流計12とを接続したアノード電極10を配置して
いる。また、本電子放出素子及びアノード電極10は真
空装置内に設置され、その真空装置には不図示の排気ポ
ンプ及び真空計等の真空装置に必要な機器が具備されて
おり、所望の真空下で本素子の測定評価を行なえるよう
になっている。なお、アノード電極の電圧は1kV〜1
0kV、アノード電極と電子放出素子との距離は3mm
〜8mmの範囲で測定した。In measuring the device current If and the emission current Ie of the electron-emitting device, a power supply 8 and an ammeter 9 are connected to the device electrodes 2 and 3, and a power supply 11 is provided above the electron-emitting device.
And an ammeter 12 connected to the anode electrode 10. The electron-emitting device and the anode electrode 10 are installed in a vacuum device, and the vacuum device is provided with equipment necessary for a vacuum device such as an exhaust pump (not shown) and a vacuum gauge. The device can be measured and evaluated. The voltage of the anode electrode is 1 kV to 1 kV.
0 kV, distance between anode electrode and electron-emitting device is 3 mm
It was measured in a range of 88 mm.
【0029】図3に示した測定評価装置により測定され
た放出電流Ieおよび素子電流Ifと素子電圧Vfの関
係の典型的な例を図4に示す。なお、図4は任意単位で
示されており、放出電流Ieは素子電流Ifのおおよそ
1000分の1程度である。FIG. 4 shows a typical example of the relationship between the emission current Ie, the device current If, and the device voltage Vf measured by the measurement and evaluation apparatus shown in FIG. FIG. 4 is shown in arbitrary units, and the emission current Ie is about one thousandth of the device current If.
【0030】図4からも明らかなように、本電子放出素
子は放出電流Ieに対する三つの特性を有する。まず第
一に、本素子はある電圧(しきい値電圧と呼ぶ、図4中
のVth)以上の素子電圧を印加すると急激に放出電流
Ieが増加し、一方しきい値電圧Vth以下では放出電
流Ieがほとんど検出されない。すなわち、放出電流I
eに対する明確なしきい値電圧Vthを持った非線形素
子である。As is clear from FIG. 4, the electron-emitting device has three characteristics with respect to the emission current Ie. First, the emission current Ie of the present device rapidly increases when a device voltage higher than a certain voltage (referred to as a threshold voltage, Vth in FIG. 4) is applied. Ie is hardly detected. That is, the emission current I
This is a non-linear element having a clear threshold voltage Vth for e.
【0031】第二に、放出電流Ieが素子電圧Vfに依
存するため、放出電流Ieは素子電圧Vfで制御でき
る。第三に、アノード電極10に捕捉される放出電荷
は、素子電圧Vfを印加する時間に依存する。すなわ
ち、アノード電極10に捕捉される電荷量は、電子電圧
Vfを印加する時間により制御できる。以上のような特
性を有するため、本発明にかかわる電子放出素子は、多
方面への応用が期待できる。Second, since the emission current Ie depends on the device voltage Vf, the emission current Ie can be controlled by the device voltage Vf. Third, the emission charge captured by the anode electrode 10 depends on the time during which the device voltage Vf is applied. That is, the amount of charge captured by the anode electrode 10 can be controlled by the time during which the electron voltage Vf is applied. Because of the above characteristics, the electron-emitting device according to the present invention can be expected to be applied to various fields.
【0032】また、素子電流Ifは素子電圧Vfに対し
て単調増加する(MI)特性の例を図4に示したが、こ
の他にも、素子電流Ifが素子電圧Vfに対して電圧制
御型負性抵抗(VCNR)特性を示す場合もある。なお
この場合も、本電子放出素子は上述した三つの特性を有
する。FIG. 4 shows an example of the (MI) characteristic in which the element current If monotonically increases with respect to the element voltage Vf. It may exhibit negative resistance (VCNR) characteristics. Also in this case, the electron-emitting device has the above three characteristics.
【0033】なお、あらかじめ導電性微粒子を分散して
構成した表面伝導型電子放出素子においては、前記本発
明の基本的な素子構成の基本的な製造方法のうち一部を
変更しても構成できる。また、本発明者らが米国特許第
5066883号で技術開示したように、基板上の段差
の上下に素子電極を設け、該電極間に電子放出部を含む
薄膜を配置した垂直型表面伝導型電子放出素子において
も同様な特性を得ることができる。The surface conduction electron-emitting device in which the conductive fine particles are dispersed in advance can be constituted by partially changing the basic manufacturing method of the basic device structure of the present invention. . Further, as disclosed by the present inventors in US Pat. No. 5,066,883, a vertical surface conduction electron device in which device electrodes are provided above and below a step on a substrate, and a thin film including an electron emitting portion is arranged between the electrodes. Similar characteristics can be obtained in the emission element.
【0034】[0034]
【作用】以上説明した本発明の電子放出素子において
は、素子で発生するジュール熱を少なくでき、その結果
素子の信頼性を向上することができる。さらに、素子間
のばらつきを抑さえ、電子放出の効率を上げることがで
きる。したがって、本発明の電子放出素子を多数個並べ
てパネル化し、表示素子の電子源として用いた場合に、
この表示装置の画像の均一性、表示装置の消費電力、信
頼性の向上に大きな効果が期待できる。In the electron-emitting device of the present invention described above, Joule heat generated in the device can be reduced, and as a result, the reliability of the device can be improved. Further, it is possible to suppress the variation between the devices and increase the efficiency of electron emission. Therefore, when a large number of electron-emitting devices of the present invention are arranged in a panel to be used as an electron source of a display device,
Significant effects can be expected on improving the uniformity of the image of the display device, the power consumption of the display device, and the reliability.
【0035】[0035]
【実施例】以下に実施例を挙げて本発明を具体的に説明
する。EXAMPLES The present invention will be specifically described below with reference to examples.
【0036】実施例1 本実施例の電子放出素子として図1に示すタイプの電子
放出素子を作成した。図1(a)は本素子の平面図を、
図1(b)は断面図を示している。また、図1(a),
(b)中の1は絶縁性基板、2および3は素子に電圧を
印加するための素子電極、4は電子放出部を含む薄膜、
5は電子放出部を示す。なお、図中のL1は素子電極2
と素子電極3の素子電極間隔、W1は素子電極の幅、d
は素子電極の厚さ、W2は第1の導電性薄膜の幅を表し
ている。Example 1 An electron-emitting device of the type shown in FIG. 1 was produced as an electron-emitting device of this example. FIG. 1A is a plan view of the present element,
FIG. 1B shows a cross-sectional view. In addition, FIG.
1 in (b) is an insulating substrate, 2 and 3 are device electrodes for applying a voltage to the device, 4 is a thin film including an electron emitting portion,
Reference numeral 5 denotes an electron emitting portion. L1 in the figure is the element electrode 2
And the element electrode interval between the element electrodes 3, W1 is the width of the element electrode, d
Represents the thickness of the device electrode, and W2 represents the width of the first conductive thin film.
【0037】図2を用いて、本実施例の電子放出素子の
作成方法を述べる。 1)絶縁性基板1として石英基板を用い、これを有機溶
剤により充分に洗浄後、該絶縁性基板1面上に、Niか
らなる素子電極2,3を形成した(図2(a))。この
時、素子電極間隔L1は3μmとし、素子電極の幅W1
を500μm、その厚さdを1000Åとした。A method for manufacturing the electron-emitting device of this embodiment will be described with reference to FIG. 1) A quartz substrate was used as the insulating substrate 1, and after sufficiently washing with an organic solvent, the device electrodes 2 and 3 made of Ni were formed on the surface of the insulating substrate 1 (FIG. 2A). At this time, the element electrode interval L1 is 3 μm, and the element electrode width W1
Was set to 500 μm, and the thickness d was set to 1000 °.
【0038】2)次に、素子電極2,3の間に有機パラ
ジウム(奥野製薬(株)製、ccp−4230)含有溶
液を塗布した後、300℃で10分間の加熱処理をし
て、酸化パラジウム(PdO)微粒子(粒径:8〜12
0Å、平均粒径:70Å)からなる微粒子膜を形成し、
電子放出部形成用薄膜4とした(図2の(b))。ここ
で電子放出部形成用薄膜4は、その幅(素子の幅)Wを
300μmとし、素子電極2と3のほぼ中央部に配置し
た。2) Next, a solution containing organic palladium (ccp-4230, manufactured by Okuno Pharmaceutical Co., Ltd.) was applied between the device electrodes 2 and 3, and then heat-treated at 300 ° C. for 10 minutes to oxidize. Palladium (PdO) fine particles (particle size: 8 to 12)
0 °, average particle size: 70 °) to form a fine particle film,
The thin film 4 for forming an electron-emitting portion was formed (FIG. 2B). Here, the thin film 4 for forming an electron-emitting portion has a width (width of the device) W of 300 μm and is disposed substantially at the center of the device electrodes 2 and 3.
【0039】また、この電子放出部形成用薄膜4の膜厚
は100Å、シート抵抗値は5×104 Ω/cm2 であ
った。なお、ここで述べる微粒子膜とは、複数の微粒子
が集合した膜であり、その微細構造として、微粒子が個
々に分散配置した状態のみならず、微粒子が互いに隣
接、あるいは重なりあった状態(島状も含む)の膜をさ
し、その微粒子の粒径8〜120Åとは、前記状態で粒
子形成が認識可能な微粒子についての径をいう。The film thickness of the electron emitting portion forming thin film 4 was 100 ° and the sheet resistance was 5 × 10 4 Ω / cm 2 . Note that the fine particle film described here is a film in which a plurality of fine particles are aggregated, and has a fine structure not only in a state in which the fine particles are individually dispersed and arranged, but also in a state in which the fine particles are adjacent to each other or overlapped (an island shape). ), And the particle diameter of the fine particles of 8 to 120 ° refers to the diameter of the fine particles in which particle formation can be recognized in the above state.
【0040】3)次に、図2(c)に示すように、電子
放出部5を素子電極2及び3の間に電圧を印加し、電子
放出部形成用薄膜4を通電処理(フォーミング処理)す
ることにより形成した。フォーミング処理の電圧波形を
図5に示す。3) Next, as shown in FIG. 2C, a voltage is applied to the electron emitting portion 5 between the device electrodes 2 and 3, and the thin film 4 for forming the electron emitting portion is energized (forming). It formed by doing. FIG. 5 shows a voltage waveform of the forming process.
【0041】図5中、TI及びT2は電圧波形のパルス
幅とパルス間隔であり、本実施例ではT1を1ミリ秒、
T2を10ミリ秒とし、三角波の波高値(フォーミング
時のピーク電圧)は5Vとし、フォーミング処理は約1
×10-6torrの真空雰囲気下で60秒間行った。こ
のように作成された電子放出部3は、パラジウム元素を
主成分とする微粒子が分散配置された状態となり、その
微粒子の平均粒径は30Åであった。In FIG. 5, TI and T2 are the pulse width and pulse interval of the voltage waveform, and in this embodiment, T1 is 1 millisecond,
T2 is set to 10 milliseconds, the peak value of the triangular wave (the peak voltage at the time of forming) is set to 5 V, and the forming process is performed by about 1
This was performed for 60 seconds in a vacuum atmosphere of × 10 -6 torr. In the electron-emitting portion 3 thus prepared, fine particles mainly composed of palladium element were dispersed and arranged, and the average particle diameter of the fine particles was 30 °.
【0042】4)最後に図2(d)に示すように、パラ
ジウム(Pd)微粒子膜をマスクとしてリアクティブ・
イオン・エッチング(RIE)法によって絶縁性基板1
に溝部6を形成した。本発明では、溝部6の深さを限定
するものではないが、本実施例では200Åの深さのエ
ッチングを行なった。溝部の深さに関しては、あまり深
く形成しようとすると、超微粒子薄膜4にダメージを与
えてしまう危険性があり、またあまり浅すぎると、本発
明本来の効果が発揮されないため、20〜1000Å、
好ましくは100〜500Åの範囲にあることが望まし
い。4) Finally, as shown in FIG. 2 (d), reactive palladium (Pd) fine particle film is used as a mask.
Insulating substrate 1 by ion etching (RIE)
A groove 6 was formed in the groove. In the present invention, the depth of the groove 6 is not limited, but in this embodiment, the etching is performed to a depth of 200 °. Regarding the depth of the groove, if the groove is formed too deep, there is a risk of damaging the ultrafine particle thin film 4. If the groove is too shallow, the original effect of the present invention is not exhibited.
Preferably, it is in the range of 100 to 500 °.
【0043】また、本実施例では絶縁性基板に溝部を設
けるためにRIE法を用いたが、本発明はこれに限定さ
れるものではなく、酸やアルカリ等によるウエット・エ
ッチング法を用いてもよい。In this embodiment, the RIE method is used to form the groove in the insulating substrate. However, the present invention is not limited to this, and a wet etching method using an acid or an alkali may be used. Good.
【0044】以上のようにして作成された素子につい
て、その電子放出特性の測定を行った。図3に測定評価
装置の概略構成図を示す。The electron emission characteristics of the device fabricated as described above were measured. FIG. 3 shows a schematic configuration diagram of the measurement evaluation apparatus.
【0045】図3においても、1は絶縁性基板、2及び
3は素子電極、4は電子放出部を含む薄膜、5は電子放
出部を示し、8は素子に電圧を印加するための電源、9
は素子電流Ifを測定するための電流計、10は素子よ
り発生する放出電流Ieを測定するためのアノード電
極、11はアノード電極10に電圧を印加するための高
圧源、12は放出電流を測定するための電流計である。
電子放出素子の上記素子電流If、放出電流Ieの測定
にあたっては、素子電極2、3に電源8と電流計9とを
接続し、該電子放出素子の上方に電源11と電流計12
とを接続したアノード電極10を配置している。また、
本電子放出素子及びアノード電極10は真空装置内に設
置されており、その真空装置には不図示の排気ポンプ及
び真空計等の真空装置に必要な機器が具備れさており、
所望の真空下で本素子の測定評価を行えるようになって
いる。なお本実施例では、アノード電極と電子放出素子
間の距離を4mm、アノード電極の電位を1kV、電子
放出特性測定時の真空装置内の真空度を1×10-6to
rrとした。Also in FIG. 3, 1 is an insulating substrate, 2 and 3 are device electrodes, 4 is a thin film including an electron emitting portion , 5 is an electron emitting portion, 8 is a power supply for applying a voltage to the device, 9
Is an ammeter for measuring an element current If, 10 is an anode electrode for measuring an emission current Ie generated from the element, 11 is a high voltage source for applying a voltage to the anode electrode 10, and 12 is an emission current. It is an ammeter for performing.
In measuring the device current If and the emission current Ie of the electron-emitting device, a power supply 8 and an ammeter 9 are connected to the device electrodes 2 and 3, and a power supply 11 and an ammeter 12 are provided above the electron-emitting device.
Are connected to each other. Also,
The present electron-emitting device and the anode electrode 10 are installed in a vacuum device, and the vacuum device is provided with equipment necessary for a vacuum device such as an exhaust pump (not shown) and a vacuum gauge.
The device can be measured and evaluated under a desired vacuum. In this embodiment, the distance between the anode electrode and the electron-emitting device is 4 mm, the potential of the anode electrode is 1 kV, and the degree of vacuum in the vacuum device when measuring the electron emission characteristics is 1 × 10 −6 to.
rr.
【0046】以上のような測定評価装置を用いて、本電
子放出素子の素子電極2及び3の間に素子電圧を印加
し、その時に流れる素子電流If及び放出電流Ieを測
定したところ、図4に示したような電流−電圧特性が得
られた。本素子では、素子電圧8V程度から急激に放出
電流Ieが増加し、素子電圧16Vでは素子電流Ifが
2.2mA、放出電流Ieが11uAとなり、電子放出
効率η=Ie/If(%)は0.08%であった。The device voltage was applied between the device electrodes 2 and 3 of the electron-emitting device using the above-described measurement and evaluation apparatus, and the device current If and the emission current Ie flowing at that time were measured. The current-voltage characteristics as shown in FIG. In this device, the emission current Ie rapidly increases from an element voltage of about 8 V. At an element voltage of 16 V, the element current If becomes 2.2 mA, the emission current Ie becomes 11 uA, and the electron emission efficiency η = Ie / If (%) becomes 0. 0.08%.
【0047】また、同様な測定を同時に作製した数百個
の素子について行ったが、いずれも、素子電圧を16V
に保ったときの素子電流や、放出電流の値には大きな違
いはなかった。さらに素子の温度も基板に溝部のない場
合に比べて低くなり、電子放出素子を長時間にわたって
動作させたときの信頼性も良くなったことが確認され
た。The same measurement was carried out on several hundreds of simultaneously manufactured devices.
There was no significant difference in the values of the device current and the emission current when kept at. Further, the temperature of the device was also lower than when the substrate had no groove, and it was confirmed that the reliability when the electron-emitting device was operated for a long time was improved.
【0048】比較例1 実施例1において、絶縁性基板1上に溝部を形成しない
以外は、実施例1と同様に有機パラジウム(奥野製薬
(株)製、ccp−4230)含有溶液を用いて酸化パ
ラジウム(PdO)微粒子膜を形成して電子放出部を形
成した電子放出素子を得た。Comparative Example 1 The procedure of Example 1 was repeated, except that no groove was formed on the insulating substrate 1, and the solution was oxidized using a solution containing organic palladium (ccp-4230, manufactured by Okuno Pharmaceutical Co., Ltd.). An electron-emitting device in which an electron-emitting portion was formed by forming a palladium (PdO) fine particle film was obtained.
【0049】実施例1と同様に、この電子放出素子の素
子電極間に素子電圧を印加し、その時に流れる素子電流
If及び放出電流Ieを測定したところ、電子放出効率
η=Ie/If(%)は0.05%であった。In the same manner as in Example 1, a device voltage was applied between the device electrodes of the electron-emitting device, and the device current If and the emission current Ie flowing at that time were measured. As a result, the electron emission efficiency η = Ie / If (% ) Was 0.05%.
【0050】以上説明した実施例中、電子放出部を形成
する際に、素子の電極間に三角波パルスを印加してフォ
ーミング処理を行っているが、素子の電極間に印加する
波形は三角波に限定することはなく、矩形波など所望の
波形を用いても良く、その波高値及びパルス幅・パルス
間隔等についても上述の値に限ることなく、電子放出部
が良好に形成されれば所望の値を選択することができ
る。In the embodiment described above, when forming the electron-emitting portion, the forming process is performed by applying a triangular wave pulse between the electrodes of the device, but the waveform applied between the electrodes of the device is limited to a triangular wave. However, a desired waveform such as a rectangular wave may be used, and the peak value, pulse width, pulse interval, and the like are not limited to the above-described values. Can be selected.
【0051】[0051]
【発明の効果】以上説明した様に、本発明によれば、電
子放出が行われている状態においても素子の温度上昇が
小さく、電子放出の素子間のバラツキが小さく、電子放
出の効率が良好な電子放出素子を得ることができる。ま
た、本発明の製造方法によれば、上記の優れた特性を有
する電子放出素子を容易に得ることができる。As described above, according to the present invention, even when electrons are being emitted, the temperature rise of the elements is small, the variation between the elements in the electron emission is small, and the efficiency of the electron emission is good. It is possible to obtain a simple electron-emitting device. Further, according to the manufacturing method of the present invention, an electron-emitting device having the above excellent characteristics can be easily obtained.
【図1】本発明にかかわる基本的な電子放出素子の構成
を示す構成図である。FIG. 1 is a configuration diagram showing a configuration of a basic electron-emitting device according to the present invention.
【図2】本発明の電子放出素子の製造方法の一例を示す
工程図である。FIG. 2 is a process chart showing an example of a method for manufacturing an electron-emitting device of the present invention.
【図3】本発明の電子放出素子の電子放出特性を測定す
るための測定手段を表わす説明図である。FIG. 3 is an explanatory diagram showing a measuring means for measuring an electron emission characteristic of the electron emission element of the present invention.
【図4】本発明の電子放出素子の電流−電圧特性を示す
グラフである。FIG. 4 is a graph showing current-voltage characteristics of the electron-emitting device of the present invention.
【図5】実施例1の電子放出素子のフォーミング処理の
電圧波形を示すグラフである。FIG. 5 is a graph showing a voltage waveform of a forming process of the electron-emitting device of the first embodiment.
【図6】従来の表面伝導型電子放出素子の構成図であ
る。FIG. 6 is a configuration diagram of a conventional surface conduction electron-emitting device.
1 絶縁性基板 2,3 素子電極 4 薄膜 5 電子放出部 6 溝部 7 亀裂部を生じさせるためのパルス状電源 8 電子放出素子に電流を流すための電源 9 素子電流Ifを計測するための電流計 10 アノード電極 11 アノード電極に高電圧を印加するための高圧電源 12 放出電流Ieを測定するための電流計 DESCRIPTION OF SYMBOLS 1 Insulating substrate 2, 3 Element electrode 4 Thin film 5 Electron emission part 6 Groove part 7 Pulsed power supply for generating a crack part 8 Power supply for flowing current to an electron emission element 9 Ammeter for measuring element current If DESCRIPTION OF SYMBOLS 10 Anode electrode 11 High voltage power supply for applying high voltage to anode electrode 12 Ammeter for measuring emission current Ie
───────────────────────────────────────────────────── フロントページの続き (72)発明者 三留 正則 東京都大田区下丸子3丁目30番2号 キ ヤノン株式会社内 (72)発明者 松谷 茂樹 東京都大田区下丸子3丁目30番2号 キ ヤノン株式会社内 (72)発明者 長田 芳幸 東京都大田区下丸子3丁目30番2号 キ ヤノン株式会社内 (56)参考文献 特開 平2−247940(JP,A) 特開 昭63−274047(JP,A) (58)調査した分野(Int.Cl.7,DB名) H01J 1/316 H01J 9/02 H01J 29/04 H01J 31/12 ──────────────────────────────────────────────────続 き Continued on the front page (72) Inventor Masanori Midome 3-30-2 Shimomaruko, Ota-ku, Tokyo Inside Canon Inc. (72) Inventor Shigeki Matsuya 3-30-2 Shimomaruko, Ota-ku, Tokyo Within Canon Inc. (72) Inventor Yoshiyuki Osada 3-30-2 Shimomaruko, Ota-ku, Tokyo Canon Inc. (56) References JP-A-2-247940 (JP, A) JP-A-64-274047 ( JP, A) (58) Fields investigated (Int. Cl. 7 , DB name) H01J 1/316 H01J 9/02 H01J 29/04 H01J 31/12
Claims (5)
を有し、該導電性膜の一部に、該電極間に電圧を印加す
ることで形成された、亀裂部を有する電子放出素子にお
いて、該基板が導電性膜の亀裂部内で溝部を有すること
を特徴とする電子放出素子。1. A conductive film is provided between a pair of electrodes on an insulating substrate , and a voltage is applied to a part of the conductive film between the electrodes.
An electron-emitting device having a crack formed by the above-mentioned method, wherein the substrate has a groove in the crack of the conductive film .
を特徴とする請求項1に記載の電子放出素子。2. The electron-emitting device according to claim 1, wherein the conductive film is formed of a fine particle film.
性基板上に―対の電極を形成する工程と、該電極間に導
電性膜を形成する工程と、該電極間に電圧を印加するこ
とで該導電性膜の一部に亀裂部を形成する工程と、該亀
裂部内の該基板の一部を除去し、該亀裂部内に溝部を形
成する工程とを有することを特徴とする電子放出素子の
製造方法。3. A method for manufacturing an electron-emitting device, comprising: forming a pair of electrodes on an insulating substrate, forming a conductive film between the electrodes, and applying a voltage between the electrodes. Forming a crack in a part of the conductive film, and removing a part of the substrate in the crack to form a groove in the crack. Manufacturing method.
し、前記亀裂部内に溝部を形成する工程が、前記導電性
膜をマスクとしてエッチングを行う工程であることを特
徴とする請求項3に記載の電子放出素子の製造方法。4. The step of removing a part of the substrate in the crack and forming a groove in the crack is a step of etching using the conductive film as a mask. 3. The method for manufacturing an electron-emitting device according to item 1.
プロセスまたはウエット・エッチング・プロセスにより
行うことを特徴とする請求項4に記載の電子放出素子の
製造方法。5. The method according to claim 1, wherein said etching is a dry etching.
The method according to claim 4, wherein the method is performed by a process or a wet etching process.
Priority Applications (1)
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JP23596493A JP3147267B2 (en) | 1993-08-30 | 1993-08-30 | Electron emitting device and method of manufacturing the same |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
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JP23596493A JP3147267B2 (en) | 1993-08-30 | 1993-08-30 | Electron emitting device and method of manufacturing the same |
Publications (2)
Publication Number | Publication Date |
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JPH0765703A JPH0765703A (en) | 1995-03-10 |
JP3147267B2 true JP3147267B2 (en) | 2001-03-19 |
Family
ID=16993825
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JP23596493A Expired - Fee Related JP3147267B2 (en) | 1993-08-30 | 1993-08-30 | Electron emitting device and method of manufacturing the same |
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Families Citing this family (4)
Publication number | Priority date | Publication date | Assignee | Title |
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US6246168B1 (en) | 1994-08-29 | 2001-06-12 | Canon Kabushiki Kaisha | Electron-emitting device, electron source and image-forming apparatus as well as method of manufacturing the same |
JP3154106B2 (en) * | 1998-12-08 | 2001-04-09 | キヤノン株式会社 | Electron-emitting device, electron source using the electron-emitting device, and image forming apparatus using the electron source |
JP3647436B2 (en) | 2001-12-25 | 2005-05-11 | キヤノン株式会社 | Electron-emitting device, electron source, image display device, and method for manufacturing electron-emitting device |
US7230372B2 (en) * | 2004-04-23 | 2007-06-12 | Canon Kabushiki Kaisha | Electron-emitting device, electron source, image display apparatus, and their manufacturing method |
-
1993
- 1993-08-30 JP JP23596493A patent/JP3147267B2/en not_active Expired - Fee Related
Also Published As
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JPH0765703A (en) | 1995-03-10 |
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