JP3450425B2 - Electron source, method of manufacturing the same, and image forming apparatus - Google Patents

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an electron source and an image forming apparatus such as a display device using the same, and more particularly to an electron source provided with a large number of surface conduction electron-emitting devices using fine particles as electron-emitting portions. The present invention also relates to an image forming apparatus such as a display device using the same and a manufacturing method thereof.

[0002]

2. Description of the Related Art Conventionally, two types of electron emitters, a thermoelectron source and a cold cathode electron source, are known. The cold cathode electron source is a field emission type (hereinafter referred to as FE type), metal / insulating layer /
There are a metal type (hereinafter referred to as MIM type), a surface conduction electron-emitting device (hereinafter referred to as SCE), and the like.

An example of the FE type is reported by Dyke et al. (W.
P. Dyke and WW Dolan, "Field emission", Advance
in Electron Physics, 8, 89 (1956)), S
Report of pindt (CA Spindt, "PHYSICAL Properties of
thin-film field emission cathodes with molybdeniu
m cones ", J. Appl. Phys., 47, 5248 (1976)) and the like are known.

As an example of the MIM type, a report by Mead (C.
A. Mead, "The tunnel-emission amplifier", J. Appl.
Phys., 32, 646 (1961)) and the like are known.

As an example of the SCE type, a report by Elinson (MI Elinson, Radio Eng. Electron Phys., 10 (196
5)), etc.

The SCE type utilizes a phenomenon in which electron emission occurs when a current is passed through a thin film having a small area formed on a substrate in parallel with the film surface. As the surface conduction electron-emitting device, one using the SnO ₂ thin film described in the above-mentioned Erinson report, one using an Au thin film (G. Di
ttmer, Thin Solid Films, 9, 317 (1972)), In ₂ O ₃
/ SnO ₂ thin film (M. Hartwell and CG Fon
stad, IEEE Trans. ED Conf., 519 (1975)), by carbon thin film (Araki et al., Vacuum, Vol. 26, No. 1, 2)
2 (1983)) and the like are reported.

FIG. 12 shows the structure of the Hartwell device described above as a typical device structure of these surface conduction electron-emitting devices. In the figure, 1 is an insulating substrate. Reference numeral 2 is a thin film for forming an electron emitting portion, which is composed of a metal oxide thin film or the like formed by sputtering on an H-shaped pattern, and the electron emitting portion 3 is formed by an energization process called forming described later. In addition, L1 in the figure is 0.5 to 1
mm and W are set to 0.1 mm.

Conventionally, in a typical surface conduction electron-emitting device by the present applicant, the electron-emitting portion is formed in advance by subjecting the thin film 2 for forming the electron-emitting portion to an energization process called forming before the electron emission. It was common.
That is, the forming means that a voltage is applied to both ends of the electron emitting portion forming thin film 2 to locally destroy, deform or alter the electron emitting portion forming thin film, and an electron having a high electrical resistance is formed. That is, the emission part 3 is formed.
In the electron emitting portion 3, a crack is generated in a part of the electron emitting portion forming thin film 2, and electrons are emitted from the vicinity of the crack. Thus, the electron-emitting-portion-forming thin film 2 including the electron-emitting portions formed by forming is the thin film including the electron-emitting portions. The surface conduction electron-emitting device that has been subjected to the forming treatment is one in which electrons are emitted from the electron-emitting device 3 described above by applying a voltage to the thin film 4 including the electron-emitting device and applying a current to the device. is there.

The above-mentioned surface conduction electron-emitting device has an advantage that a large number of devices can be arrayed and formed in a large area because of its simple structure and easy manufacture. Therefore, various applications utilizing the characteristics are being researched, and examples thereof include a charged beam source and a display device. An example of arranging a large number of surface conduction electron-emitting devices is an electron source in which surface conduction electron-emitting devices are arranged in parallel and a plurality of rows in which both ends of each element are connected by wiring are arranged. (For example, those described in JP-A No. 1-031332). Further, in particular, in image forming apparatuses such as display devices, in recent years, flat panel display devices using liquid crystal have been used as CRTs.
However, since it is not a spontaneous emission type,
There are problems such as having to have a backlight and the like, and development of a spontaneous emission type display device has been desired. An image forming apparatus, which is a display apparatus in which a large number of surface conduction electron-emitting devices are arranged and a phosphor that emits visible light by the electrons emitted from the electron sources, is relatively easy to use in an image forming apparatus. Is a self-luminous display device that can be manufactured in a simple manner and has excellent display quality (for example, US Pat.
No. 66883).

The features of the structure and manufacturing method of the surface conduction electron-emitting device are as follows.

1) The thin film 2 for forming an electron emission portion before energization treatment called forming is made of a thin film of fine particles formed by dispersing a fine particle dispersion, or fine particles formed by heating and baking an organic metal or the like. Basically, it is composed of fine particles such as a thin film.

2) After energizing treatment called forming,
Both the electron emitting portion 3 and the thin film 4 including the electron emitting portion are basically composed of fine particles.

10 (a) and 10 (b) are a plan view and a sectional view showing the structure of a basic planar surface conduction electron-emitting device. The basic configuration of the element will be described with reference to FIG.

In FIG. 10, 1 is an insulating substrate, 5 and 6 are device electrodes, 4 is a thin film including an electron emitting portion, and 3 is an electron emitting portion.

An example of the manufacturing procedure of the electron-emitting device having the electron-emitting portion 3 will be described below with reference to FIG. Figure 11
In the above, 2 is a thin film for forming an electron emitting portion, which is a fine particle film or the like. 1) After sufficiently cleaning the insulating substrate 1, a device electrode material is deposited and the device electrode material layer is lifted off by a photolithography technique to form device electrodes 5 and 6 on the surface of the insulating substrate 1. FIG. 11A). 2) A thin film containing a metal such as Pd as a main element is formed between the device electrodes 5 and 6 provided on the insulating substrate 1,
Patterning is performed to form the electron emission portion forming thin film 2 (FIG. 11B). 3) Subsequently, when an energization process called forming is performed between the device electrodes 5 and 6, the electron emitting portion 3 having a changed structure is formed at the site of the electron emitting portion forming thin film 2 (FIG. 11).
(C)).

[0016] Next, 1 of the electron source using such an element
A cross-sectional view of an example is shown in FIG. 1, 4, 5 and 6 in the figure
10 is the same as in FIG. 10, reference numeral 72 is a lower wiring, 73 is an upper wiring, 111 is an interlayer insulating layer, and 112 is a contact hole for electrical connection between the element electrode 5 and the lower wiring 72.

Next, an example of a method of manufacturing such an electron source will be described with reference to FIG.

After forming a lower wiring 72 of a predetermined pattern on the substrate 1 and depositing an interlayer insulating layer 111, a contact hole 112 is formed in a predetermined portion on the lower wiring 72 (FIG. 14).
(A)). Next, after forming a pattern to be the device electrodes 5 and 6 and the gap G between the device electrodes with a photoresist, the electrode material is laminated, the photoresist pattern is dissolved with an organic solvent, and the deposited film is lifted off to form a gap G. The device electrodes 5 and 6 which are opposed to each other are formed (FIG. 14).
(B)). After that, the upper wiring and the electron emitting portion are formed, and finally the contact hole is filled to form an electron source (FIG. 14C).

[0019]

[SUMMARY OF THE INVENTION However, in the above example, failure or insulation due to pinholes and dust of the interlayer insulating layer, a short between the upper and lower wiring due to poor coverage of the lower wiring may occur. In addition, when the wiring and element electrode patterns are formed by lift-off, film peeling may occur due to poor adhesion to the base. Further, when the element electrode is patterned by lift-off, the electrode material wraps around under the photoresist during film formation, and after removing unnecessary portions by lift-off, a protruding structure (hereinafter referred to as a burr) is formed on the upper end of the element electrode. In some cases, when the electron emitting portion material was applied in a subsequent operation, only the portion having the burr was thickly applied, and the characteristics of the device were significantly deteriorated. In addition, abnormal discharge may occur from this burr. Furthermore, in an image forming apparatus in which a large number of such surface conduction electron-emitting devices are arranged in a matrix, variations in the characteristics of each device and light emission at points other than the non-emission point or the designated emission point due to a short circuit between wirings may occur. This causes a problem of decrease in yield, making it difficult to manufacture a large-screen matrix electron source and an image forming apparatus using the matrix electron source.

Therefore, the present invention has been made to solve the above-mentioned problems, and the specific objectives thereof are the following six points. (1) Reduce shorts between wires. (2) Good coverage of element electrodes and upper wiring. (3) A device electrode pattern without burrs is formed to provide a uniform electron-emitting device that does not depend on the shape of burrs. (4) To improve the adhesion with the underlying material when forming the pattern by lift-off. (5) To reduce variations in characteristics when using elements having the same characteristics. (6) Reduce abnormal discharge.

That is, the present invention relates to the above (1) to (1).
An object of the present invention is to provide an electron source that simultaneously satisfies (6), a method of manufacturing the electron source, and an image forming apparatus.

[0022]

The present invention is first SUMMARY OF THE INVENTION, (1) on an insulating substrate, the column direction wiring through an insulating layer on top of the row direction wiring and the row wiring are provided, (2) across the electron-emitting portion faces the device electrodes one pair, the one of the device electrodes of the pair of element electrodes through a contact hole provided in the <br/> insulating layer Whereabouts
Is connected to a counter wiring, and the other of the pair of device electrodes is connected.
An electron source in which the surface conduction electron-emitting devices are a plurality arranged in a matrix in which the element electrodes are the column direction wirings and connections, in that the contact hole is a multistage shape having one or more steps A featured electron source is provided.

[0023] The present invention secondly, (1) on an insulating substrate, a row direction wiring and <br/> formed in a predetermined pattern, (2) the insulating substrate formed of the row direction wirings above
Depositing an interlayer insulating layer, (3) the interlayer insulating layer the row direction the contact hole is formed an opening leading to wiring, (4) a pair of elements that face each other with a predetermined gap in a predetermined pattern the electrodes plurality formation, (5) to form a column direction wiring in a predetermined pattern, (6) to form the electron emission portion between the pair of device electrodes,
A method of manufacturing an electron source to arrange a large number of surface conduction electron-emitting devices in a matrix, forming a contact hole in the interlayer insulating layer was deposited on (a) the insulating substrate wherein For interlayer insulation layer
The interlayer insulating layer was removed from the masked for forming the contact hole, and removing the mask,
After forming the contact hole , (b) the interlayer insulating layer in which the contact hole is formed
Sedimentary another interlayer insulating layer thereon and the contact hole
And the product, inside of the contact hole and the contactor
Another layer insulation around the area smaller than the
A layer is provided with a mask for forming the contact hole into a step shape, and then the contact of the another interlayer insulating layer is formed.
Remove portions of the small area of the inner hole, is performed at least once a series of steps of removing the mask, the manufacture of an electron source, characterized in that a multi-stage shape with one or more steps of the contact holes Provide a way.

By the above electron source and the manufacturing method thereof, the inter-wiring leak through the interlayer insulating film is reduced, and good coverage can be achieved in the step portion of the device electrode and the upper wiring. At this time, it is possible to provide a step even if the mask for forming the contact hole is made wider to the upper layer, but the lower layer should be left by over-etching while the upper insulating layer is processed by dry etching. Etching may proceed to the insulating layer, resulting in an irregular shape of the step or no step being formed. Further, during the subsequent formation of the element electrode and the dry etching of the step portion, since the surface of the step portion is roughened by the dry etching before that, the surface of the element electrode is not flat, and a problem such as etching residue occurs. Therefore, it is preferable to form the contact hole forming mask so as to be narrower toward the upper layer, and the method is performed in the present invention.

Thirdly, the present invention provides the above manufacturing method,
Provided is a method for manufacturing an electron source in which a device electrode is patterned by a dry etching method.

[0026]

The present invention further provides an image forming apparatus having at least a phosphor and an electron source produced by any one of the above methods.

The present invention will be described in detail below with reference to the drawings.

The basic structure of the element used in the electron source of the present invention is the same as that shown in FIG. As the insulating substrate 1 of the device, quartz glass, glass with a reduced content of impurities such as sodium, soda lime glass, a soda lime glass substrate laminated with SiO ₂ formed by a sputtering method, and ceramics such as alumina. Etc.

The material of the element electrodes 5 and 6 facing each other may be any material as long as it has conductivity. For example, Ni, Cr, Au, Mo,
Metals or alloys such as W, Pt, Ti, Al, Cu and Pd, as well as Pd, Ag, Au, RuO ₂ , Pd-Ag.
Examples thereof include a printed conductor composed of a metal or a metal oxide such as the above and glass, a transparent conductor such as In ₂ O ₃ —SnO ₂ and a semiconductor conductor material such as polysilicon. The element electrode interval L1 is several hundred Å to several hundred microns, and the photolithography technology that is the basis of the manufacturing method of the element electrodes, that is, the performance of the exposure device and the etching method, the voltage applied between the element electrodes and the electron emission. Although it is set according to the possible electric field strength, etc., it is preferably several microns to several tens of microns. The element electrode length W1 and the film thickness d of the element electrodes 5 and 6 are appropriately designed in consideration of the resistance value of the electrodes, the connection with the upper and lower wirings, and the arrangement of a large number of electron sources. The length W1 is several microns to several hundreds of microns, and the film thickness of the device electrodes 5 and 6 is preferably several hundreds Å to several microns.

The thin film 4 including an electron emitting portion, which is provided on the insulating substrate 1 and is grounded between the opposing device electrodes 5 and 6 and on the device electrodes 5 and 6, includes the electron emitting portion 3. Not only the case shown in FIG. 10B, but also the device electrodes 5 and 6 may not be grounded. That is, it is a case where the electron emission portion forming thin film 2 and the opposing device electrodes 5 and 6 are laminated in this order on the insulating substrate 1. In addition, depending on the manufacturing method, the entire space between the opposing device electrodes 5 and 6 may function as an electron emitting portion. The film thickness of the thin film 4 including the electron emitting portion is several Å to several thousand Å, preferably several tens Å to several hundred Å. It is appropriately set depending on the step coverage to the device electrodes 5 and 6, the resistance value between the electron emitting unit 3 and the device electrodes 5 and 6, the particle size of the conductive fine particles in the electron emitting unit 3, the energization processing conditions described later, and the like. Its resistance is 1
A sheet resistance value of 0 ³ to 10 ⁷ Ω / □ is shown.

Specific examples of the material forming the thin film 4 including the electron emitting portion include Pd, Ru, Ag, Au and T.
i, In, Cu, Cr, Fe, Zn, Sn, Ta, W,
Metals such as Pb, PdO, SnO ₂ , In ₂ O ₃ , PbO,
Oxides such as Sb ₂ O ₃ , HfB ₂ , ZrB ₂ , LaB ₆ , C
borides such as eB ₆ , YB ₄ , GdB ₄ , TiC, ZrC,
Carbides such as HfC, TaC, SiC, WC, TiN, Z
It is a nitride such as rN or HfN, a semiconductor such as Si or Ge, carbon, AgMg, NiCu, PbSn or the like, and is composed of a fine particle film.

The fine particles described here are a film in which a plurality of fine particles are aggregated, and the fine structure thereof is not only a state in which the fine particles are individually dispersed and arranged but also a state in which the fine particles are adjacent to each other or overlap each other (island shape). (Including)).

The electron emitting portion 3 is composed of a large number of conductive fine particles having a particle diameter of several Å to several thousand Å, preferably 5 Å to 200 Å, and the film thickness of the thin film 4 including the electron emitting portion and energization processing conditions described later, etc. It depends on the manufacturing method, etc., and is set appropriately.

The material forming the electron emitting portion 3 is similar to some or all of the elements forming the thin film 4 including the electron emitting portion.

Various methods are conceivable as a method of manufacturing an electron-emitting device having the electron-emitting portion 3, one example of which is shown in FIG. In FIG. 11, reference numeral 2 denotes a thin film for forming an electron emitting portion, which is, for example, a fine particle film.

The method of manufacturing the element will be described below with reference to FIG. 1) The insulating substrate 1 is thoroughly washed with a detergent, pure water and an organic solvent, and then a device electrode material is deposited by a vacuum vapor deposition method, a sputtering method or the like. Next, a pattern to form the device electrodes 5 and 6 and the gap L1 between the device electrodes is formed from photoresist, and dry etching is performed. After the dry etching is completed, the photoresist is removed with an organic solvent or the like to form the device electrodes 5 and 6 on the surface of the insulating substrate 1 (FIG. 11A).

By forming the element electrode in this way, the above-described burr formation which is a problem in forming the electrode by lift-off can be prevented. 2) By applying an organic metal solution between the device electrodes 5 and 6 provided on the insulating substrate 1 and leaving it to stand,
An organometallic thin film is formed. The organometallic solution is the above-mentioned Pd, Ru, Ag, Au, Ti, In, Cu, C.
It is a solution of an organic compound containing a metal such as r, Fe, Zn, Sn, Ta, W, or Pb as a main element. Then, the organic metal thin film is heat-fired.

Next, patterning is performed by lift-off, etching or the like to form the electron emitting portion forming thin film 2 (FIG. 11B). When etching is used, for example,
A pattern to be the electron emission portion forming thin film 2 is formed from a photoresist, and dry etching is performed. After the dry etching is completed, the photoresist is removed. Various methods can be used for removing the photoresist, but UV / O ₃
It is preferably removed by heating at 0.99 ° C. or less at Assi ing process. Although there is no particular limitation on the material of the photoresist, 0.99 ° C. in UV / O ₃ ASSY ing process
Those that can be easily removed below are preferred. 3) Subsequently, an energization process (forming) with a pulsed or high-speed rising voltage is performed between the device electrodes 5 and 6 by a power source (not shown), and electrons having a changed structure are formed at the site of the electron emission part forming thin film 2. The emission part 3 is formed (FIG. 11).
(C)). The electron-emitting portion 3 is a portion whose structure is changed by locally destroying, deforming or altering the electron-emitting portion forming thin film 2 by an electric current treatment, and is constituted by conductive fine particles according to the present invention. Acknowledged.

FIG. 4 shows an example of the voltage waveform of the forming process. In FIG. 4, T1 and T2 are the pulse width and pulse interval of the voltage waveform, where T1 is 1 microsecond to 10 milliseconds, and T2 is
Is 10 microseconds to 100 milliseconds, the peak value of the triangular wave (peak voltage during forming) is about 4 to 10 V, and the forming process is appropriately set in about several tens of seconds in a vacuum atmosphere.

When forming the electron emitting portion described above,
Forming is performed by applying a triangular wave pulse between the electrodes of the element, but the waveform applied between the electrodes of the element is not limited to the triangular wave, and a desired waveform such as a rectangular wave may be used. The pulse width, the pulse interval, and the like are not limited to the above values, and a desired value can be selected as long as the electron emitting portion is well formed.

The basic characteristics of the electron-emitting device produced by the above-described device structure and manufacturing method will be described with reference to FIGS. 3 and 5.

FIG. 3 is a schematic block diagram of a measurement / evaluation apparatus for measuring electron emission characteristics of the device of FIG. In FIG. 3, 1 is an insulating substrate, 5 and 6 are device electrodes, 4 is a thin film including an electron emitting portion, and 3 is an electron emitting portion. Also,
31 is a power supply for applying the element voltage Vf to the element, 30
Is an ammeter for measuring the device current If flowing through the thin film 4 including the electron emission part between the device electrodes 5 and 6, 34 is an anode electrode for capturing the emission current Ie emitted from the electron emission part of the device, 33 is a high voltage power supply for applying a voltage to the anode electrode 34, and 32 is an ammeter for measuring the emission current Ie emitted from the electron emission portion 3 of the device.

To measure the above device current If and emission current Ie of the electron-emitting device, the power supply 31 is applied to the device electrodes 5 and 6.
And an ammeter 30 are connected to each other, and an anode electrode 34 to which a power source 33 and an ammeter 32 are connected is arranged above the electron-emitting device. Further, the electron-emitting device and the anode electrode 34 are installed in a vacuum device, and the vacuum device is provided with equipment necessary for the vacuum device such as an exhaust pump and a vacuum gauge (not shown), so that a desired vacuum can be obtained. The device can be measured and evaluated below.

The voltage of the anode electrode is 1 kV to 1
0 kV, distance H between anode electrode and electron-emitting device is 3 m
Set in the range of m to 8 mm.

FIG. 5 shows a typical example of the relationship between the emission current Ie and the device current If and the device voltage Vf measured by the measurement / evaluation apparatus shown in FIG. Note that FIG.
Since the magnitude of Ie is different, it is shown in arbitrary units, and the emission current Ie is about 1/2000 of the device current If. As is clear from FIG. 5, this electron-emitting device has the following three characteristics with respect to the emission current Ie.

First of all, in the present device, when a device voltage higher than a certain voltage (called threshold voltage; Vth in FIG. 5) is applied, the emission current Ie rapidly increases, while at the threshold voltage Vth or less, the emission current Ie increases. Almost no Ie is detected. That is, it is a non-linear element having a clear threshold voltage Vth with respect to the emission current Ie.

Secondly, since the emission current Ie depends on the element voltage Vf, the emission current Ie can be controlled by the element voltage Vf.

Thirdly, the emitted charges trapped in the anode electrode 34 depend on the time for applying the device voltage Vf. That is, the amount of charges captured by the anode electrode 34 can be controlled by the time for which the device voltage Vf is applied. Since the electron-emitting device according to the present invention has the above characteristics, it can be expected to be applied to various fields.

FIG. 5 shows an example of the characteristic (referred to as MI characteristic) in which the element current If monotonously increases with respect to the element voltage Vf. In addition to this, the element current If is relative to the element voltage Vf. In some cases, a voltage control type negative resistance characteristic (referred to as VCNR characteristic) is exhibited. Also in this case, the electron-emitting device has the above-mentioned three characteristics.

Next, an electron source of the present invention in which a large number of surface conduction electron-emitting devices are arranged in a matrix and a method for producing the same will be described with reference to FIGS. 1 and 2, and the electron source of the present invention will be used. FIG. 7 shows an example of such an image forming apparatus.

A partial plan view of one embodiment of the electron source of the present invention is shown in FIG. 2 (a), and a sectional view taken along the line AA 'in FIG. 2 (a) is shown in FIG. 2 (b). Here, 1 is a substrate, and 72 is FIG.
X direction wiring (lower wiring) corresponding to Dxm of No. 73 is shown in FIG.
In the Y direction corresponding to Dyn (upper wiring), 4 is a thin film including an electron emitting portion, 5 and 6 are element electrodes, 111 is an interlayer insulating layer, 112 is an electrical connection between the element electrode 5 and the lower wiring 72. This is a contact hole for.

Next, one embodiment of the method for manufacturing an electron source of the present invention will be described with reference to FIG.

(Step-a) A pattern, which is to be the lower wiring 72, is formed of photoresist on the substrate 1 on which an insulating material film such as a silicon oxide film is formed on a cleaned blue plate glass or the like by a sputtering method or the like. Next, Reactive Ion
Etching (Reactive Ion Etching; RIE) or U
V / O ₃ ashing treatment is preferably performed. Next, after laminating the wiring material by vacuum evaporation or the like, the photoresist pattern is removed with an organic solvent or the like, and the deposited wiring material layer is lifted off to obtain the lower wiring 72 having a desired shape. Here, if the RIE process or the UV / O ₃ ashing process is performed before stacking the wiring material by vacuum deposition or the like, the adhesion of the lower wiring after lift-off becomes good, and film peeling or the like can be prevented. it can.

(Step-b) Next, an interlayer insulating layer 111 made of a silicon oxide film or the like is deposited by an RF sputtering method or the like to form a photoresist pattern for forming a contact hole 112, and using it as a mask, the interlayer insulating layer is formed. The contact hole 112 is formed by removing 111. The interlayer insulating film 111 is preferably removed by etching, more preferably RIE.

(Step-c) Further, an interlayer insulating layer 111 such as a silicon oxide film is deposited again. As a result, it is possible to fill in pinholes or the like that may occur in step-b that causes a leak between the upper and lower wirings. Next, the photoresist pattern 11 for forming the contact hole 112
3 is made narrower than that in the region of the contact hole formed in step-b.

[0057] (Step -d) above the photoresist pattern as a mask, the interlayer insulating layer 111 to form a contact hole 112 in the same manner as in the back step -b. By thus forming the contact hole in two steps, the contact hole is formed as shown in FIG.
As shown in (d), the shape has a step. By forming the contact hole in such a shape, it becomes possible to improve the coverage of the subsequent element electrode and upper wiring, and avoid disconnection at the step portion. Although the case where there is one step is described here, coverage can be further improved by providing a larger number of steps (that is, forming contact holes in three or more steps).

(Step-e) Further, the device electrode material is laminated, and then a pattern to be the device electrodes 5 and 6 and the device electrode gap G is formed by photoresist and dry etching is performed. After the dry etching is completed, the photoresist is removed with an organic solvent or the like to form the device electrodes 5 and 6 facing each other with a gap G therebetween.

(Step-f) On the device electrodes 5 and 6, a pattern to be an electrode for filling the upper wiring 73 and the contact hole 112 is formed with photoresist. Next, as in the case of the step-a, preferably, the adhesion of the upper wiring after lift-off is improved,
In order not to cause peeling or the like, it is preferable to perform or UV / O ₃ Assi ring process for etching by RIE.

Next, wiring materials are laminated by vacuum vapor deposition or the like, the photoresist pattern is dissolved in an organic solvent, and unnecessary portions are removed by lift-off to form the upper wiring 73 and the buried electrode of the contact hole having a desired shape. To do.

(Step-g) An organometallic solution such as organopalladium is applied to the surface of the substrate and heated and baked. Next, a pattern to be the electron emission portion forming thin film 4 is formed from photoresist and dry etching is performed. After completion of the dry etching, the photoresist is removed by treatment UV / O ₃ ASSY ring.

Next, a voltage is applied between the electrodes 5 and 6 under vacuum to energize (form) the electron emission part forming thin film 2 to form the electron emission part 3. The voltage waveform of the forming process is the same as that in the above-described element formation.

Next, one embodiment of the image forming apparatus using the electron source of the present invention will be described with reference to FIG.

In the figure, reference numeral 81 denotes a rear plate, to which a substrate having a large number of surface conduction electron-emitting devices formed by the above method is fixed. Above the rear plate, the glass substrate 8
A face plate 86 having a structure in which a fluorescent film 84 and a metal back 85 are formed on the inner surface of 3 is arranged via a support frame 82. 74 is an electron-emitting device, and 72 and 73 are wirings in the X and Y directions, respectively. The face plate 86 may be further provided with a transparent electrode on the outer surface side of the fluorescent film 84 in order to enhance the conductivity of the fluorescent film 84.

The structure described above is a schematic structure necessary for manufacturing an image forming apparatus used for display or the like, and detailed parts such as materials of respective members are not limited to those described above. The device described above can also be used as an alternative light source such as a light emitting diode of an optical printer including a photosensitive drum and a light emitting diode. At that time, by appropriately selecting the above-mentioned m row-direction wirings and n column-direction wirings, it can be applied not only as a linear light source but also as a two-dimensional light emitting source.

[0066]

EXAMPLES The present invention will be specifically described below with reference to examples.

Reference Example 1 A reference example will be described before describing the examples. In this reference example, there is no upper and lower wiring and an insulating layer, and a single element manufactured in the same manner as the surface conduction electron-emitting device of the present invention, that is, an electron source of only forming a thin film including an electron-emitting portion on the device electrode The production is shown.

The manufacturing procedure of the element in this embodiment will be described below in sequence with reference to FIG.

Step-a On a substrate 1 in which a 0.5 μm thick silicon oxide film is formed on a cleaned soda-lime glass by a sputtering method, Ti having a thickness of 50 Å and Pt having a thickness of 300 Å are sequentially formed by the sputtering method. Laminated. Next, a pattern for forming the device electrodes 5 and 6 and the gap L1 between the device electrodes is formed by a photoresist (AZ137).
0, manufactured by Hoechst Co., Ltd.) and dry-etched. The dry etching is an ordinary parallel plate cathode coupled type apparatus using a turbo molecular pump and a rotary pump as a vacuum exhaust system, and Pt is a mixed gas of HBr / Ar and R
F power 100 W, gas pressure 2.5 Pa, Ti HBr
/ BCl ₃ mixed gas, RF power 150 W, gas pressure 2.5 Pa. After completion of the dry etching, the photoresist was removed with an organic solvent. At that time,
The device electrode spacing was 3 μm, and device electrodes 5 and 6 having a device electrode width of 300 μm were formed.

Step-b Organic palladium (ccp4320, manufactured by Okuno Chemical Industries Co., Ltd.) was spin-coated on the surface of the substrate with a spinner, and the temperature was 300 ° C.
Was heated and baked for 10 minutes. Thus formed,
The film thickness of the electron emission portion forming thin film 2 made of fine particles containing Pd as a main constituent element was about 100 Å, and the sheet resistance value was 5 × 10 ⁴ Ω / □. Incidentally, the fine particle film described here is a film in which a plurality of fine particles are gathered as described above, and as a fine structure thereof, not only a state in which the fine particles are dispersed and arranged but also a state in which the fine particles are adjacent to each other or overlap each other ( (Including islands), and the particle size refers to the diameter of fine particles whose particle shape can be recognized in the above state.

Step-c A pattern to be a thin film including an electron emitting portion is formed with a photoresist (OMR83 20 cp, manufactured by Tokyo Ohka Co., Ltd.) and dry etching is performed. Dry etching
It is a normal parallel plate cathode coupled type and uses a turbo molecular pump and a rotary pump for the vacuum exhaust system.
0sccm, gas pressure 4.5Pa, RF power 150W
For 3 minutes.

[0072] After completion of the dry etching, the photoresist by UV / O ₃ ASSY ring treatment, were removed by treatment for 30 minutes at 0.99 ° C..

The forming and electron emission characteristics of the electron source manufactured as described above were measured by using the measuring and evaluating apparatus shown in FIG.

In FIG. 3, 1 is an insulating substrate, 5 and 6 are device electrodes, 4 is a thin film including an electron emitting portion, and 3 is an electron emitting portion. Further, 31 is a power source for applying a device voltage Vf to the device, 30 is an ammeter for measuring a device current If flowing through the thin film 4 including the electron emitting portion between the device electrodes 5 and 6, and 34 is an electron of the device. Emission current I emitted from the emission part
An anode electrode for capturing e, 33 is a high-voltage power supply for applying a voltage to the anode electrode 34, and 32 is an ammeter for measuring the emission current Ie emitted from the electron emission portion 3 of the device.

The vacuum apparatus is equipped with equipment necessary for the vacuum apparatus, such as an exhaust pump and a vacuum gauge (not shown), so that the element can be measured and evaluated under a desired vacuum. .

In the vacuum device, the degree of vacuum is 10 ^-6 Torr.
After the pressure is reduced to the table, a current is applied between the device electrodes 5 and 6 by a pulsed or high-speed rising voltage from the power source 31 to locally change the structure of the electron emission portion forming thin film 2.
The electron emitting portion 3 was formed.

The resistance of the element manufactured in this example was about 400Ω in the atmosphere in the vacuum apparatus immediately before exhausting, and was 1 × 10 5.
After the pressure was reduced to ^-6 Torr, the electron emitting portion 3 was formed with a forming voltage of 5 V and a forming current of 20 mA.

In measuring the device current If and the emission current Ie of the electron-emitting device, the power supply 31 is applied to the device electrodes 5 and 6.
And an ammeter 30 are connected to each other, and an anode electrode 34 to which a power source 33 and an ammeter 32 are connected is arranged above the electron-emitting device. The electron-emitting device and the anode electrode 34 are installed in a vacuum device.

The characteristics of the electron-emitting portion after the above-mentioned forming were measured by measuring the voltage of the anode electrode at 1 kV and the distance H between the anode electrode and the electron-emitting device at 4 mm.
The current-voltage characteristics as shown in (4) were obtained. In this device, the emission current Ie rapidly increases from the device voltage of about 8 V, and becomes the device current If 2.2 mA and the emission current Ie 1.1 μA at the device voltage 14 V, and the electron emission efficiency η (Ie / If
(%)) Was 0.05%.

Reference Example 2 In the production of the electron source of Reference Example 1, the element electrode pattern was formed (step-a) as follows.

Step-a On the substrate 1 in which a 0.5 μm-thick silicon oxide film is formed on the cleaned soda lime glass by the sputtering method, patterns for forming the device electrodes 5 and 6 and the device electrode gap L1 are formed. It is formed with a photoresist (RD-2000N-41, manufactured by Hitachi Chemical Co., Ltd.), and a T-thickness of 50Å is formed by a sputtering method.
i, Pt having a thickness of 300 Å was sequentially laminated. The photoresist pattern was dissolved in an organic solvent, the Pt / Ti deposition film was lifted off, the device electrode spacing was set to 3 μm, and device electrodes 5 and 6 having a device electrode width of 300 μm were formed.

Other manufacturing steps were performed in the same manner as in Reference Example 1 to obtain an electron source.

The electron source manufactured in this manner is shown in FIG.
As described above, Pt / Ti sneaking under the photoresist at the time of forming the Pt / Ti film on the upper end portion of the device electrode remained as burr 7 even after the photoresist was removed with the organic solvent. Although this burr shape varies depending on the shape of the photoresist, the sputtering apparatus and the film forming conditions thereof, it may be as high as several hundred Å to the resist film thickness layer (several 1000 Å to several μm). When the spin coater spin-coats organic palladium on such a burr-like element electrode, it is applied thicker than when it is applied to a burr-free element electrode due to the liquid pool effect.

Using this measurement / evaluation apparatus shown in FIG. 3, the electron source was subjected to forming and electron emission characteristic measurement in the same manner as in Example 1. The element resistance was as low as about 100Ω in the atmosphere immediately before exhausting in a vacuum apparatus, and when forming was performed after decompressing to 1 × 10 ⁻⁶ Torr, the forming current increased to 80 mA at a forming voltage of 5V.

The characteristics of the electron-emitting portion after the above-mentioned forming were measured by measuring the voltage of the anode electrode at 1 kV and the distance H between the anode electrode and the electron-emitting device at 4 mm. The device current If at a device voltage of 14 V was 2. 0 mA, the emission current are both lower than the device of example 1 in I _e 0.80μA, the electron emission efficiency η (Ie / If (%) ) is also as low as 0.04%.

(Example 1 ) In this example, an electron source (having the structure of FIG. 6) of the present invention in which a large number of surface conduction electron-emitting devices are arranged in a matrix and a method for manufacturing the same will be described.

FIG. 6 is a schematic plan view showing the overall structure of this electron source, FIG. 2 (a) is a plan view of a part of the electron source, and FIG. 2 (b) is FIG. 2 (a). 3 is a sectional view taken along line AA ′ of FIG. In these figures, 1 is a substrate, 4 is a thin film including an electron emitting portion, 5 and 6 are device electrodes, 72 is an X-direction wiring (lower wiring), 73 is a Y-direction wiring (upper wiring), and 74 is a surface conduction type. Electron-emitting device, 75 is connection, 111 is an interlayer insulating layer, 1
Reference numeral 12 is a contact hole for electrically connecting the device electrode 5 and the lower wiring 72.

Next, the manufacturing procedure of this electron source will be specifically described in the order of steps with reference to FIG.

Step-a The lower wiring 7 is formed on the substrate 1 in which a 0.5 μm thick silicon oxide film is formed on the cleaned soda-lime glass by the sputtering method.
The pattern that should become 2 is photoresist (RD-2000
N-41, manufactured by Hitachi Chemical Co., Ltd.). Next, by RIE using O ₂ gas, etching was performed for 1 minute under conditions of RF power of 150 Wm and gas pressure of 4 Pa. RIE
Instead of, 60 ° C. in UV / O ₃ Assi ring processing catcher over /
The treatment may be performed for 10 minutes.

Next, Ti of 100 Å thickness, Au of 6000 Å thickness and Cr of 300 Å thickness were sequentially laminated by vacuum evaporation, and then the photoresist pattern was dissolved with an organic solvent to form a Cr / Au / Ti deposited film. Lifting off was performed, and the lower wiring 72 having a desired shape was formed. At this time, O ₂ R
By performing the IE process or the UV / O ₃ ashing process, the adhesion of the lower wiring after the lift-off becomes good,
No film peeling occurred.

Step-b Next, an interlayer insulating layer 111 made of a silicon oxide film having a thickness of 6000 Å is deposited by RF sputtering, and a photoresist pattern for forming a contact hole 112 in the silicon oxide film is formed in a size of 50 μm × 140 μm. Then, the inter-layer insulating layer 111 was etched using this as a mask to form a contact hole 112. The etching was performed by the RIE method using CF ₄ and H ₂ gas.

Step-c Further, an interlayer insulating layer 111 made of a silicon oxide film having a thickness of 6000Å was deposited again by the RF sputtering method. Next, a photoresist pattern 113 for forming the contact hole 112 in the silicon oxide film is formed with a vertical and horizontal dimension of 20 μm as compared with the contact hole formed in the step-b.
It was made to be narrow.

Step-d Using the photoresist pattern as a mask, the interlayer insulating layer 111 was again etched by RIE in the same manner as in Step-b to form a two-step contact hole 112.

Process-e Further, by sputtering, Ti having a thickness of 50Å and thickness of 300Å
Pt was sequentially deposited. Next, a pattern for forming the device electrodes 5 and 6 and the gap G between the device electrodes was formed with a photoresist (AZ1370, manufactured by Hoechst), and dry etching was performed. The dry etching is an ordinary parallel plate cathode coupling type apparatus using a turbo molecular pump and a rotary pump as a vacuum exhaust system. Pt is a mixed gas of HBr / Ar, RF power 100 W, gas pressure 2.5 Pa,
RF power of 15 with Ti mixed gas of HBr / BCl ₃
It was carried out at 0 W and a gas pressure of 2.5 Pa, respectively. After completion of the dry etching, the photoresist was removed with an organic solvent. At that time, the device electrodes 5 and 6 were formed such that the device electrode spacing was 3 μm and the device electrode width was 300 μm.

Step-f A pattern (RD-2000N-41, manufactured by Hitachi Chemical Co., Ltd.), which is to be an electrode for embedding the upper wiring 73 and the contact hole 112, is formed on the device electrodes 5 and 6. Next, by RIE using O ₂ gas, etching was performed for 1 minute under the conditions of RF power of 150 W and gas pressure of 4 Pa. UV / O ₃ Assi down instead of RIE
The treatment may be performed at 60 ° C. for 10 minutes.

Then, a T film having a thickness of 300 Å is formed by vacuum vapor deposition.
After sequentially stacking i and Au having a thickness of 10000Å, the photoresist pattern was dissolved in an organic solvent and unnecessary portions were removed by lift-off to form the upper wiring 73 and the contact hole embedded electrode having a desired shape. At this time as well, the O ₂ RIE treatment or the UV / O ₃ ashing treatment was performed before the vapor deposition, so that the adhesion of the upper wiring after the lift-off was improved and no film peeling occurred.

Step-g Organopalladium (ccp4230, manufactured by Okuno Chemical Industries Co., Ltd.) was spin-coated on the surface of the substrate by a spinner to give 300
A heating and baking treatment was performed at 10 ° C. for 10 minutes. The film thickness of the electron emission part forming thin film material layer 2a formed of fine particles containing Pd as a main constituent element was about 100Å, and the sheet resistance value was 5 × 10 ⁴ Ω / □.

Further, a pattern to be the thin film 4 including an electron emitting portion was formed with a photoresist (OMR8320cp, manufactured by Tokyo Ohka Co., Ltd.) and dry etching was performed.
The dry etching is an ordinary parallel plate cathode coupled type, a device using a turbo molecular pump and a rotary pump in the vacuum exhaust system, Ar flow rate 20 sccm, gas pressure 4.5P.
a, RF power was 150 W for 3 minutes.

[0099] After completion of the dry etching, the photoresist was removed by treatment for 30 minutes at 0.99 ° C. at UV / O ₃ Assi ring process.

Through the above steps, the lower wiring 72, the interlayer insulating layer 111, the upper wiring 73, the device electrodes 5 and 6, the electron emitting portion forming thin film and the like were formed on the insulating substrate 1.

The electron emission characteristics of the electron source manufactured as described above were measured using the same measurement and evaluation device as in FIG. After exhausting with a vacuum pump and reaching a sufficient degree of vacuum, terminal D
A voltage was applied between the electrodes 5 and 6 of the electron-emitting device 74 through x1 to Dxm and Dy1 to Dyn to energize (form) the electron-emitting-portion forming thin film, whereby the electron-emitting portion 3 was produced. The voltage waveform of this forming process is shown in FIG.

In FIG. 4, T1 and T2 are the pulse width and pulse interval of the voltage waveform. In this embodiment, T1 is 1 millisecond,
T2 is 10 milliseconds, the peak value of the triangular wave (peak voltage during forming) is 5V, and the forming process is about 1 ×.
It was carried out for 60 seconds in a vacuum atmosphere of 10 ⁻⁶ Torr. When forming each electron-emitting device 74 sequentially, there were almost no devices that could not be formed due to an open or short circuit between the wirings, and each device could be formed uniformly. In the electron-emitting portion 3 thus produced, fine particles containing palladium as a main constituent element were dispersed and arranged, and the average particle diameter of the fine particles was 30Å.

The characteristics of the electron-emitting device that has undergone the above forming were measured by measuring the voltage of the anode electrode at 1 kV and the distance H between the anode electrode and the electron-emitting device at 4 mm.
When the device voltage was 14 V, the device current If was 2.2 mA and the emission current Ie was 1.1 μA, and the variation between each device was ± 5 to 6% for both If and Ie.

Reference Example 3 An electron was prepared in the same manner as in Example 1 except that the formation of contact holes (steps-b, c and d) and the formation of device electrodes (step-e) were performed by the following method. The source was made.

Steps b, c and d : An interlayer insulating layer 111 made of a silicon oxide film having a thickness of 12000 Å is deposited at one time by the RF sputtering method to form a photoresist pattern for forming a contact hole 112 in the silicon oxide film, Using this as a mask, the interlayer insulating layer 111 was etched to form a contact hole 112. The etching was performed by the RIE method using CF ₄ and H ₂ gas.

Step-e After that, a photoresist (RD-2000N-41, manufactured by Hitachi Chemical Co., Ltd.) is formed on the device electrode 5 and a pattern to form the device-electrode gap G, and a 50 T thick T film is formed by a vacuum evaporation method.
i, Pt having a thickness of 300 Å was sequentially laminated. The photoresist pattern was dissolved in an organic solvent, the Pt / Ti deposition film was lifted off, the device electrode spacing was set to 3 μm, and device electrodes 5 and 6 having a device electrode width of 300 μm were formed.

Further, film formation and lift-off were performed without performing the O ₂ RIE treatment or UV / O ₃ treatment at the time of forming the lower wiring (step-a) and the upper wiring (step-f).

The electron source manufactured in this manner was used as an example.
As in the case of 1 , the forming and electron emission characteristics were measured using the measurement and evaluation apparatus of FIG. During the sequential forming of each electron-emitting device, some devices could not be formed due to the peeling of the wiring, the open or short between the wirings. Further, even in the element that could be formed, the thin film material for forming the electron emission portion was partially thickly applied due to the burr of the element electrode, and the resistance of each element was varied, and it was difficult to perform uniform forming.

With respect to the characteristics of the electron-emitting device after the above-mentioned forming, when the voltage of the anode electrode was measured at 1 kV and the distance H between the anode electrode and the electron-emitting device was measured at 4 mm, the burr portion of the device electrode was the starting point. Then, there were some places where abnormal discharge occurred. Also, the device current I at 14V
Both f and the emission current Ie are equal to or lower than those of the electron source of the second embodiment, and the variations between If and Ie between the respective elements are:
It was ± 7-8%.

Example 2 In this example, an image forming apparatus using the electron source of the present invention in which a large number of surface conduction electron-emitting devices are arranged in a matrix and a manufacturing method thereof will be described.

An example in which a display device is constructed using the electron source manufactured in Example 1 will be described with reference to FIG.

After fixing a substrate on which a large number of flat plate type surface conduction electron-emitting devices were formed by the method of Example 1 onto the rear plate 81, the face plate 8 was placed 5 mm above the substrate 1.
6 (having a structure in which the fluorescent film 84 and the metal back 85 are formed on the inner surface of the glass substrate 83) is arranged via the support frame 82, and is attached to the joint portion of the face plate 86, the support frame 82, and the rear plate 81. Apply frit glass and in air or nitrogen atmosphere at 400 ℃ ~ 500 ℃ 10
It was sealed by baking for at least one minute. The substrate 1 was also fixed to the rear plate 81 with frit glass.

In FIG. 7, 74 is an electron-emitting device and 72
And 73 are wirings in the X and Y directions, respectively.

In the case of monochrome, the fluorescent film 84 is made of only the fluorescent material, but in this embodiment, the fluorescent material has a stripe shape, a black stripe is first formed, and the fluorescent material of each color is applied to the gap. A fluorescent film 84 was produced. A slurry method was used as a method for applying the phosphor to the glass substrate 83 using a material containing graphite as a main component, which is often used as a material for the black stripe. A metal back 85 is usually provided on the inner surface side of 84. The metal back was produced by performing a smoothing treatment (usually called filming) on the inner surface of the fluorescent film after producing the fluorescent film, and then vacuum-depositing Al.

The face plate 86 may be further provided with a transparent electrode (not shown) on the outer surface side of the fluorescent film 84 in order to enhance the conductivity of the fluorescent film 84, but in the present embodiment, only a metal back is used. It was omitted because sufficient conductivity was obtained.

In the case of the above-mentioned sealing, in the case of a color, the phosphors of the respective colors and the electron-emitting devices have to correspond to each other, so that sufficient alignment is performed.

The atmosphere in the glass container completed as described above is exhausted by a vacuum pump through an exhaust pipe (not shown), and after reaching a sufficient degree of vacuum, the terminals outside the container Dox1 to Doxm and Doy1 to Doyn. A voltage is applied between the electrodes 5 and 6 of the electron-emitting device 74 through the, and the electron-emitting portion forming thin film 2 is energized (forming processing) to form the electron-emitting portion 3.

In the electron-emitting portion 3 thus manufactured, fine particles containing palladium as a main constituent element were dispersed and arranged, and the average particle diameter of the fine particles was 30Å.

Next, the exhaust pipe (not shown) was welded by heating with a gas burner at a vacuum degree of about 10 ^-6 Torr to seal the envelope.

Finally, in order to maintain the degree of vacuum after sealing,
Getter processing was performed. This is a process in which a getter arranged at a predetermined position (not shown) in the image forming apparatus is heated by a heating method such as high-frequency heating immediately before sealing to form a vapor deposition film. The getter was mainly composed of Ba or the like.

In the image display device manufactured by the above method, each of the electron-emitting devices has terminals outside the container Dox1 to Dox.
m, Doy1 to Doyn, a scanning signal and a modulation signal are respectively applied from a signal generating means (not shown) to emit electrons, and a few k are applied to the metal back 85 through the high voltage terminal Hv.
A high voltage of V or more is applied to accelerate the electron beam, and the fluorescent film 8
An image was displayed by colliding with No. 4 and exciting and emitting light. At that time, there was no open or short of the wiring tube, and the forming of each element could be performed uniformly, so that the electron emission characteristics were uniform, and no uneven brightness or no light emission point was observed. In addition, the abnormal shape of the element electrode etc. is the starting point,
There was no abnormal discharge.

[0122]

As described above, the contact hole of the surface conduction electron-emitting device is formed by dividing the contact hole into a plurality of times while controlling the mask so that the contact hole has a step (1). ) Short circuits between the upper and lower wirings can be reduced, and (2) the coverage at the step portion of the device electrode and the upper wiring is improved.

Furthermore, by processing and forming the device electrode by the dry etching method, (3) a flat surface without burrs can be formed at the end portion of the upper surface of the device electrode, and the melted thin film for forming the electron emission portion is applied with a uniform film thickness. Therefore, (4) when a plurality of elements having the same characteristics are used, variations in characteristics can be suppressed.

Further, when forming the wiring by lift-off,
By performing O ₂ RIE or UV / O ₃ treatment before forming a film, (5) the adhesion of the wiring pattern to the base material is improved.

Further, in the image forming apparatus using such an electron source, (6) a good image having no light-emitting point and uneven brightness can be obtained, and (7) abnormal discharge is reduced.

[Brief description of drawings]

FIG. 1 is a process diagram showing a manufacturing procedure of an electron source of Example 1 , where (a) to (g) correspond to process-a to process-g, respectively.

2 is a schematic diagram showing a configuration of an electron source of Example 1 , FIG.
(A) is a plan view and (b) is a sectional view taken along the line AA 'of (a).

FIG. 3 is a schematic diagram showing a configuration of a measurement / evaluation apparatus for a surface conduction electron-emitting device of the present invention.

FIG. 4 is a waveform diagram showing an example of the waveform of the voltage applied during the energization process of the surface conduction electron-emitting device of the present invention.

FIG. 5 is a graph showing an example of characteristics of the surface conduction electron-emitting device of the present invention.

FIG. 6 is a schematic diagram showing a configuration of an electron source of the present invention.

FIG. 7 is a perspective view illustrating an outline of an image forming apparatus according to a second exemplary embodiment.

8 is a graph showing characteristics of the electron source of Reference Example 1. FIG.

9A and 9B are process diagrams showing the manufacturing procedure of the electron source of Reference Example 1, wherein FIG. 9A is a device electrode formation, FIG. 9B is a thin film formation for forming an electron emission portion, and FIG. 9C is a thin film including an electron emission portion. It is a figure which shows formation of the pattern which should become.

10A and 10B are diagrams showing a basic configuration of a planar surface conduction electron-emitting device of the present invention, in which FIG. 10A is a plan view and FIG. 10B is a sectional view.

FIG. 11 is a process chart showing a basic manufacturing procedure of the surface conduction electron-emitting device of the present invention, (a) forming an element electrode on a substrate, (b) forming a thin film for forming an electron-emitting portion, (C)
FIG. 6 is a diagram showing a state in which an electron emitting portion is formed.

FIG. 12 is a schematic plan view of a conventional surface conduction electron-emitting device.

FIG. 13 is a schematic cross-sectional view of an example of a conventional electron source.

14A and 14B are process diagrams showing a manufacturing procedure of the electron source of FIG. 13, where FIG. 14A is a state in which a lower wiring, an interlayer insulating film and a contact hole are formed on a substrate, and FIG. 2C is a diagram showing a completed electron source.

FIG. 15 is a schematic cross-sectional view of an electron source manufactured in Reference Example 2 .

[Explanation of symbols]

1 Insulating substrate 2 Thin film for electron emission part formation 3 Electron emission part 4 Thin film including electron emission part 5, 6 element electrodes 7 Projection structure (burr) 30 ammeter 31 power supply 32 ammeter 33 power supply 34 Anode electrode 72 X direction wiring 73 Y direction wiring 74 Surface conduction electron-emitting device 75 connection 81 Rear plate with electron source fixed 82 Support frame 83 glass substrate 84 Fluorescent film 111 Interlayer insulation layer 112 contact holes 113 photoresist

─────────────────────────────────────────────────── ─── Continuation of front page (56) References JP-A-5-242793 (JP, A) JP-A-5-188397 (JP, A) JP-A-5-190508 (JP, A) JP-A-7- 321110 (JP, A) Patent 3167072 (JP, B2) (58) Fields investigated (Int.Cl. ⁷ , DB name) H01J 1/316 H01J 9/02 H01J 29/04 H01J 31/12

Claims (4)

(57) [Claims] 1. A (1) on an insulating substrate, a row direction wiring and the line
Column wiring is provided via an insulating layer on the directional wiring, (2) across the electron-emitting portion faces the device electrodes one pair, one of the device electrodes of the pair of device electrodes the whereabouts but via a contact hole provided in the <br/> insulating layer
Is connected to a counter wiring, and the other of the pair of device electrodes is connected.
An electron source in which the surface conduction electron-emitting devices are a plurality arranged in a matrix in which the element electrodes are the column direction wirings and connections, in that the contact hole is a multistage shape having one or more steps Characteristic electron source. 2. An image forming apparatus in which a phosphor is arranged so as to face at least the electron source according to claim 1. To 3. (1) on an insulating substrate, forming a row direction wiring in a predetermined pattern, (2) the on an insulating substrate formed of the row direction wirings
Depositing an interlayer insulating layer, (3) the interlayer insulating layer the row direction the contact hole is formed an opening leading to wiring, (4) a pair of elements that face each other with a predetermined gap in a predetermined pattern the electrodes plurality formation, (5) to form a column direction wiring in a predetermined pattern, (6) the form of the electron-emitting portion between a pair of device electrodes, a matrix into a plurality of surface conduction electron a method of manufacturing an electron source for arranging emitting device, forming a contact hole in the interlayer insulating layer, the interlayer insulating layer deposited in (a) said insulating substrate
The interlayer insulating layer was removed from the masked for forming the contact hole, and removing the mask,
After forming the contact hole , (b) the interlayer insulating layer in which the contact hole is formed
Sedimentary another interlayer insulating layer thereon and the contact hole
And the product, inside of the contact hole and the contactor
Another layer insulation around the area smaller than the
Said contactor Tohoru from subjected to mass <br/> click for a stepped shape in the layer, the contact of the further interlayer insulating layer
Remove portions of the small area of the inner hole, is performed at least once a series of steps of removing the mask, the manufacture of an electron source, characterized in that a multi-stage shape with one or more steps of the contact holes Method. 4. The method of manufacturing an electron source according to claim 3, wherein the element electrode is formed by pattern formation by a dry etching method.