JPH07130280A - Manufacture of electron source material and electron source, and electron source and image forming device - Google Patents

Manufacture of electron source material and electron source, and electron source and image forming device

Info

Publication number
JPH07130280A
JPH07130280A JP27521093A JP27521093A JPH07130280A JP H07130280 A JPH07130280 A JP H07130280A JP 27521093 A JP27521093 A JP 27521093A JP 27521093 A JP27521093 A JP 27521093A JP H07130280 A JPH07130280 A JP H07130280A
Authority
JP
Japan
Prior art keywords
electron
electron source
thin film
forming
film
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP27521093A
Other languages
Japanese (ja)
Inventor
Katsuhiko Shinjo
克彦 新庄
Masahiro Okuda
昌宏 奥田
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Canon Inc
Original Assignee
Canon Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Canon Inc filed Critical Canon Inc
Priority to JP27521093A priority Critical patent/JPH07130280A/en
Publication of JPH07130280A publication Critical patent/JPH07130280A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE:To minimize the quantity of power required at forming so as to reduce the dispersion in formation of elements by interposing a bad heat conductor at the interface between an element electrode and the film consisting of an electron emitting material. CONSTITUTION:A film 2 for formation of an electron emitter is formed by forming an organic metallic film on an insulative substrate 1, and patterning it. A bad heat conductor 6 is made on the film 2 and it is patterned into a desired shape. Further, thereon metallic films or conductive films are laminated and patterned to form an element electrode 5. Subsequently, current application treatment is performed between the element electrodes 5 by pulse-shaped or high-speed boosted voltage, whereby an electron emitter 3, whose structure is changed, is formed at the section of the film 2. Hereby, it can be formed with low power consumption.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】本発明は電子源を得るための電子
源材料並びに電子源の製法並びに電子源並びに電子源の
応用である表示装置等の画像形成装置に関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an electron source material for obtaining an electron source, a method for manufacturing the electron source, an electron source and an image forming apparatus such as a display device which is an application of the electron source.

【0002】[0002]

【従来の技術】従来、電子放出素子として熱電子源と冷
陰極電子源の2種類が知られている。冷陰極電子源には
電界放出型(以下FE型と略す)、金属/絶縁層/金属
型(以下MIM型と略す)や表面伝導型電子放出素子
(以下SCEと略す)等がある。FE型の例としては
W.P.Dyke & W.W.Dolan,”Fie
ldemission”,Advance in El
ectronic Electron Physic
s,8,89(1956)あるいはC.A.Spind
t,”PHYSICAL Properties of
thin−filmfield emission
cathodes with molybdenium
cones”,J.Appl.phys.,47,5
248(1976)等が知られている。MIM型の例と
してはC.A.Mead,”Thetunnel−em
ission amplifier”,J.Appl.
Phys.,32,646(1961)等が知られてい
る。SCE型の例としては、M.I.Elinson,
Radio Eng.Electron Phys.,
10,(1965)等がある。SCE型は基板上に形成
された小面積の薄膜に、膜面に平行に電流を流すことに
より、電子放出が生ずる現象を利用するものである。こ
の表面伝導型電子放出素子としては、前記エリンソン等
によるSnO2薄膜を用いたもの、Au薄膜によるもの
[G.Dittmer:”Thin Solid Fi
lms”,9,317(1972)]、In23 /S
nO2 薄膜によるもの[M.Hartwell and
C.G.Fonstad:”IEEE Trans.
ED Conf.”,519(1975)]、カーボン
薄膜によるもの[荒木久 他:真空、第26巻、第1
号、22頁(1983)]等が報告されている。
2. Description of the Related Art Conventionally, two types of electron emitters, a thermoelectron source and a cold cathode electron source, are known. The cold cathode electron source includes a field emission type (hereinafter abbreviated as FE type), a metal / insulating layer / metal type (hereinafter abbreviated as MIM type), a surface conduction electron emission element (hereinafter abbreviated as SCE), and the like. As an example of the FE type, W. P. Dyke & W.D. W. Dolan, "Fie
Idemission ”, Advance in El
electronic Electron Physic
s, 8, 89 (1956) or C.I. A. Spind
t, "PHYSICAL Properties of
thin-filmfield emission
cathodes with mollybdenium
cones ", J. Appl. phys., 47, 5
248 (1976) and the like are known. An example of the MIM type is C.I. A. Mead, "Thetunnel-em
"issue amplifier", J. Appl.
Phys. , 32,646 (1961) and the like are known. As an example of the SCE type, M. I. Elinson,
Radio Eng. Electron Phys. ,
10, (1965) and so on. The SCE type utilizes a phenomenon in which electron emission is caused by flowing a current in a thin film having a small area formed on a substrate in parallel with the film surface. As the surface conduction electron-emitting device, one using the SnO 2 thin film by Erinson et al., One using the Au thin film [G. Dittmer: "Thin Solid Fi
lms ”, 9, 317 (1972)], In 2 O 3 / S.
nO 2 thin film [M. Hartwell and
C. G. Fonstad: "IEEE Trans.
ED Conf. , 519 (1975)], by carbon thin film [Haraki Araki et al .: Vacuum, Vol. 26, No. 1
No., p. 22 (1983)] and the like.

【0003】これらの電子源の典型的な素子構成として
前述の荒木他の素子構成を図9に示す。同図において1
は絶縁性基板である。2は電子放出部形成用薄膜で、H
型形状のパターンに、スパッタ等で形成された金属酸化
物薄膜等からなり、後述のフォーミングと呼ばれる通電
処理により電子放出部3が形成される。4は電子放出部
を含む薄膜と呼ぶことにする。また、5は素子電極であ
り、フォーミング、あるいは駆動時の電圧印加用に用い
られる。
FIG. 9 shows the above-mentioned Araki et al. As a typical element structure of these electron sources. 1 in the figure
Is an insulating substrate. 2 is a thin film for forming an electron emitting portion, which is H
The electron-emitting portion 3 is formed on the pattern of the mold shape by a metal oxide thin film or the like formed by sputtering or the like, and an energization process called forming, which will be described later. 4 will be referred to as a thin film including an electron emitting portion. Reference numeral 5 is an element electrode, which is used for forming or voltage application during driving.

【0004】従来、これらの電子源においては、電子放
出を行う前に電子放出部形成用薄膜2を予めフォーミン
グと呼ばれる通電処理によって電子放出部3を形成する
のが一般的であった。即ち、フォーミングとは前記電子
放出部形成用薄膜2の両端に電圧を印加通電し、電子放
出部形成用薄膜を局所的に破壊、変形もしくは変質せし
め、電気的に高抵抗な状態にした電子放出部3を形成す
ることである。尚、電子放出部3は電子放出部形成用薄
膜2の一部に亀裂が発生しその亀裂付近から電子放出が
行われる。以下フォーミングにより形成した電子放出部
を含む電子放出部形成用薄膜2を電子放出部を含む薄膜
4と呼ぶ。前記フォーミング処理をした電子源は、上述
電子放出部3を含む薄膜4に電圧を印加し、素子に電流
を流すことにより、上述電子放出部3より電子を放出せ
しめるものである。
Conventionally, in these electron sources, it is general that the electron emitting portion 3 is formed in advance by an energization process called forming before the electron emitting portion forming thin film 2 is emitted. That is, forming means that a voltage is applied to both ends of the electron-emitting-portion forming thin film 2 to locally destroy, deform or alter the electron-emitting-portion forming thin film so that the electron emitting portion has an electrically high resistance state. To form part 3. In the electron emitting portion 3, a crack is generated in a part of the electron emitting portion forming thin film 2, and electrons are emitted from the vicinity of the crack. Hereinafter, the electron emitting portion forming thin film 2 including the electron emitting portion formed by forming will be referred to as a thin film 4 including the electron emitting portion. The electron source that has undergone the forming process is a device that causes a voltage to be applied to the thin film 4 including the electron emitting portion 3 and causes a current to flow through the element so that the electron emitting portion 3 emits electrons.

【0005】上述の電子源は、構造が単純で製造も容易
であることから、大面積にわたって多数素子を配列形成
できる利点がある。そこで、この特徴を生かせるような
いろいろな応用が研究されている。例えば、荷電ビーム
源、表示装置等があげられる。多数の電子源を配列形成
した例としては、並列に電子源を配列し、個々の素子の
両端を配線にてそれぞれ結線した行を多数行配列した電
子源があげられる。(例えば、本出願人の特開平1−0
31332)また、特に表示装置等の画像形成装置にお
いては、近年、液晶を用いた平板型表示装置が、CRT
に替わって普及してきたが、自発光型でないため、バッ
クライト等を持たなければならない等の問題点があり、
自発光型の表示装置の開発が、望まれてきた。電子源を
多数配置した電子源と電子源より放出された電子によっ
て、可視光を発光せしめる蛍光体とを組み合わせた表示
装置である画像形成装置は、大画面の装置でも比較的容
易に製造でき、かつ表示品位の優れた自発光型表示装置
である。(例えば、本出願人のUSP5066883)
The above-mentioned electron source has an advantage that a large number of elements can be arrayed over a large area because it has a simple structure and is easy to manufacture. Therefore, various applications that can make full use of this feature are being studied. Examples thereof include a charged beam source and a display device. As an example in which a large number of electron sources are arranged and formed, there is an electron source in which a large number of rows in which electron sources are arranged in parallel and both ends of each element are connected by wiring are arranged. (For example, Japanese Patent Laid-Open No. 1-0 of the present applicant
In addition, in image forming apparatuses such as display devices, in recent years, flat panel display devices using liquid crystal have been used in CRTs.
However, since it is not a self-luminous type, there are problems such as having a backlight etc.
Development of a self-luminous display device has been desired. An image forming apparatus, which is a display device in which a large number of electron sources are arranged and a fluorescent substance that emits visible light is combined by electrons emitted from the electron sources, can be relatively easily manufactured even in a large screen device. In addition, the self-luminous display device is excellent in display quality. (For example, Applicant's USP 50666883)

【0006】[0006]

【発明が解決しようとしている課題】しかしながら、上
記の様な従来の(表面伝導型)電子源材料には、次のよ
うな問題点があった。すなわち、上記フォーミング工程
は通電加熱によって電子放出可能な状態にするが、素子
電極と電子放出部形成用薄膜との接触面積が大きくなら
ざるを得ず、熱の流出が大きくなりフォーミングに必要
なパワーが大きくなるという問題があった。
However, the above-mentioned conventional (surface conduction type) electron source material has the following problems. That is, in the forming step, electrons can be emitted by heating by energization, but the contact area between the device electrode and the electron emission portion forming thin film is inevitably large, so that the heat outflow increases and the power required for forming is increased. There was a problem that became large.

【0007】さらに、作成工程での素子形状のばらつ
き、特に電極の端面、および表面の形状のばらつきのた
め、素子ごとの熱抵抗が大きく異なり、共通の電圧印加
条件でフォーミングを行っても電子放出特性が素子ごと
に異なり良好な画像形成装置を作成しにくいという問題
点もあった。
Furthermore, due to variations in the element shape in the manufacturing process, especially variations in the shapes of the end faces and the surface of the electrodes, the thermal resistances of the elements are greatly different, and even if forming is performed under a common voltage application condition, electron emission occurs. There is also a problem in that it is difficult to produce a good image forming apparatus whose characteristics differ from element to element.

【0008】[0008]

【課題を解決するための手段】本発明は上記問題点を解
決しようとするものであり、低消費電力でフォーミング
できると共に簡単な構成の電子源材料並びに電子源の製
法並びに電子源並びに画像形成装置を提供しようとする
ものであり、その要旨は、素子電極と電子放出部形成用
薄膜とを有する電子源材料において、素子電極と前記薄
膜との界面の少なくとも一部を熱の不良導体を介してな
ることを特徴とする電子源材料並びに前記電子放出部形
成用薄膜の中心に近い部分に給電箇所を形成したことを
特徴とする電子源材料並びに前記電子源材料の素子電極
間に真空雰囲気下で電圧を付与するように通電処理を行
うことを特徴とする電子源の製法並びに前記製法により
製造した電子源並びに該電子源を組込んでなる画像形成
装置にある。
SUMMARY OF THE INVENTION The present invention is intended to solve the above problems, and is an electron source material having a simple structure and capable of forming with low power consumption, a method of manufacturing the electron source, an electron source, and an image forming apparatus. In the electron source material having a device electrode and a thin film for forming an electron emission portion, at least a part of the interface between the device electrode and the thin film is provided via a poor heat conductor. In a vacuum atmosphere between the electron source material and the element electrode of the electron source material, characterized in that a power feeding portion is formed in a portion close to the center of the electron emission material forming thin film The present invention relates to a method of manufacturing an electron source, an electron source manufactured by the above manufacturing method, and an image forming apparatus incorporating the electron source, wherein energization processing is performed so as to apply a voltage.

【0009】以下、本発明を更に詳細に説明する。The present invention will be described in more detail below.

【0010】図1は本発明の電子源材料の一例を示す平
面図及び断面図である。1は絶縁性基板である。2は電
子放出部形成用薄膜で、H型形状のパターンに、スパッ
タ等で形成された金属酸化物薄膜等からなり、後述のフ
ォーミングにより電子放出部3が形成される。また、5
はフォーミング、あるいは駆動時の給電用に用いられる
素子電極である。6は酸化物等の熱の不良導体である。
この、熱の不良導体6が電子放出部形成用薄膜2と素子
電極5との間に設けられたことにより、電気的なコンタ
クトは必要上十分保ちつつ、熱的には電子放出部形成用
薄膜2が外界と隔離された状態になるため、フォーミン
グに必要な電圧は図9に示した従来の素子よりも小さく
てすむ。なお、この熱の不良導体6は素子電極5と電子
放出部形成用薄膜2の少くとも界面の一部に介してあれ
ばよい。
FIG. 1 is a plan view and a sectional view showing an example of the electron source material of the present invention. Reference numeral 1 is an insulating substrate. Reference numeral 2 denotes a thin film for forming an electron emitting portion, which is composed of a metal oxide thin film or the like formed by sputtering or the like on an H-shaped pattern, and the electron emitting portion 3 is formed by forming described later. Also, 5
Is an element electrode used for forming or power supply during driving. Reference numeral 6 is a poor heat conductor such as an oxide.
Since the poor heat conductor 6 is provided between the electron emitting portion forming thin film 2 and the device electrode 5, the electron emitting portion forming thin film is thermally maintained while maintaining sufficient electrical contact. Since 2 is isolated from the outside world, the voltage required for forming can be smaller than that of the conventional element shown in FIG. It should be noted that the poor heat conductor 6 may be provided at least in a part of the interface between the device electrode 5 and the electron emission portion forming thin film 2.

【0011】また、図2は本発明の電子源材料の別の例
を示す平面図及び断面図であり、電子放出部形成用薄膜
2と素子電極5の間に熱の不良導体6を設けると共に電
子放出部形成用薄膜2の中心に近い部分に給電箇所7,
7を設けることにより電子放出部形成用薄膜2の中央部
近傍の電圧分布のバラツキを押えることができて好まし
い。
FIG. 2 is a plan view and a sectional view showing another example of the electron source material of the present invention, in which a poor heat conductor 6 is provided between the electron emission portion forming thin film 2 and the device electrode 5. A power feeding point 7 is provided in a portion near the center of the electron emission portion forming thin film 2.
It is preferable to provide 7 because it is possible to suppress variations in the voltage distribution near the central portion of the electron emission portion forming thin film 2.

【0012】なお、本発明では図1及び図2に示すフォ
ーミング処理前の部品を電子源材料と称し、電子源材料
をフォーミング処理したものを電子源と称する。
In the present invention, the parts before forming treatment shown in FIGS. 1 and 2 are referred to as electron source materials, and those obtained by subjecting the electron source material to forming treatment are referred to as electron sources.

【0013】本発明の電子源材料に用いられる絶縁性基
板1としては、石英ガラス、Na等の不純物含有量を減
少したガラス、青板ガラス、青板ガラスにスパッタ法等
により形成したSiO2 を積層したガラス基板等及びア
ルミナ等のセラミックス等が、あげられる。また、熱の
不良導体6としては、SiO2 、アルミナ、ベリリア等
セラミックス等の薄膜が用いられる。素子電極5の材料
としては導電性を有するものであればどのようなもので
あっても構わないが、例えばNi、Cr、Au、Mo、
W、Pt、Ti、Al、Cu、Pd等の金属或は合金及
びPd、Ag、Au、RuO2 、Pd−Ag等の金属或
は金属酸化物とガラス等から構成される印刷導体、In
23 −SnO2 等の透明導電体及びポリシリコン等の
半導体導体材料等が挙げられる。素子電極間隔L1は、
数百オングストロームより数百ミクロンであり、素子電
極の製法の基本となるフォトリソグラフィー技術、即
ち、露光機の性能とエッチング方法等、及び、素子電極
間に印加する電圧と電子放出し得る電界強度等により設
定されるが、好ましくは、数ミクロンより数十ミクロン
である。素子電極長さ、素子電極5の膜厚dは、電極の
抵抗値、前述したX、Y配線との結線、多数配置された
電子源の配置上の問題より適宜設計され、通常は、素子
電極長さは、数ミクロンより数百ミクロンであり、素子
電極5の膜厚dは、好ましくは数百オングストロームよ
り数ミクロンである。なお、図2の電子源材料は絶縁性
基板1上に電子放出部形成用薄膜2、熱の不良導体6、
素子電極5の順に形成されているが、絶縁性基板1上に
素子電極5、熱の不良導体6、電子放出部形成用薄膜2
の順に作成してもかまわない。また、素子電極5の間全
てが、製法によっては電子放出部として機能する場合も
ある。この電子放出部形成用薄膜2の膜厚は、数オング
ストロームより数千オングストローム、好ましくは数十
オングストロームより数百オングストロームであり、素
子電極5とのステップカバレージ、電子放出部3と素子
電極5間の抵抗値及び電子放出部3の導電性微粒子の粒
径、後述する通電処理条件等によって、適宜設定され
る。その抵抗値は、10の3乗より10の7乗オーム/
□のシート抵抗値を示す。電子放出部形成用薄膜2を構
成する材料の具体的例を挙げるならば、Pd、Ru、A
g、Au、Ti、In、Cu、Cr、Fe、Zn、S
n、Ta、W、Pb等の金属、PdO、SnO2 、In
23 、PbO、Sb23 等の酸化物、HfB2 、Z
rB 2 、LaB6 、CeB6 、YB4 、GdB4 等の硼
化物、TiC、ZrC、HfC、TaC、SiC、WC
等の炭化物、TiN、ZrN、HfN等の窒化物、S
i、Ge等の半導体、カーボン、AgMg、NiCu、
Pb、Sn等であり、微粒子膜からなる。なおここで述
べる微粒子膜とは、複数の微粒子が集合した膜であり、
その微細構造として、微粒子が個々に分散配置した状態
のみならず、微粒子が互いに隣接、あるいは重なり合っ
た状態(島状も含む)の膜をさす。電子放出部3は、数
オングストロームより数千オングストローム、好ましく
はオングストロームより200オングストロームの粒径
の導電性微粒子多数個からなり、電子放出部形成用薄膜
2の膜厚及び後述するフォーミング通電処理条件等の製
法等に依存しており、適宜設定される。電子放出部3を
構成する材料は、電子放出部形成用薄膜2を構成する材
料の元素の一部あるいは全てと同様のものである。
Insulating group used in the electron source material of the present invention
The plate 1 has a reduced content of impurities such as quartz glass and Na.
A little glass, blue plate glass, blue plate glass spattering method, etc.
SiO formed by2 Glass substrates, etc.
Examples include ceramics such as Lumina. Also of heat
As the defective conductor 6, SiO2 , Alumina, beryllia, etc.
A thin film such as ceramics is used. Material of element electrode 5
As long as it has conductivity
Although it may exist, for example, Ni, Cr, Au, Mo,
Metals or alloys such as W, Pt, Ti, Al, Cu, Pd, etc.
And Pd, Ag, Au, RuO2 , Metals such as Pd-Ag or
Is a printed conductor composed of metal oxide and glass, In
2 O3 -SnO2 Such as transparent conductors and polysilicon, etc.
Examples include semiconductor conductor materials. The element electrode spacing L1 is
Hundreds of microns from hundreds of angstroms
Photolithography technology, which is the basis of the pole manufacturing method,
The performance of the exposure machine, the etching method, and the device electrode
Depending on the voltage applied between and the electric field strength that can emit electrons, etc.
However, preferably several to several tens of microns
Is. The element electrode length and the film thickness d of the element electrode 5 are
Resistance value, connection with the above-mentioned X and Y wirings, a large number are arranged
Designed appropriately according to the layout of the electron source
The electrode length is several hundreds of microns,
The film thickness d of the electrode 5 is preferably several hundred angstroms.
It is a few microns. In addition, the electron source material of FIG.
A thin film 2 for forming an electron emission portion, a poor heat conductor 6, on a substrate 1,
The element electrodes 5 are formed in this order, but on the insulating substrate 1.
Element electrode 5, defective heat conductor 6, electron emission portion forming thin film 2
You can create them in the order of. Also, the entire space between the device electrodes 5
However, depending on the manufacturing method, it may function as an electron emission unit.
is there. The film thickness of the electron emission portion forming thin film 2 is several angstroms.
Thousands of Angstroms, preferably tens of Angstroms
Hundreds of Angstroms more than Angstroms
Step coverage with the child electrode 5, electron emission unit 3 and device
Resistance value between electrodes 5 and particles of conductive fine particles in the electron emission portion 3
It is set appropriately according to the diameter, the energization processing conditions described later, etc.
It The resistance value is 10 7 to 10 7 ohm /
The sheet resistance value of □ is shown. The thin film 2 for forming the electron emission portion is constructed.
Specific examples of the material to be formed include Pd, Ru, and A.
g, Au, Ti, In, Cu, Cr, Fe, Zn, S
n, Ta, W, Pb, and other metals, PdO, SnO2 , In
2 O3 , PbO, Sb2 O3 Oxides such as HfB2 , Z
rB 2 , LaB6 , CeB6 , YBFour , GdBFour Etc.
Compounds, TiC, ZrC, HfC, TaC, SiC, WC
Carbides such as TiN, ZrN, nitrides such as HfN, S
i, semiconductor such as Ge, carbon, AgMg, NiCu,
Pb, Sn and the like, which are composed of a fine particle film. Note that here
The sticky particle film is a film in which a plurality of particles are gathered,
As its fine structure, fine particles are individually dispersed and arranged.
Not only the particles are adjacent to each other or overlap each other
It refers to the film in the open state (including island shape). The number of electron emission parts 3 is
Thousands of Angstroms, preferably Angstroms
Is a particle size of 200 angstroms than angstroms
Thin film for forming electron emission part, consisting of many conductive fine particles
2 film thickness and forming energization processing conditions described later
It depends on the law etc. and is set appropriately. The electron emission part 3
The constituent material is the constituent material of the thin film 2 for forming the electron emission portion.
It is similar to some or all of the elements of the material.

【0014】電子放出部3を有する電子源の製造方法と
しては様々な方法が考えられるが、その一例を図3に示
す。以下、順をおって製造方法を図2及び図3に基づい
て説明する。 1)絶縁性基板1を洗剤、純水および有機溶剤により十
分に洗浄後、有機金属溶液を塗布して放置することによ
り、有機金属薄膜を形成する。なお、有機金属溶液と
は、前記Pd、Ru、Ag、Au、Ti、In、Cu、
Cr、Fe、Zn、Sn、Ta、W、Pb等の金属を主
元素とする有機化合物の溶液である。この後、有機金属
薄膜を加熱焼成処理し、リフトオフ、エッチング等によ
りパターニングし、電子放出部形成用薄膜2を形成す
る。(図3(a))尚、ここでは、有機金属溶液の塗布
法により説明したが、これに限る物でなく、真空蒸着
法、スパッタ法、化学的気相堆積法、分散塗布法、ディ
ッピング法、スピンナー法等によって形成される場合も
ある。 2)該電子放出部形成用薄膜2上に、真空蒸着法、スパ
ッタ法、あるいは酸化物の有機錯体溶液のスピンコート
等により、熱の不良導体膜6を作成し、所望の形状にフ
ォトリソグラフィー技術によりパターニングする。(図
3(b)) 3)さらに、その上部に金属膜、あるいは導電膜を積層
し、所望の形状にパターニングし、素子電極5を作成す
る。(図3(c)) 4)つづいて、フォーミングと呼ばれる通電処理を素子
電極5間に電圧を不図示の電源によりパルス状あるい
は、高速の昇電圧による通電処理がおこなわれると、電
子放出部形成用薄膜2の部位に構造の変化した電子放出
部3が形成される。(図3(d))この通電処理により
電子放出部形成用薄膜2を局所的に破壊、変形もしくは
変質せしめ、構造の変化した部位を電子放出部3と呼
ぶ。先に説明したように、電子放出部3は導電性微粒子
で構成されていることを本出願人らは観察している。
Various methods are conceivable as a method of manufacturing the electron source having the electron emitting portion 3, one example of which is shown in FIG. Hereinafter, the manufacturing method will be described in order with reference to FIGS. 2 and 3. 1) The insulating substrate 1 is thoroughly washed with a detergent, pure water and an organic solvent, and then an organic metal solution is applied and left to stand to form an organic metal thin film. The organometallic solution means Pd, Ru, Ag, Au, Ti, In, Cu,
It is a solution of an organic compound containing a metal such as Cr, Fe, Zn, Sn, Ta, W, Pb as a main element. Then, the organic metal thin film is heated and baked, and is patterned by lift-off, etching or the like to form the electron emission portion forming thin film 2. (FIG. 3 (a)) Although the coating method of the organic metal solution has been described here, the present invention is not limited to this, and the vacuum vapor deposition method, the sputtering method, the chemical vapor deposition method, the dispersion coating method, the dipping method are not limited thereto. In some cases, it is formed by the spinner method or the like. 2) A poor thermal conductor film 6 is formed on the electron emission portion forming thin film 2 by a vacuum vapor deposition method, a sputtering method, spin coating of an organic complex solution of an oxide, or the like, and a photolithography technique is formed into a desired shape. Patterning by. (FIG. 3B) 3) Further, a metal film or a conductive film is laminated on the upper portion and patterned into a desired shape to form a device electrode 5. (FIG. 3 (c)) 4) Subsequently, when energization processing called forming is carried out by applying a voltage between the element electrodes 5 with a pulsed or high-speed rising voltage by a power source (not shown), an electron emitting portion is formed. An electron emitting portion 3 having a changed structure is formed at a portion of the thin film 2 for use. (FIG. 3D) The electron emission portion forming thin film 2 is locally destroyed, deformed or altered by this energization process, and a portion having a changed structure is called an electron emission portion 3. As described above, the present applicants have observed that the electron emitting portion 3 is composed of conductive fine particles.

【0015】フォーミング処理の電圧波形を図4に示
す。図4中、T1及びT2は電圧波形のパルス幅とパル
ス間隔であり、T1を1マイクロ秒〜10ミリ秒、T2
を10マイクロ秒〜100ミリ秒とし、三角波の波高値
(フォーミング時のピーク電圧)は4V〜10V程度と
し、フォーミング処理は真空雰囲気下で数十秒間程度で
適宜設定した。以上説明した電子放出部を形成する際
に、素子の電極間に三角波パルスを印加してフォーミン
グ処理を行っているが、素子の電極間に印加する波形は
三角波に限定することはなく、矩形波など所望の波形を
用いても良く、その波高値及びパルス幅・パルス間隔等
についても上述の値に限ることなく、電子放出部が良好
に形成されれば所望の値を選択することが出来る。
FIG. 4 shows the voltage waveform of the forming process. In FIG. 4, T1 and T2 are the pulse width and pulse interval of the voltage waveform, where T1 is 1 microsecond to 10 milliseconds, and T2 is T2.
Was 10 microseconds to 100 milliseconds, the peak value of the triangular wave (peak voltage during forming) was about 4V to 10V, and the forming treatment was appropriately set in a vacuum atmosphere for about several tens of seconds. When forming the electron emission portion described above, the forming process is performed by applying a triangular wave pulse between the electrodes of the element, but the waveform applied between the electrodes of the element is not limited to the triangular wave, and the rectangular wave is not limited. A desired waveform may be used, and its crest value, pulse width, pulse interval, etc. are not limited to the above values, and a desired value can be selected as long as the electron emitting portion is formed well.

【0016】上述のような素子構成と製造方法によって
作成された本発明にかかわる電子源の基本特性について
図5、図6を用いて説明する。
The basic characteristics of the electron source according to the present invention produced by the above element structure and manufacturing method will be described with reference to FIGS.

【0017】図5は、図2で示した構成を有する電子源
の電子放出特性を測定するための測定評価装置の概略構
成図である。図5において、1は絶縁性基板、6は熱の
不良導体、5は素子電極、4は電子放出部を含む薄膜、
3は電子放出部を示す。また、31は素子に素子電圧V
f を印加するための電源、30は素子電極5間に電子放
出部を含む薄膜4を流れる素子電流If を測定するため
の電流計、34は電子源の電子放出部より放出される放
出電流Ie を捕捉するためのアノード電極、33はアノ
ード電極34に電圧を印加するための高圧電源、および
32は電子源の電子放出部3より放出される放出電流I
e を測定するための電流計である。電子源の上記素子電
流If 、放出電流Ie の測定にあたっては、素子電極5
間に電源31と電流計30とを接続し、該電子源の上方
に電源33と電流計32とを接続したアノード電極34
を配置している。また、電子源及びアノード電極34は
真空装置内に設置され、その真空装置には不図示の排気
ポンプ及び真空計等の真空装置に必要な機器が具備され
ており、所望の真空下で本素子の測定評価を行えるよう
になっている。なお、アノード電極の電圧は1kV〜1
0kV、アノード電極と電子源との距離Hは3mm〜8
mmの範囲で測定した。
FIG. 5 is a schematic configuration diagram of a measurement / evaluation apparatus for measuring the electron emission characteristics of the electron source having the configuration shown in FIG. In FIG. 5, 1 is an insulating substrate, 6 is a poor heat conductor, 5 is an element electrode, 4 is a thin film including an electron emitting portion,
Reference numeral 3 indicates an electron emitting portion. 31 is the element voltage V
A power supply for applying f , 30 is an ammeter for measuring the device current I f flowing through the thin film 4 including the electron emission part between the device electrodes 5, and 34 is an emission current emitted from the electron emission part of the electron source. An anode electrode for capturing I e , 33 is a high-voltage power supply for applying a voltage to the anode electrode 34, and 32 is an emission current I emitted from the electron emission portion 3 of the electron source.
An ammeter for measuring e . When measuring the device current If and the emission current Ie of the electron source, the device electrode 5 is used.
An anode electrode 34 in which a power source 31 and an ammeter 30 are connected in between, and a power source 33 and an ammeter 32 are connected above the electron source.
Are arranged. Further, the electron source and the anode electrode 34 are installed in a vacuum device, and the vacuum device is provided with equipment necessary for the vacuum device such as an exhaust pump and a vacuum gauge (not shown). The measurement and evaluation of can be performed. The voltage of the anode electrode is 1 kV to 1
0 kV, the distance H between the anode electrode and the electron source is 3 mm to 8
It was measured in the range of mm.

【0018】更に、本発明者等は、上述の本発明に係わ
る電子源の特性を鋭意検討した結果、本発明の原理とな
る特性上の特徴を見いだした。図5に示した測定評価装
置により測定された放出電流Ie および素子電流If
素子電圧Vf の関係の典型的な例を図6に示す。なお、
図6は著しくIf ,Ie の大きさが異なるため任意単位
で示されている。図6からも明らかなように、電子源の
放出電流Ie に対する三つの特性を有する。
Further, as a result of earnestly examining the characteristics of the above-mentioned electron source according to the present invention, the present inventors found out the characteristic characteristic which is the principle of the present invention. FIG. 6 shows a typical example of the relationship between the emission current I e and the device current If and the device voltage V f measured by the measurement / evaluation apparatus shown in FIG. In addition,
FIG. 6 is shown in arbitrary units because the magnitudes of I f and I e are significantly different. As is clear from FIG. 6, it has three characteristics with respect to the emission current I e of the electron source.

【0019】まず第一に、電子源はある電圧(しきい値
電圧と呼ぶ、図6中のVth)以上の素子電圧を印加する
と急激に放出電流Ie が増加し、一方、しきい値電圧V
th以下では放出電流Ie がほとんど検出されない。つま
り、放出電流Ie に対する明確なしきい値電圧Vthを持
った非線形素子である。
First of all, when the electron source applies a device voltage higher than a certain voltage (called threshold voltage, V th in FIG. 6), the emission current I e rapidly increases, while the threshold voltage is increased. Voltage V
Below th , almost no emission current I e is detected. That is, it is a non-linear element having a clear threshold voltage V th with respect to the emission current I e .

【0020】第二に、放出電流Ie が素子電圧Vf に依
存するため、放出電流Ie は素子電圧Vf で制御でき
る。
Secondly, since the emission current I e depends on the device voltage V f , the emission current I e can be controlled by the device voltage V f .

【0021】第三に、アノード電極34に捕捉される放
出電荷は、素子電圧Vf を印加する時間に依存する。す
なわち、アノード電極34に捕捉される電荷量は、素子
電圧Vf を印加する時間により制御できる。以上のよう
な特性を有するため、本発明にかかわる電子源は、多方
面への応用が期待できる。
Thirdly, the emitted charge trapped in the anode electrode 34 depends on the time for applying the device voltage V f . That is, the amount of charges captured by the anode electrode 34 can be controlled by the time for which the device voltage V f is applied. Since the electron source according to the present invention has the above characteristics, it can be expected to be applied to various fields.

【0022】また、素子電流If は素子電圧Vf に対し
て単調増加する(MI特性と呼ぶ)特性の例を図6に示
したが、この他にも、素子電流If が素子電圧Vf に対
して電圧制御型負性抵抗(VCNR特性と呼ぶ)特性を
示す場合もある。なおこの場合も、電子源は上述した三
つの特性上の特徴を有する。
Further, the element current I f is (referred to as MI characteristic) monotonically increasing with respect to the device voltage V f is an example of a characteristic shown in FIG. 6, the addition to the device current I f of the element voltage V In some cases, a voltage control type negative resistance (referred to as VCNR characteristic) characteristic is shown for f . Also in this case, the electron source has the three characteristic features described above.

【0023】なお、上述の基本的な製造方法に限ること
なく、前記本発明の基本的な素子構成の基本的な製造方
法のうち一部を変更してもよい。
The basic manufacturing method is not limited to the above, and a part of the basic manufacturing method of the basic element structure of the present invention may be modified.

【0024】本発明の電子源74は、図8に示すように
基板1上にマトリックス状に配置し、基板1の縦方向及
び横方向には配線72,73を形成し、基板に対向する
面にはフェースプレート86を支持枠82を介して設
け、ガラス基板83の内面に蛍光膜84とメタルバック
85で構成されてなるフェースプレート86、支持枠8
2、リアプレート81の接合部にフリットガラスを塗布
し、大気中あるいは窒素雰囲気中で400°〜500℃
で10分以上焼成することで封着して各電子源には容器
外端子Dx1ないしDxm、Dy1ないしDynを通じ
走査信号及び変調信号を不図示の信号発生手段より夫々
印加することにより電子を放出させ高圧端子Hvを通じ
メタルバック85に数kV以上の高圧を印加することに
より高品位の画像表示を行わせることができる。
The electron source 74 of the present invention is arranged in a matrix on the substrate 1 as shown in FIG. 8, wirings 72 and 73 are formed in the vertical and horizontal directions of the substrate 1, and the surface facing the substrate is formed. Is provided with a face plate 86 via a support frame 82, and a face plate 86 including a fluorescent film 84 and a metal back 85 on the inner surface of the glass substrate 83, the support frame 8
2. Apply frit glass to the joint part of the rear plate 81, and 400 ° to 500 ° C. in air or nitrogen atmosphere.
It is sealed by baking for 10 minutes or more, and electrons are emitted by applying a scanning signal and a modulation signal to the respective electron sources through external terminals Dx1 to Dxm and Dy1 to Dyn from a signal generating means (not shown). High-quality image display can be performed by applying a high voltage of several kV or more to the metal back 85 through the high voltage terminal Hv.

【0025】[0025]

【実施例】以下、実施例により本発明を更に詳細に説明
する。 (実施例1)図3に示す電子源を以下の工程により作成
した。 工程−a 清浄化した青板ガラス上に有機Pd(ccp4230奥
野製薬(株)社製)をスピンコートし、300℃で10
分間の加熱焼成処理をした。また、こうして形成された
主元素としてPdよりなる微粒子からなる電子放出部形
成用薄膜4の膜厚は100オングストローム、シート抵
抗値は5×10の4乗Ω/□であった。なおここで述べ
る微粒子膜とは、上述したように、複数の微粒子が集合
した膜であり、その微細構造として、微粒子が個々に分
散配置した状態のみならず、微粒子が互いに隣接、ある
いは、重なり合った状態(島状も含む)の膜をさし、そ
の粒径とは、前記状態で粒子形状が認識可能な微粒子に
ついての径をいう。続いてフォトレジストをスピンコー
トし、フォトリソグラフィーによりH字状にパターニン
グし、電子放出部形成用薄膜4を酸エッチャントにより
エッチングして所望のパターンを形成した。ここで、H
字のくびれ部のサイズは幅10ミクロン、長さ300ミ
クロンである。 工程−b 次にフォトレジストをスピンコートし、フォトリソグラ
フィーによりパターニングし、その上に厚さ0.5ミク
ロンのシリコン酸化膜からなる熱の不良導体6をRFス
パッタ法により堆積する。続いて、レジストパターンを
有機溶剤で溶解し、熱の不良導体層6をリフトオフし
た。 工程−c 次にフォトレジストをスピンコートし、フォトリソグラ
フィーによりパターニングし、その上にAu/Cr膜を
1000オングストロームの厚さで堆積し、レジストパ
ターンを有機溶剤で溶解し、Au/Cr膜をリフトオフ
し、素子電極5を形成した。 工程−d 続いて、素子電極5にリード線をはんだ付けした後に、
電子放出部3を、電子放出部形成用薄膜2を通電処理
(フォーミング処理)することにより作成した。フォー
ミング処理の電圧波形を図4に示す。図4中、T1及び
T2は電圧波形のパルス幅とパルス間隔であり、本実施
例ではT1を1ミリ秒、T2を10ミリ秒とし、三角波
の波高値(フォーミング時のピーク電圧)は3Vとし、
フォーミング処理は約1×10マイナス6乗torrの
真空雰囲気下で60秒間行った。
EXAMPLES The present invention will be described in more detail below with reference to examples. (Example 1) The electron source shown in FIG. 3 was produced by the following steps. Step-a Organic Pd (ccp4230, manufactured by Okuno Chemical Industries Co., Ltd.) was spin-coated on the cleaned blue plate glass, and the coating was performed at 300 ° C. for 10 hours.
It was heated and baked for 1 minute. In addition, the film thickness of the electron emission portion forming thin film 4 made of fine particles of Pd as the main element thus formed was 100 angstrom, and the sheet resistance value was 5 × 10 4 Ω / □. Note that the fine particle film described here is a film in which a plurality of fine particles are aggregated as described above, and as a fine structure, not only the fine particles are individually dispersed and arranged, but also the fine particles are adjacent to each other or overlap each other. A film in a state (including an island shape) is referred to, and the particle diameter thereof means a diameter of fine particles whose particle shape can be recognized in the above state. Subsequently, a photoresist was spin-coated and patterned into an H shape by photolithography, and the electron emission portion forming thin film 4 was etched with an acid etchant to form a desired pattern. Where H
The size of the narrowed portion of the character is 10 microns wide and 300 microns long. Step-b Next, a photoresist is spin-coated, patterned by photolithography, and a heat-defective conductor 6 made of a silicon oxide film having a thickness of 0.5 μm is deposited thereon by RF sputtering. Subsequently, the resist pattern was dissolved in an organic solvent to lift off the heat-defective conductor layer 6. Step-c Next, a photoresist is spin-coated, patterned by photolithography, an Au / Cr film is deposited thereon to a thickness of 1000 Å, the resist pattern is dissolved in an organic solvent, and the Au / Cr film is lifted off. Then, the device electrode 5 was formed. Step-d Subsequently, after soldering the lead wire to the element electrode 5,
The electron emitting portion 3 was created by subjecting the electron emitting portion forming thin film 2 to an energization process (forming process). FIG. 4 shows the voltage waveform of the forming process. In FIG. 4, T1 and T2 are the pulse width and pulse interval of the voltage waveform. In this embodiment, T1 is 1 ms, T2 is 10 ms, and the peak value of the triangular wave (peak voltage during forming) is 3 V. ,
The forming treatment was performed for 60 seconds in a vacuum atmosphere of about 1 × 10 -6 torr.

【0026】このように作成された電子放出部3は、パ
ラジウム元素を主成分とする微粒子が分散配置された状
態となり、その微粒子の平均粒径は30オングストロー
ムであった。
In the electron-emitting portion 3 thus formed, fine particles containing palladium as a main component were dispersed and arranged, and the average particle diameter of the fine particles was 30 Å.

【0027】以上のような工程を経て、作成された電子
源は図6に示すような電気的特性(任意ユニット)を示
し、約1×10マイナス6乗torrの真空雰囲気下で
良好な電子放出特性を示した。比較のために、上記工程
−bを省略して、フォーミング時のピーク電圧を5V以
上にして電子源を作成したところ、ほぼ同等の電流−電
圧特性をもつことが確認された。すなわち、本発明によ
りフォーミングに必要な電力は60パーセント以下に抑
えることができた。 (実施例2)図7に本実施例の電子源の平面図および断
面図を示す。本実施例では絶縁性基板1上に素子電極
5、熱の不良導体6、電子放出部形成用薄膜2の順に作
成した。作成工程は以下のとおりである。 工程−a 清浄化した青板ガラス上にフォトレジストをスピンコー
トし、フォトリソグラフィーによりパターニングし、そ
の上にAu/Cr膜を1000オングストロームの厚さ
で堆積し、レジストパターンを有機溶剤で溶解し、Au
/Cr膜をリフトオフし、素子電極5を形成した。ここ
で素子電極5の端面にはバリが残っており、その高さは
複数の素子でばらつきがあった。 工程−b 次に酸化シリコンのアルコキシドをスピンコートし、加
熱焼成した。その後、フォトレジストをスピンコート
し、フォトリソグラフィーによりパターニングし、酸エ
ッチャントでエッチングし、熱の不良導体層6を作成し
た。 工程−c 次にフォトレジストをスピンコートし、フォトリソグラ
フィーによりH字状にパターニングし、その上に有機P
d(ccp4230奥野製薬(株)社製)をスピンコー
トし、300℃で10分間の加熱焼成処理をした。ま
た、こうして形成された主元素としてPdよりなる微粒
子からなる電子放出部形成用薄膜4の膜厚は100オン
グストローム、シート抵抗値は5×10の4乗Ω/□で
あった。ここで、H字のくびれ部のサイズは幅10ミク
ロン、長さ300ミクロンである。 工程−d 続いて、素子電極5にリード線をはんだ付けした後に、
電子放出部3を、電子放出部形成用薄膜2を通電処理
(フォーミング処理)することにより作成した。フォー
ミング条件は実施例1と同様である。
The electron source produced through the above-mentioned steps exhibits electric characteristics (arbitrary unit) as shown in FIG. 6, and excellent electron emission in a vacuum atmosphere of about 1 × 10 −6 torr. Characterized. For comparison, when the step-b was omitted and a peak voltage during forming was set to 5 V or more to produce an electron source, it was confirmed that the electron source had substantially the same current-voltage characteristics. That is, according to the present invention, the electric power required for forming could be suppressed to 60% or less. (Embodiment 2) FIG. 7 shows a plan view and a sectional view of an electron source of this embodiment. In this embodiment, the device electrode 5, the poor heat conductor 6 and the electron emission portion forming thin film 2 are formed in this order on the insulating substrate 1. The production process is as follows. Step-a A photoresist is spin-coated on the cleaned soda lime glass, patterned by photolithography, an Au / Cr film is deposited thereon to a thickness of 1000 Å, the resist pattern is dissolved in an organic solvent, and Au is deposited.
The / Cr film was lifted off and the device electrode 5 was formed. Here, burrs remained on the end faces of the device electrodes 5, and the heights thereof varied among the devices. Step-b Next, silicon oxide alkoxide was spin-coated and baked by heating. Then, a photoresist was spin-coated, patterned by photolithography, and etched by an acid etchant to form a poor heat conductive layer 6. Step-c Next, a photoresist is spin-coated, patterned into an H shape by photolithography, and an organic P layer is formed thereon.
d (ccp4230 Okuno Seiyaku Co., Ltd.) was spin-coated and heated and baked at 300 ° C. for 10 minutes. In addition, the film thickness of the electron emission portion forming thin film 4 made of fine particles of Pd as the main element thus formed was 100 angstrom, and the sheet resistance value was 5 × 10 4 Ω / □. Here, the size of the H-shaped constricted portion is 10 microns in width and 300 microns in length. Step-d Subsequently, after soldering the lead wire to the element electrode 5,
The electron emitting portion 3 was created by subjecting the electron emitting portion forming thin film 2 to an energization process (forming process). The forming conditions are the same as in Example 1.

【0028】このように作成された電子放出部3は、パ
ラジウム元素を主成分とする微粒子が分散配置された状
態となり、その微粒子の平均粒径は30オングストロー
ムであった。
In the electron-emitting portion 3 thus produced, fine particles containing palladium as a main component were dispersed and arranged, and the average particle diameter of the fine particles was 30 Å.

【0029】以上のような工程を経て、作成された電子
源は図6に示すような電気的特性(任意ユニット)を示
し、約1×10マイナス6乗torrの真空雰囲気下で
良好な電子放出特性を示した。さらに、同時に作成した
複数の素子のみならず、同一工程で作成した素子の電子
放出特性は極めて再現性のよいものであった。
The electron source produced through the above steps shows the electrical characteristics (arbitrary unit) as shown in FIG. 6, and has a good electron emission in a vacuum atmosphere of about 1 × 10 −6 torr. Characterized. Further, not only a plurality of devices produced at the same time but also the devices produced in the same process had extremely good reproducibility.

【0030】比較のために、上記工程−bを省略して、
電子源を複数作成した。熱の不良導体層6がない場合、
素子電極5のバリの影響でフォーミングのされかたにば
らつきが生じ、再現性のよい電子源を作成することはで
きなかった。つまり、熱の不良導体層をアルコキシドの
スピンコートという方法で作成したことによって、素子
電極のバリの高さに応じて厚めにコートされるようにな
り、バリのばらつきを自己補正する作用があると考えら
れる。 (実施例3)次に、実施例2の方法で作成した電子源を
用いて表示装置を構成した例を、図8を用いて説明す
る。
For comparison, the step-b is omitted, and
Created multiple electron sources. If there is no heat-defective conductor layer 6,
Due to the effect of burrs on the device electrode 5, the forming method varies, and an electron source with good reproducibility cannot be produced. In other words, by forming the poorly heat-conductive layer by the method of spin coating of alkoxide, it becomes thicker according to the height of the burr of the element electrode, and it has the effect of self-correcting the variation of the burr. Conceivable. (Embodiment 3) Next, an example in which a display device is configured by using the electron source created by the method of Embodiment 2 will be described with reference to FIG.

【0031】まず、基板1の上に表面伝導型電子放出素
子を作製した。ここで、電子源をマトリクス状に配置す
るために、実施例2の工程に加えて、素子電極を交差す
るための絶縁層、コンタクトホール等は通常の半導体プ
ロセスにより作成した。図8において、基板1をリアプ
レート81上に固定した後、基板1の5mm上方にフェ
ースプレート86(ガラス基板83の内面に蛍光膜84
とメタルバック85が形成されて構成される)を支持枠
82を介して配置し、フェースプレート86、支持枠8
2、リアプレート81の接合部にフリットガラスを塗布
し、大気中あるいは窒素雰囲気中で400℃ないし50
0℃で10分以上焼成することで封着した。またリアプ
レート81への基板1の固定もフリットガラスで行っ
た。74は電子放出素子、72、73はそれぞれX方向
及びY方向の配線である。蛍光膜84は、モノクローム
の場合は蛍光体のみから成るが、本実施例では蛍光体は
ストライプ形状を採用し、先にブラックストライプを形
成し、その間隙部に各色蛍光体を塗布し、蛍光膜84を
作製した。ブラックストライプの材料として通常良く用
いられている黒鉛を主成分とする材料を用い、ガラス基
板83に蛍光体を塗布する方法はスラリー法を用いた。
また、蛍光膜84の内面側には通常メタルバック85が
設けられる。メタルバックは、蛍光膜作製後、蛍光膜の
内面側表面の平滑化処理(通常フィルミングと呼ばれ
る)を行い、その後、Alを真空蒸着することで作製し
た。フェースプレート86には、更に蛍光膜84の導伝
性を高めるため、蛍光膜84の外面側に透明電極(不図
示)が設けられる場合もあるが、本実施例では、メタル
バックのみで十分な導伝性が得られたので省略した。前
述の封着を行う際、カラーの場合は各色蛍光体と電子放
出素子とを対応させなくてはいけないため、十分な位置
合わせを行った。
First, a surface conduction electron-emitting device was produced on the substrate 1. Here, in order to arrange the electron sources in a matrix, in addition to the steps of Example 2, an insulating layer, a contact hole and the like for intersecting the device electrodes were formed by a normal semiconductor process. In FIG. 8, after the substrate 1 is fixed on the rear plate 81, the face plate 86 (the fluorescent film 84 on the inner surface of the glass substrate 83 is provided 5 mm above the substrate 1.
And a metal back 85 are formed through the support frame 82, and the face plate 86 and the support frame 8 are disposed.
2. Frit glass is applied to the joint portion of the rear plate 81, and the temperature is 400 ° C to 50 ° C in the air or nitrogen atmosphere.
It was sealed by baking at 0 ° C. for 10 minutes or more. The frit glass was also used to fix the substrate 1 to the rear plate 81. 74 is an electron-emitting device, and 72 and 73 are wirings in the X and Y directions, respectively. In the case of monochrome, the fluorescent film 84 is composed of only the fluorescent substance, but in the present embodiment, the fluorescent substance adopts a stripe shape, and a black stripe is first formed, and the fluorescent substance of each color is applied to the gap, and the fluorescent film is formed. 84 was produced. A material having graphite as a main component, which is commonly used as a material for the black stripe, is used, and a slurry method is used as a method for applying the phosphor to the glass substrate 83.
A metal back 85 is usually provided on the inner surface side of the fluorescent film 84. The metal back was manufactured by performing a smoothing process (usually called filming) on the inner surface of the fluorescent film after manufacturing the fluorescent film, and then vacuum-depositing Al. The face plate 86 may be provided with a transparent electrode (not shown) on the outer surface side of the fluorescent film 84 in order to further enhance the conductivity of the fluorescent film 84, but in the present embodiment, only a metal back is sufficient. The conductivity was obtained, so it was omitted. When performing the above-mentioned sealing, in the case of a color, the phosphors of the respective colors and the electron-emitting devices have to correspond to each other, so that sufficient alignment is performed.

【0032】以上のようにして完成したガラス容器内の
雰囲気を排気管(図示せず)を通じ真空ポンプにて排気
し、十分な真空度に達した後、容器外端子Dxo1ないし
DoxmとDoy1ないしDoynを通じ電子放出素子74の
電極5間に電圧を印加し、電子放出部3を、電子放出部
形成用薄膜2を通電処理(フォーミング処理)すること
により作成した。フォーミング条件は実施例2と同様で
ある。このように作成された電子放出部3は、パラジウ
ム元素を主成分とする微粒子が分散配置された状態とな
り、その微粒子の平均粒径は30オングストロームであ
った。
The atmosphere inside the glass container completed as described above is exhausted by a vacuum pump through an exhaust pipe (not shown), and after reaching a sufficient degree of vacuum, the external terminals Dxo1 to Doxm and Doy1 to Doyn. A voltage is applied between the electrodes 5 of the electron-emitting device 74 through, and the electron-emitting portion 3 is formed by energizing (forming) the electron-emitting portion forming thin film 2. The forming conditions are the same as in the second embodiment. In the electron emitting portion 3 thus produced, fine particles containing palladium element as a main component were dispersed and arranged, and the average particle diameter of the fine particles was 30 angstrom.

【0033】次に10のマイナス6乗トール程度の真空
度で、不図示の排気管をガスバーナーで熱することで溶
着し外囲器の封止を行った。
Next, an exhaust pipe (not shown) was heated by a gas burner to be welded at a vacuum degree of about 10 −6 torr to seal the envelope.

【0034】最後に封止後の真空度を維持するために、
ゲッター処理を行った。これは、封止を行う直前に、高
周波加熱等の加熱法により、画像形成装置内の所定の位
置(不図示)に配置されたゲッターを加熱し、蒸着膜を
形成処理した。ゲッターはBa等を主成分とした。
Finally, in order to maintain the degree of vacuum after sealing,
Getter processing was performed. Immediately before sealing, a getter placed at a predetermined position (not shown) in the image forming apparatus was heated by a heating method such as high-frequency heating to form a vapor deposition film. The getter was mainly composed of Ba or the like.

【0035】以上のように完成した本発明の画像表示装
置において、各電子放出素子には、容器外端子Dx1な
いしDxm、Dy1ないしDynを通じ、走査信号及び
変調信号を不図示の信号発生手段よりそれぞれ、印加す
ることにより、電子放出させ、高圧端子Hvを通じ、メ
タルバック85に数kV以上の高圧を印加し、電子ビー
ムを加速し、蛍光膜84に衝突させ、励起・発光させる
ことで画像を表示した。
In the image display device of the present invention completed as described above, the scanning signal and the modulation signal are respectively supplied to the electron-emitting devices from the signal generating means (not shown) through the terminals Dx1 to Dxm and Dy1 to Dyn outside the container. , Is applied to cause electrons to be emitted, and a high voltage of several kV or more is applied to the metal back 85 through the high-voltage terminal Hv to accelerate the electron beam, collide with the fluorescent film 84, and cause excitation / light emission to display an image. did.

【0036】[0036]

【発明の効果】以上説明した様に、本発明によればフォ
ーミング時に必要な電力量を小さく抑えることができる
ので、表示装置全体を構成する上で放熱等を考える際、
余裕がある。さらに、電子放出材料からなる薄膜の中心
に近い部分に給電箇所を設けることにより、素子形成上
のばらつきを小さくする効果があり、各電子源の電子放
出量が均一になり、画像表示の品位を向上させることが
できる。
As described above, according to the present invention, the amount of electric power required at the time of forming can be suppressed to a low level. Therefore, when considering heat radiation or the like when configuring the entire display device,
Afford. Furthermore, by providing a power supply location near the center of the thin film made of an electron-emitting material, there is an effect of reducing variations in element formation, the electron emission amount of each electron source becomes uniform, and the quality of image display is improved. Can be improved.

【図面の簡単な説明】[Brief description of drawings]

【図1】本発明の一例を示す電子源材料の平面図及び断
面図。
1A and 1B are a plan view and a cross-sectional view of an electron source material showing an example of the present invention.

【図2】本発明の電子源材料の他の例を示す平面図及び
断面図。
FIG. 2 is a plan view and a cross-sectional view showing another example of the electron source material of the present invention.

【図3】本発明の電子源の基本的な製法図。FIG. 3 is a basic manufacturing method diagram of the electron source of the present invention.

【図4】フォーミング処理の電圧波形を示す図。FIG. 4 is a diagram showing a voltage waveform of a forming process.

【図5】電子放出特性を測定するための測定評価装置の
概略構成図。
FIG. 5 is a schematic configuration diagram of a measurement / evaluation apparatus for measuring electron emission characteristics.

【図6】放出電流Ie 及び素子電流If と素子電圧Vf
の典型的な例を示す図。
FIG. 6 shows an emission current I e, a device current I f, and a device voltage V f.
The figure which shows the typical example of.

【図7】本発明の電子源の他の例を示す平面図及び断面
図。
7A and 7B are a plan view and a cross-sectional view showing another example of the electron source of the present invention.

【図8】本発明の電子源を用いて構成した表示装置の斜
視図。
FIG. 8 is a perspective view of a display device configured using the electron source of the present invention.

【図9】従来の電子源の平面図及び断面図。FIG. 9 is a plan view and a sectional view of a conventional electron source.

【符号の説明】[Explanation of symbols]

1 絶縁性基板 2 電子放出部形成用薄膜 3 電子放出部 4 電子放出部を含む薄膜 5 素子電極 6 熱の不良導体 7 給電箇所 30 電流計 31 電源 32 電流計 33 電源 34 アノード電極 72 X方向配線 73 Y方向配線 74 電子源 81 電子源を固定したリアプレート 82 支持枠 83 ガラス基板 84 蛍光膜 85 メタルバック 86 フェースプレート DESCRIPTION OF SYMBOLS 1 Insulating substrate 2 Electron emission part forming thin film 3 Electron emission part 4 Thin film including electron emission part 5 Element electrode 6 Heat defective conductor 7 Power feeding point 30 Ammeter 31 Power supply 32 Ammeter 33 Power supply 34 Anode electrode 72 X direction wiring 73 Y-direction wiring 74 Electron source 81 Rear plate on which the electron source is fixed 82 Support frame 83 Glass substrate 84 Fluorescent film 85 Metal back 86 Face plate

Claims (5)

【特許請求の範囲】[Claims] 【請求項1】 素子電極と電子放出材料からなる薄膜と
を有する電子源材料において、素子電極と前記薄膜との
界面の少なくとも一部に熱の不良導体を介してなること
を特徴とする電子源材料。
1. An electron source material having a device electrode and a thin film made of an electron emitting material, wherein a poor heat conductor is interposed at least at a part of an interface between the device electrode and the thin film. material.
【請求項2】 前記電子放出材料からなる薄膜の中心に
近い部分に給電箇所を形成したことを特徴とする請求項
1記載の電子源材料。
2. The electron source material according to claim 1, wherein a power feeding portion is formed in a portion near a center of the thin film made of the electron emitting material.
【請求項3】 請求項1又は2記載の電子源材料の素子
電極間に真空雰囲気下で電圧を付与するように通電処理
を行うことを特徴とする電子源の製法。
3. A method of manufacturing an electron source, wherein an energization process is performed so that a voltage is applied between the element electrodes of the electron source material according to claim 1 in a vacuum atmosphere.
【請求項4】 請求項3記載の方法により製造した電子
源。
4. An electron source manufactured by the method of claim 3.
【請求項5】 請求項4記載の電子源を組込んでなる画
像形成装置。
5. An image forming apparatus incorporating the electron source according to claim 4.
JP27521093A 1993-11-04 1993-11-04 Manufacture of electron source material and electron source, and electron source and image forming device Pending JPH07130280A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP27521093A JPH07130280A (en) 1993-11-04 1993-11-04 Manufacture of electron source material and electron source, and electron source and image forming device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP27521093A JPH07130280A (en) 1993-11-04 1993-11-04 Manufacture of electron source material and electron source, and electron source and image forming device

Publications (1)

Publication Number Publication Date
JPH07130280A true JPH07130280A (en) 1995-05-19

Family

ID=17552234

Family Applications (1)

Application Number Title Priority Date Filing Date
JP27521093A Pending JPH07130280A (en) 1993-11-04 1993-11-04 Manufacture of electron source material and electron source, and electron source and image forming device

Country Status (1)

Country Link
JP (1) JPH07130280A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100860894B1 (en) * 2005-07-25 2008-09-29 캐논 가부시끼가이샤 Electron-emitting device, electron source, display apparatus and information display apparatus using the same device, and manufacturing methods of them

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100860894B1 (en) * 2005-07-25 2008-09-29 캐논 가부시끼가이샤 Electron-emitting device, electron source, display apparatus and information display apparatus using the same device, and manufacturing methods of them

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