JP3142083B2 - Wideband frequency synthesizer - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a phase locked loop frequency synthesizer, and more particularly to a frequency synthesizer having good output phase noise in a wide frequency range.

[0002]

2. Description of the Related Art FIG. 3 is a diagram showing a configuration of a conventional phase locked loop frequency synthesizer.

In this conventional example, a reference signal from a reference signal source 17 is input to one input terminal of a phase comparator 15, and an output signal of the phase comparator 15 is a low-pass filter 1.
6 through a voltage controlled oscillator (hereinafter referred to as "VCO")
11 frequency control terminals. Voltage controlled oscillator 1
The output signal of No. 1 is taken out from the output terminal of the frequency synthesizer and applied to the variable frequency divider 14 to be frequency-divided. The frequency-divided signal is fed back to the other input terminal of the phase comparator 15 to form a phase locked loop.

As described above, the frequency of the output signal of the VCO 11 is divided, the phase of the output signal is compared with that of the reference signal, and the output signal proportional to the error is output via the low-pass filter 16 to the VCO 1.
By giving the control signal to one control input, a highly stable output signal synchronized with the reference signal can be extracted from the output terminal of the frequency synthesizer.

The amount of phase noise (the phenomenon that the output frequency of the frequency synthesizer varies with time) in such a frequency synthesizer is composed of a VCO 11, a variable frequency divider 14, a phase comparator 15, and a low-pass filter 16. The open loop gain G (s) is determined by the following equation (1), which is determined by the open loop gain G (s) of the phase locked loop (hereinafter, referred to as “PLL”). G (s) = {Kv · Kd · F (s)} / (N · s) (1) where Kv is the modulation sensitivity of the VCO 11, Kd is the sensitivity of the phase comparator 15, and F (s) is the low-pass. The transfer function of the filter 16, N is the frequency division ratio, and s is jω.

[0006]

However, the conventional frequency synthesizer has an open loop gain G depending on the output frequency.
(S) changes, which causes a problem that the amount of phase noise fluctuates.

This factor is mainly because the modulation sensitivity of the VCO 11 varies depending on the oscillation frequency. VCO11
FIG. 4 shows an example of a change in the oscillation frequency with respect to the frequency control voltage.
Is the slope of the curve in FIG. In the example shown in FIG.
The highest value of the modulation sensitivity Kv of CO11 is 2 to its lowest value.
It is tripled. The reason why the modulation sensitivity Kv fluctuates due to the frequency control voltage is that the CV curve of the varactor in the VCO 11 is not linear, and that the relationship between the capacitance value of the varactor and the resonance frequency is not linear. It is. Therefore, in the conventional frequency synthesizer, the frequency range in which the output can be taken out in a state where the phase noise is low is limited, and the frequency range in which the output can be taken out in a state where the phase noise is low cannot be widened.
That is, it is not possible to obtain a good frequency synthesizer having a phase noise characteristic over a wide band.

It is an object of the present invention to provide a frequency synthesizer having a good phase noise characteristic over a wide band.

[0009]

The present invention comprises a reference signal source, a first PLL, a second PLL, and a mixer, wherein the first PLL includes a first variable frequency divider, a first variable frequency divider, and a first variable frequency divider. A first phase comparator that compares the phase of the output signal of the variable frequency divider with the reference signal, a first low-pass filter, a first VCO, and a first VCO.
Of the VCO of the second PLL and the output signal of the second VCO in the second PLL.
And a mixer for supplying to the variable frequency divider of
LL is a second variable frequency divider, a second phase comparator for comparing the phase of the output signal of the second variable frequency divider with the reference signal, a second low-pass filter, and a second VCO. And the absolute value of the difference between the frequency division ratio of the first variable frequency divider and the frequency division ratio of the second variable frequency divider is kept at a predetermined constant value, and the output signal of the mixer is output to the frequency synthesizer. It is extracted as an output signal.

[0010]

According to the present invention, since the frequency synthesizer outputs a signal obtained by mixing the output signal of the first VCO and the output signal of the second VCO by the mixer, the oscillation frequencies of the first and second VCOs are superposed. The frequency (sum or difference frequency) becomes the output frequency of the frequency synthesizer, and the output signal of the second VCO is supplied to the first variable frequency divider via the mixer. Then the second VC
The phase noise of O is suppressed, and the amount of phase noise is determined by the modulation sensitivity of the first VCO. Therefore, the phase noise characteristic is always constant, and a good frequency synthesizer with a wide phase noise characteristic can be realized.

[0011]

FIG. 1 is a block diagram showing an embodiment of a frequency synthesizer according to the present invention.

This embodiment includes a reference signal source 10, a first PLL (phase locked loop), a second PLL (phase locked loop), and a mixer 3.

The first PLL has a first frequency-variable ratio.
, A first phase comparator 5 for comparing the phase of the output signal of the first variable frequency divider 4 with the reference signal from the reference signal source 10, and a first phase comparator 5 A first low-pass filter 6 for removing high-frequency components from the output signal of the first, a first VCO (voltage controlled oscillator) 1 for controlling an output oscillation frequency according to an output voltage of the first low-pass filter 6, and a first
Of the VCO1 and the second VCO in the second PLL.
The mixer 3 mixes the output signal of the CO 2 and supplies the mixed signal to the first variable frequency divider 4.

The second PLL includes a second variable frequency divider 7 whose frequency division ratio is variable, and a phase between an output signal of the second variable frequency divider 7 and a reference signal from a reference signal source 10. , A second low-pass filter 9 for removing high-frequency components from the output signal of the second phase comparator 8, and an output corresponding to the output voltage of the second low-pass filter 9. The second V is supplied to the second variable frequency divider 7 by controlling the oscillation frequency.
It is composed of CO2.

The absolute value of the difference between the frequency dividing ratio N of the first variable frequency divider 4 and the frequency dividing ratio M of the second variable frequency divider 7 is maintained at a predetermined constant value. The signal is taken out as an output signal of the frequency synthesizer.

Next, the operation of the above embodiment will be described.

First, the frequency of a signal (output signal of the frequency synthesizer) obtained from the output terminal of the mixer 3 is represented by f
_OUT , the oscillation frequency of the first _VCO 1 is f _VCO 1, the second _VCO 1
The oscillation frequency of CO 2 is f _VCO 2, the frequency division ratio of the first variable frequency divider 4 is N, the frequency division ratio of the second variable frequency divider 7 is M, and the reference frequency which is the frequency of the reference signal is f _REF. Then, f _OUT = f _VCO 2 ± f _VCO 1 (2) f _OUT = f _REF · N (3) f _VCO 2 = f _REF · M (4) Note that the complex ± in the equation (2) uses + when the output frequency of the mixer 3 is the sum of the input frequencies and uses − when the output frequency is a difference. In the above embodiment, either of them can be applied. .

When the output frequency of the mixer 3 is the sum of the input frequencies, from equations (2) to (4), f _VCO 1 = f _REF · (N−M), and the output frequency of the mixer 3 is the input frequency. _FVCO1 = _{fREF.multidot.} (M-N).

By the way, in the above embodiment, the dividing ratios N and M
Is maintained at a constant value, and the frequency division ratios N and M are switched to predetermined values. Here, since the difference between the frequency division ratios N and M is a constant value, the right sides of the above two equations are unchanged, and the oscillation frequency f _VCO 1 of the first _VCO 1 is fixed. Further, under the condition that the difference between the dividing ratios N and M is kept constant, if the dividing ratio N is arbitrarily switched,
According to f _OUT = f _REF · N shown in equation (3),
The output frequency of the frequency synthesizer (the output frequency of the mixer 3) can be arbitrarily switched.

The output phase noise φout, n at this time is PL
What is necessary is just to analyze based on L noise equation [1]. The details of the PLL noise equation [1] are described in “V.
F. Kroupa, IEEE Trans. Com. ,
vol. COM-30, pp. 2244-2253, O
ct. 1982 ".

FIG. 2 is a block diagram in which an additional noise source is added to the embodiment shown in FIG.

Note that the subscript n represents noise, and Kv is the first
, Kd is the sensitivity of the first phase comparator 5, F (s) is the transfer function of the first low-pass filter 6,
N is the frequency division ratio and s is jω.

Here, when the output of the mixer 3 has the sum frequency, the following equation (6) is obtained by solving the circuit equation for the noise φ 01, n of the signal input to the mixer 3 from the first PLL. .

[0024]

(Equation 1) Since the output of the mixer 3 is the sum frequency, φout, n = φ01, n + φ02, n (7). From the equations (6) and (7), the phase noise φout, n of the output signal of the frequency synthesizer is obtained. Becomes the following equation (8).

[0025]

(Equation 2) In the band of the first PLL, the following equation (9) holds.

[0026]

(Equation 3) That is, in the band of the first PLL, the output frequency of the first VCO 1 is close to the carrier, so that s (= jω)
Is small, and the transfer function F of the first low-pass filter 6 is small.
(S) becomes large, and therefore [{KdKvF (s)} / (Ns)] on the left side of the left expression of the expression (9) becomes much larger than 1, and (9) The left side of the expression on the left of the expression) is almost the same as 1. Similarly, [{Kd · Kv · F (s)} / (N · s)] in the left side of the right expression of the expression (9) becomes much larger than 1 and the right expression of the expression (9) The left side of the equation is almost the same as 0.

Outside the band of the first PLL, the following (10)
The equation holds.

[0028]

(Equation 4) That is, since the output frequency of the first VCO 1 is far from the carrier outside the band of the first PLL, s (= jω)
Is large, and the transfer function F of the first low-pass filter 6 is
(S) is reduced, and therefore [{KdKvF (s)} / (Ns)] in the left side of the left expression of the expression (10).
Becomes much smaller than 1, and the left side of the left expression of the expression (10) becomes almost the same as 0. Similarly, [{Kd ・ Kv ・ F (s)} / (N ・) in the left side of the right side of the equation (10)
s)] is much smaller than 1, and the left side of the right expression of Expression (10) is almost the same as 1.

Therefore, from the equations (9) and (10), within the band of the first PLL, the phase noise φout, n becomes the following (1)
1) is obtained by the equation,

[0030]

(Equation 5) Outside the band of the first PLL, the phase noise φout, n is obtained by the following equation (12). φout, n ≒ φ02, n + φ _VCO 1, n (12) From equations (11) and (12), within the band of the first PLL, the phase noise φ02, n of the second PLL is the output phase noise. , And the phase noise φ02, n appears only outside the band of the first PLL. For this, the second P
In the LL, there is no need to suppress the phase noise φ 02, n by a loop at all, and the second VCO 2 may be free running noise. That is, the cutoff frequency of the low-pass filter 9 may be sufficiently low. At this time, the noise φ02, n
Since is the same as the noise φ _VCO 2, n, the equation (12) can be rewritten into the following equation (13). φout, n ≒ φ _VCO 2, n + φ _VCO 1, n (13) From the above, the phase noise of the output signal of the frequency synthesizer is the sum of the noise of the components of the first PLL in the band, and Two VCs outside the band of one PLL
It is the sum of the free-run noises of O1 and VCO2, and it can be seen that the band is determined by the open loop gain of the first PLL. Since the oscillation frequency of the first VCO 1 is fixed (the output frequency of the first VCO 1 after phase synchronization is kept constant), the modulation sensitivity of the first VCO 1 is always constant. For this reason, even if the frequency of the output signal of the frequency synthesizer is switched, the open loop gain of the first PLL hardly changes, so that the phase noise characteristic of the frequency synthesizer can be kept constant over a wide band.

When the noise equation is solved in the same manner as above when the output of the mixer 3 is at the difference frequency, the equation (6) becomes
The following equation (14) is obtained.

[0032]

(Equation 6) Further, since the output of the mixer 3 is the difference frequency, φout, n = φ02, n−φ01, n (15). From the expressions (14) and (15), the phase noise φout of the output signal of the frequency synthesizer is obtained. , n are obtained by the following equation (16).

[0033]

(Equation 7) In the band of the first PLL, the following equation (17) is established,

[0034]

(Equation 8) Outside the band of the first PLL, the following equation (18) holds.

[0035]

(Equation 9) Therefore, from the expressions (17) and (18), the first PLL
, The phase noise φout, n is obtained by the following equation (19).

[0036]

(Equation 10) Outside the band of the first PLL, the phase noise φout, n is obtained by the following equation (20). φout, n ≒ φ02, n + φ VCO 1, n ...... (20) Thus, even the difference frequency be an output signal is the sum frequency mixer 3, as well as achieve good phase noise characteristic over a wide band it can.

FIG. 5 is a diagram showing a conventional frequency synthesizer using a super heterodyne down converter.

The conventional example shown in FIG.
1 and the output signal of the local oscillator 22
3 and mixes the output signal of the mixer 23 with the variable frequency divider 2
4, the phase of the frequency-divided signal and the reference signal of the reference signal source 27 are compared by the phase comparator 25, and the signal is fed back to the VCO 21 via the low-pass filter 26. The output signal of the VCO 21 is output from the frequency synthesizer. It is extracted as an output signal.

Therefore, the conventional example shown in FIG.
It is similar to the above embodiment, but completely different from the above embodiment. First, in the conventional example shown in FIG.
Reference numeral 3 is used for lowering the input frequency of the variable frequency divider 24, and the output phase noise of the frequency synthesizer is the sum of the phase noises of the two oscillators 21 and 22. Therefore, the problem that the phase noise characteristic changes when the output frequency is varied in a wide band cannot be solved.

The following differences exist between the conventional example shown in FIG. 5 and the above embodiment due to the configuration. First, in the conventional example shown in FIG. 5, the output signal of the frequency synthesizer is extracted from the input terminal of the mixer 23, but in the above embodiment, it is extracted from the output terminal of the mixer 3. Further, in the conventional example shown in FIG. 5, the oscillation frequency of the VCO 21 is made variable over a wide band.
7 by keeping the difference of the dividing ratio of the first VCO
Is fixed. And in the above embodiment,
The phase noise of the second VCO 2 that varies the frequency is not output within the band.

[0041]

According to the present invention, there is an effect that the phase noise characteristic of the frequency synthesizer is good over a wide band.

[Brief description of the drawings]

FIG. 1 is a block diagram showing one embodiment of a frequency synthesizer of the present invention.

FIG. 2 is a block diagram in which an additional noise source is added to the embodiment.

FIG. 3 is a diagram showing a configuration of a conventional phase locked loop frequency synthesizer.

FIG. 4 is a diagram illustrating an example of a change in an oscillation frequency with respect to a frequency control voltage in a VCO.

FIG. 5 is a diagram showing a conventional frequency synthesizer using a super heterodyne down converter.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 ... 1st VCO, 2 ... 2nd VCO, 3 ... Mixer 4 ... 1st variable frequency divider 5 ... 1st phase comparator 6 ... 1st low-pass filter 7 ... 2nd 8: second phase comparator, 9: second low-pass filter, 10: reference signal source.

──────────────────────────────────────────────────続 き Continuation of the front page (56) References JP-A-1-314427 (JP, A) JP-A-3-148916 (JP, A) JP-A-3-171822 (JP, A) JP-A-3-314 270512 (JP, A) KROUPA VF, "Noise Properties of PLL Systems", IEEE Transactions on Communications, vol. COM-30, no. 10, OCT, 1982, pp. 2244-2252 (58) Fields investigated (Int. Cl. ⁷ , DB name) H03L ^7/ 16-7/22

Claims (1)

(57) [Claims] 1. A reference signal source, a first phase-locked loop, a second phase-locked loop, and a mixer, wherein the first phase-locked loop has a first frequency-variable ratio.
, A first phase comparator for comparing the phase of the output signal of the first variable frequency divider with the reference signal from the reference signal source, and the output of the first phase comparator A first low-pass filter for removing high-frequency components from the signal;
A first voltage-controlled oscillator that controls an output oscillation frequency in accordance with an output voltage of the low-pass filter, and an output signal of the first voltage-controlled oscillator and a second voltage-controlled oscillator in the second phase-locked loop. And a mixer that mixes the output signal with the output signal and supplies the mixed signal to the first variable frequency divider.
, A second phase comparator for comparing the phase of the output signal of the second variable frequency divider with the reference signal from the reference signal source, and the output of the second phase comparator A second low-pass filter for removing high-frequency components from the signal;
A second voltage-controlled oscillator that controls an output oscillation frequency according to the output voltage of the low-pass filter and supplies the second variable frequency divider to the second variable frequency divider; and a frequency division ratio of the first variable frequency divider. A wideband frequency synthesizer, characterized in that the absolute value of the difference between the frequency and the frequency division ratio of the second variable frequency divider is kept at a predetermined constant value, and the output signal of the mixer is extracted as the output signal of a frequency synthesizer.