JP3116438B2 - Inspection apparatus and inspection method for printed wiring board - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an inspection apparatus for detecting a defect shape of a wiring pattern on a printed wiring board.

[0002]

2. Description of the Related Art In a manufacturing process of a wiring pattern on a printed wiring board, a defect shape due to disconnection, short circuit, chipping, adhesion of dust and the like may occur. Therefore, various inspection devices for detecting such a defect shape have been proposed. Such an inspection device includes an imaging device such as a CCD camera that reads a wiring pattern on a printed wiring board, an A / D converter that converts an analog signal of the imaging device into a digital signal, and a defect shape from the digital image signal. There is an inspection apparatus having defect detection means for detecting. As this defect detection means, there is one using a feature extraction method as an inspection algorithm.

In the inspection apparatus using the above-described inspection algorithm, the pseudo defect shape may be output as a false report. Therefore, the pseudo defect shape is image-recognized by using a non-defective standard substrate, and a mask is set at a conforming point. A mask for performing the above-described process is prepared, and the true defect data is detected by comparing the mask with defect candidate data from the substrate to be inspected. That is, as shown in FIGS. 15 and 16, in the inspection of the wiring pattern 90, the inspection device may determine that the fragment portion 91 and the short-circuit portion 92 have a defect shape. However, actually, the fragment portion 91 is an open end of a normal pattern even if it looks like a disconnection, and the short-circuit portion 92 is a normal connection portion.

Therefore, in such a case, a defect detecting means for selecting whether or not the data is true defect data is required. Conventionally,
Inspection equipment for this purpose is to inspect the wiring pattern of a normal standard board,
That is, there is a device that registers pseudo defect data in a memory and verifies the data at the time of actual inspection. That is, during the actual inspection, when inspecting the wiring pattern of the substrate to be inspected, the pseudo defect data in the memory is read out and compared with the defect candidate data detected from the wiring pattern. If the defect candidate data matches the pseudo defect data, the defect candidate data is determined to be not true defect data, and if not, it is determined to be true defect data. In the comparison, a mask table in which a mask is applied to a portion of the pseudo defect data is used.

FIG. 17 shows the above-mentioned determination method. That is, the pseudo defect data obtained from the normal wiring pattern is registered in the mask table 96. The cells 961 and 969 are masked as pseudo defect data in the mask table (this is referred to as mask data). Cells 962 to 967 that are not pseudo defect data are not masked. On the other hand, in the data table 95 obtained from the inspected wiring pattern, defect candidate data detected as a defect shape are stored in cells 951, 953, and 959. Therefore, the mask table 96 and the data table 95
Are compared, the defect candidate data of the cells 951 and 959 among the three defect candidate data coincide with the cells 961 and 969 of the pseudo defect data. Therefore, it is determined that the two data are not the defect shapes. On the other hand, the cell 953 of the defect candidate data is determined to be true defect data 973 because there is no matching pseudo defect data.

In the above inspection, the position of the standard substrate at the time of registering the pseudo defect data is made to coincide with the position of the substrate to be inspected. However, a slight displacement actually occurs. For this reason, the position of the mask based on the pseudo defect data is shifted, and accurate inspection cannot be performed. For example, if the mask dimension is 200 μm and the variation in the positioning between the standard substrate and the substrate to be inspected is ± 50 μm, the conforming point recognized as the defect candidate shape on the substrate to be inspected may deviate from the mask position. is there.

Therefore, in the above inspection method, in order to prevent false defect leakage in the collation processing, that is, to prevent the defect data from being judged as true defect data despite being originally pseudo defect data, masking of the data table is performed. Position correction is required. Therefore, the following two means are generally used as the position correcting means. One of them is an enlarged mask method in which a large mask is provided. Another method is to add alignment by image processing to improve positioning accuracy.

In the enlarged mask method, as shown in FIG. 18, in the mask table 81, a range to be masked is set around a cell 815 of the pseudo defect data and cells 811 to 814 and 816 to 819 adjacent thereto. 9 times as large as. Then, as shown in FIG. 19, in the data table 82, the defect candidate data cell 828 obtained in the inspection object is compared with the enlarged mask cells 811 to 819 in the mask table 81. As a result of the comparison, since the defect candidate data cell 828 is in the enlarged mask cells 811 to 819, it is determined that it is not true defect data. Further, a method of adding alignment by one image processing is a method of performing image processing of another system and correcting positional deviation.

[0009]

However, in the above-described enlarged mask method, when the printed wiring board has a fine (precision) pattern, defect candidate data close to a position corresponding to a mask cell is a true defect due to the enlarged mask. It is determined that it is not data. Therefore, there is a problem that the true defect data may be missed. Also,
The latter alignment method requires an image processing apparatus of another system, so that the cost of the apparatus is high, and the time required for alignment is long and the productivity is low. SUMMARY OF THE INVENTION The present invention has been made in view of the above circumstances, and an object of the present invention is to provide an inspection apparatus for a printed wiring board which can perform an accurate inspection without overlooking true defect data and does not require a positional deviation correction.

[0010]

An inspection apparatus according to the present invention comprises: an imaging device for reading a wiring pattern on a printed wiring board; and a defect detection device for selecting whether or not the data is true defect data based on an image signal of the imaging device. And data compiling means for compiling the true defect data selected by the defect detecting means. Then, the defect detecting means includes a pattern to be extracted.
Algorithm is used to reduce the
In addition to developing on a spatial filter composed of units, it also recognizes the defect shape when creating a mask and increases the area of points that match the algorithm with pseudo defect registration algorithm data. An algorithm setting CPU unit for writing inspection algorithm data for reducing the area of the conforming point smaller than the area of the conforming point of the pseudo defect registration algorithm data to the inspection algorithm unit; Based on the algorithm data, the binary image of the standard board is shape-recognized and pseudo defect data is output. On the other hand, at the time of inspection, the binary image of the board to be inspected is shape-recognized based on the algorithm data for inspection to generate defect candidate data. An inspection algorithm section to be output; A matching data correction unit that corrects both the matching data from the inspection algorithm unit in units of mask resolution and outputs the corrected data as a corrected defect shape matching data; and a corrected defect shape matching data from the matching data correction unit when the mask is created. And a mask matching unit for comparing the corrected defect shape matching data from the matching data correcting unit during inspection with the mask data from the mask memory unit. .

In the present invention, the most remarkable thing is
The algorithm set CPU unit as a defect detection device, the inspection algorithm unit, adapted data correction unit, in addition to providing the mask memory unit and the mask verification unit, Pas to be extracted
Turn features smaller than mask resolution as algorithm
When expanded on a spatial filter composed of small units,
In addition, the algorithm data of the spatial filter constituting the inspection algorithm section is divided into those for creating a pseudo defect mask and those for inspection. The above pseudo defect registration algorithm data is used to extract patterns to be able to recognize shapes to be detected in a wider area than at the time of inspection when creating a mask.
Adjusting the characteristics of over emissions, that is, data to be written to the inspection algorithm unit you increase the total area of the fit point (pixel images) of algorithm for the detection feature.

The inspection algorithm data is based on a rule that focuses only on the inability to recognize a detected shape at the time of inspection. Shape recognition is performed, but the area of algorithm matching points at that time is made relatively small. Next, the data to be written to the inspection algorithm section. Then, by using these two data at the time of creating a pseudo defect mask (pseudo defect registration) and at the time of inspection, a pseudo defect mask having an optimal size can be applied to an optimal position.

That is, when the center position of the conforming point when the input image conforms to the algorithm set by the inspection algorithm unit is located at the end of one mask cell described later (the size of the mask cell is smaller than the pixel). Is also large), depending on the size of the matching point portion, the matching point will be located on the adjacent mask cell. Then, the mask data is generated at the position of the mask cell where the matching point is applied by the operation of the matching data correction unit described later (same as the corrected pseudo defect data described later) and stored in the mask memory. At the time of registering a pseudo defect, algorithm data for increasing the area of a conforming point in accordance with an arbitrary position correction amount is set in the inspection algorithm unit using this phenomenon. This makes it possible to create a pseudo defect mask having an optimal size at an optimal position.

The pseudo defect data is used to create a mask.
This is data created by recognizing the shape of a binary image of a standard substrate based on the above pseudo defect registration algorithm data. That is, the pseudo defect data is pseudo data that is inspected using a normal wiring pattern of a standard substrate and is recognized as a pseudo defect shape as if it were a defect shape, although it is originally a normal shape. . The pseudo-defect data is corrected as described later in the matching data correction unit, and is recorded in the mask memory unit as mask data. The defect candidate data is data created by recognizing the shape of a binary image of the substrate to be inspected based on the inspection algorithm data. That is, the defect candidate data is a shape that is temporarily detected as a defect shape when inspecting a wiring pattern of a printed wiring board that is an object to be inspected, that is, data that is recognized as a defect candidate shape. The defect candidate data is corrected in the matching data correction unit as described later, and is compared with the mask.

The conforming data correction unit corrects the pseudo defect data and the defect candidate data in units of mask resolution, and outputs the former corrected defect shape conforming data to the mask memory unit. Further, the latter corrected defect shape conformance data is output to the mask collating unit at the time of inspection. The resolution unit of the mask refers to the size of an image of the mask stored in one memory cell of the mask memory unit.

The matching by the mask matching unit is performed by correcting the corrected defect shape matching data of the pseudo defect data created by the matching data correcting unit, ie, the mask data read from the mask memory unit and the defect candidate data. This is performed between the corrected defect shape matching data. The data tabulation unit is a unit that tabulates and records the data determined by the defect detection unit. In addition, since an image signal output from an imaging device is generally an analog signal, it is converted into a digital signal by an A / D converter to obtain a binary image.

[0017]

In the inspection using the inspection apparatus of the present invention, there are a stage when a mask is created based on a standard substrate and an inspection stage for a substrate to be inspected. First, at the stage of mask creation, the algorithm setting CPU reads algorithm data for registering a pseudo defect from its dedicated ROM or the like and writes it in the inspection algorithm. In the inspection algorithm unit, a binary image of the standard substrate is input, and a defect shape that matches the pseudo defect registration algorithm data set internally as described above is searched from the input image (shape recognition). And
The presence / absence of a point (adapted point) that matches the pseudo-defect registration algorithm data is converted into a signal, and is output as pseudo-defect data to the appropriate data correction unit.

The adaptive data correction unit corrects the pseudo defect data in units of the resolution of the mask, and outputs the corrected data as the corrected defect shape compatible data. The corrected defect shape conformance data is stored in the mask memory unit as mask data. On the other hand, in the inspection stage, the algorithm setting CPU reads out the inspection algorithm data from its dedicated ROM or the like and writes it into the inspection algorithm. In the inspection algorithm section, a binary image of the substrate to be inspected is input, and a defect shape that matches the internally set inspection algorithm data as described above is searched from the input image (shape recognition).

Then, the state of the presence or absence of a point (conforming point) conforming to the inspection algorithm data is signalized and output to the conforming data correcting section as defect candidate data. The conforming data correction unit corrects the defect candidate data in units of the resolution of the mask and outputs the corrected data as corrected defect shape conforming data to the mask matching unit. The mask collation unit inputs the corrected defect shape conformance data of the defect candidate data, reads the mask data in the mask memory unit, and collates the two. Here, when the corrected defect shape conformance data of the defect candidate data is not included in the mask data, the defect candidate data is determined to be true defect data and transmitted to the data totaling unit.
If the defect candidate data is in the mask, it is determined that the data is not true defect data.

As means for providing a great effect in the present invention, as described above, an algorithm for recognizing pseudo defect data at the time of mask creation (the rule of the spatial filter) is used.
The point is that it is set separately from that for inspection. Therefore, a mask having an optimum size can be registered at an optimum position without applying an enlargement mask as in the related art.

That is, in the present invention, rules are set so that the total area of the conforming points of the pseudo defect registration algorithm data is larger than that of the inspection algorithm data. Therefore, when the center of the conforming point is located near the boundary of the mask cell, the conforming point comes to the next mask, and mask data having an optimal size enough to absorb variations in the positioning accuracy of the work can be created. On the other hand, in the conventional enlarged mask method, the mask range is extended to eight cells (a total of nine cells) adjacent to the cell of the pseudo defect data (FIGS. 3C to 3E, FIG. 18, FIG. 1).
9). Therefore, even if there is true defect data, it is masked due to the large number of mask cells, and the true defect data may be missed.

Therefore, in the present invention, since the minimum mask enlargement is performed only in the optimum direction, the true defect data is not missed as in the above-described conventional case. Further, since the false defect shape is not erroneously detected, there is no need for a device for correcting the positional deviation of the substrate as in the conventional case. Therefore, according to the present invention, it is possible to provide an inspection apparatus for a printed wiring board which can perform an accurate inspection without overlooking true defect data and does not require a board position shift correcting apparatus.

[0023]

【Example】

First Embodiment A printed wiring board inspection apparatus according to an embodiment of the present invention will be described with reference to FIGS. As shown in FIG. 1, the inspection apparatus according to the present embodiment includes an imaging device 2 including a CCD camera for reading a wiring pattern 11 on a printed wiring board 10.
1, an A / D converter 22 for converting an analog signal of the imaging device 21 into a digital signal, a defect detection unit 23,
It comprises a data totaling master CPU unit 24 and a terminal 25.

The defect detecting means 23 includes an inspection algorithm unit 3, a conforming data correction unit 33, and a mask collation unit 3.
4 and a defect data memory unit 35, an algorithm setting CPU unit 37, and a mask memory unit 38. The algorithm setting CPU unit 37 has a pseudo defect registration algorithm data storage ROM 371 and an inspection algorithm data storage ROM 372. Further, the defect detecting means 23 is for detecting a disconnection, and as shown in the figure, further includes defect detecting means such as a defect detecting means 301 for detecting a short circuit and a defect detecting means 302 for detecting a chip.

In the inspection by the above apparatus, first, mask data is created based on a standard substrate. In this mask creation stage, first, the algorithm setting CPU
By the unit 37, the pseudo defect registration algorithm data is
The data is read from the dedicated ROM 371 and written in the spatial filter of the inspection algorithm unit 3. In the inspection algorithm unit 3, the binary image of the standard board is
A defect shape that is input from the imaging device 21 and the A / D converter 22 and that matches the pseudo defect registration algorithm data written as described above is recognized from the input image. Then, a signal indicating whether or not there is a matching point that matches the pseudo defect registration algorithm data is signalized and output to the matching data correction unit 33 as pseudo defect data.

The adaptive data correction unit 33 corrects the pseudo defect data in units of the resolution of the mask, and outputs the corrected data as corrected defect shape appropriate data. The corrected defect shape conformance data is stored in the mask memory unit 38 as mask data. Next, it enters the inspection stage. In this case, the algorithm setting CPU unit 37 reads the inspection algorithm data from the dedicated ROM 372 and writes the read algorithm data into the spatial filter of the inspection algorithm unit 3.

In the inspection algorithm unit 3,
A binary image of the substrate to be inspected is input, and a defect shape conforming to the inspection algorithm data set internally as described above is recognized from the input image. Then, the state of the presence / absence of a conforming point that conforms to the inspection algorithm data is signalized, and the conforming data correcting unit 33 is used as defect candidate data.
Output to The matching data correction unit 33 corrects the defect candidate data in units of the resolution of the mask and outputs the corrected defect shape matching data to the mask matching unit as corrected defect shape matching data. The mask collation unit inputs the corrected defect shape conformance data of the defect candidate data, reads the mask data in the mask memory unit, and collates the two.

If the corrected defect shape conformance data of the defect candidate data is not included in the mask data, the defect candidate data is determined to be true defect data and enters the defect data memory unit 35. The data is further sent to the data totaling master CPU 24 and displayed on the terminal 25. On the other hand, when the defect candidate data is in the mask, it is determined that the defect candidate data is not true defect data.

Next, the outline of the data processing of the inspection algorithm unit 3 and the adaptation data correction unit 33 will be described with reference to FIG. First, the case where inspection algorithm data is set in the inspection algorithm unit 3 (at the time of inspection) will be described with reference to FIGS. FIG. 2A shows a binary image of a vertical disconnection shape (represented by 1 and 0. 1 is a wiring pattern, and 0 is a base material). In addition, the above-described disconnection shape is recognized by the inspection algorithm unit 3.

In FIG. 2A, the dashed line shows the absolute position of the mask on the mask coordinates for reference, and shows mask cells 41 to 44. The size of the mask cells 41 to 44 is 10 pixels of the basic pixel of the binary image.
It is set to double. Next, the black circles shown in FIG. 2A are conforming points to which the rule of the inspection algorithm data of the disconnection shape conforms in the inspection algorithm section, and the group is referred to as a conforming point group 4. This matching point is the size of a basic image unit of the binary image.
The presence or absence of the matching point indicates the presence or absence of shape recognition.

Here, when focusing on the above-mentioned matching point group 4, a plurality of matching points forming a group can be seen. This is because a plurality of conformity points are derived when looking at the conformity while shifting. The inspection algorithm unit 3 outputs the state of the presence or absence of the conforming point, that is, the condition of the conforming point group 4 as defect candidate data.

Next, in the adaptation data correction unit 33,
The defect candidate data is corrected for each mask cell. This state is shown in FIG. Here, for the sake of convenience, if the defect candidate data is described in the form of a conforming point, all the conforming points 4 shown in FIG. (Portion indicated by oblique lines) On the other hand, since the matching points 4 are not included in the cells 42 to 44, the information is “0”.
The information thus obtained is the corrected defect shape conformance data of the defect candidate data, and is sent to the mask matching unit.

Next, a case where the pseudo-defect registration algorithm data is set in the inspection algorithm unit 3 (when a mask is created) will be described with reference to FIGS. 2C and 2D. That is, for example, when the pseudo-defect registration algorithm data using the method shown in FIGS. 9 and 10 described later is set in the inspection algorithm unit 3, the matching point group 40 as shown in FIG. can get. This matching point group 4
0 indicates that the number of matching points is larger than that of the matching point group 4 in FIG. Therefore, cell 4
2, 43 and 44 also have matching points. These conforming points are pseudo defect data based on the pseudo defect registration algorithm data.

Therefore, the adaptive data correction section corrects the pseudo defect data on a mask cell basis. This state is shown in FIG. In this (D), the matching point group 40 is included in the four cells 41 to 44. Therefore, the information of all the cells 41 to 44 becomes “0 → 1”. Therefore, by registering this information in the mask memory unit 38, a mask of an appropriate size can be obtained.

At the time of inspection, the inspection data shown in FIG. 2A is compared with the mask data shown in FIG. At this time, even if the inspection data (cell 41 in FIG. 2B) has a positional deviation based on a slight positional deviation of the inspection substrate, the data is mask data (FIG. 2B).
(D) cells 41 to 44). Therefore, it is not determined as true defect data, and no false information is generated. If this point is added a little, what should be noted in FIG. 2 is the position of the matching point group 4 in the cell 41 at the time of inspection (FIGS. 2A and 2B). The matching point group 4 is shifted to the upper right of the cell 41 and is located at a position close to the cells 42, 43, and 44.

If there is no true defect data due to a positioning error of the substrate to be inspected or etching unevenness during the inspection, the conformable point group 4 may enter the cells 42 to 44. At this time, if the mask is an area of only the cell 41, a false report is issued as true defect data. However, in the present embodiment, as described above, the shape recognition algorithm in the inspection algorithm section is separated into the pseudo-defect registration algorithm data and the inspection algorithm data, and the matching point group 40 in the pseudo-defect registration algorithm data is matched at the time of inspection. Mask data is created by enlarging from point 4. Therefore, only four times as many mask cells are required. On the other hand, the conventional enlarged mask method requires nine times as many mask cells.

Further, the above will be described with reference to FIG. 3A and 3B show the present invention, and FIGS. 3C to 3E show the conventional enlarged mask method. These show the open end 910 of the disconnection pseudo defect shape in the pattern 90 (see FIG. 15) shown in FIG. 3 (A) and 3 (C) show a superposition diagram of the matching points of the algorithm and the mask memory coordinates, and FIG. 3 (B), (D),
(E) shows the state of the mask inside the mask memory. First, according to the present invention, as shown in FIGS. 3A and 3B, the matching point 401 of the pseudo defect data is located in the cells 41 to 44. Note that reference numeral 405 is a fragment portion 91 of the pattern.

Therefore, as shown in FIG. 2, when the correction is performed by the relevant data correction unit, the relevant point is
3B, masks are registered in the four mask cells 41 to 44, as shown in FIG. On the other hand, in the conventional enlarged mask method, as shown in FIGS.
02 is different from the above-mentioned FIG. 3A and is contained in one mask cell. Then, as shown in FIG. 3D, the registered mask cell 41 remains as it is when registered in the mask memory. Therefore, before matching in the mask matching unit,
The mask is enlarged to all the cells 42 to 49 adjacent to the cell 41. As a result, the size of the mask cell becomes nine times as large as the initial size.

As is known from the above, in the conventional enlarged mask method, the mask enlargement based on the pseudo defect data is 9 times. Therefore, as described above, there is a possibility that the true defect data is missed. On the other hand, in the present invention, the area of the conforming point is enlarged, and only the four cells 41 to 44 where the conforming point is located are used as mask cells. Therefore, it is possible to create a mask enlarged to a minimum corresponding to the displacement of the substrate, and it is almost impossible to miss true defect data.
Therefore, accurate inspection can be performed, and a device for correcting the positional deviation of the substrate is not required unlike the above-mentioned conventional device.

In the above example, as shown in FIG. 3A, since the center of the matching point 401 of the pseudo defect data is located at the upper right portion of the cell 41, the matching point is registered as a mask in four mask cells. . However, when the center of the conforming point 401 of the pseudo defect data is near the right center of the cell 41, the conforming point only extends to two mask cells 41 and 44. (Cells 41 and 44).

Embodiment 2 Next, signal processing in the apparatus shown in Embodiment 1 will be described.
This will be described with reference to the flowcharts of FIGS. First,
FIG. 4 shows a process of registering pseudo defect data, that is, a process of creating mask data. In this figure, in step (hereinafter abbreviated) 501, it is determined whether or not there is a pseudo-defect shape on the standard substrate.
Proceed to the following. On the other hand, when there is a pseudo defect shape, 50
In step 2, the data totaling master CPU 24 issues a pseudo defect shape registration algorithm setting command to the algorithm setting CPU 37.

Next, at 503, the algorithm setting CPU 37 sets the rules of the spatial filter in the inspection algorithm 3 to those for registering the pseudo defect shape. Next, in step 504, a non-defective standard board is fixed on the inspection cable. In step 505, this is imaged by the imaging device 21 (one-dimensional CCD camera). obtain. Next, at 506, the inspection algorithm unit 3 recognizes a pseudo defect shape in the binary image and generates pseudo defect data. Next, at 507, the matching data correction unit 33
The timing of the matching data for registering the mask is corrected, and the presence or absence of the matching data is registered in the mask memory unit 38. In this way, the registration of the mask data in the mask memory unit 38 is performed.

Next, as shown in FIG. 5, an inspection process is started. That is, after the registration at 507, at 508, the algorithm setting CP is sent from the master CPU unit 24.
A command to set the inspection algorithm is issued to the U section 37. Then, in 509, the algorithm setting CPU unit sets the rule of the spatial filter in the inspection algorithm 3 for inspection. Next, at 510, the substrate to be inspected is fixed on the inspection table, and at 511, the substrate to be inspected is
An image is taken by a CD camera, and a binary digital image signal is obtained by an A / D converter. Next, at step 512, the inspection algorithm unit 3 recognizes a defect candidate shape in the binary image and generates defect candidate data.

Next, proceeding to 513 and below in FIG. 6, the matching data correction unit 33 corrects the timing of the defect candidate data so that it can be compared with the mask data. And 51
In step 4, the mask data is read from the mask memory section, and the mask collation section 34 collates the defect candidate data with the mask data. Next, in step 515, the data determined as the true defect data as a result of the above-described comparison is recorded in the defect data memory unit 35. And 516
The data in the defective data memory section is transferred to the master CP
The data is read out and counted by the U unit 24, and the result is displayed on the terminal 25.

Then, at 517, it is determined whether or not the inspection has been completed. If the inspection has been completed, the inspection is terminated. Also,
To continue, return to 510 again. Next, a flow in which the algorithm setting CPU unit 37 sets data of the inspection algorithm unit 3 will be described with reference to FIGS. First, at 521 in FIG.
4, the number of the algorithm data to be set is received. From the data number of the algorithm to be set, it can be determined whether the setting algorithm is for inspection or for mask registration. For example, 1 to 10 are read from the inspection data ROM, and 11 to 20 are read from the pseudo defect registration data ROM.

Next, at 522, the mode switching signal is set to the setting (H) side. Thereby, the address bus and the data bus of the RAM in the inspection algorithm section 3 are set to the setting C
Directly connected to the PU unit 37. The spatial filter constituting the inspection algorithm unit 3 in this example is described in FIGS.
As shown in FIG. 2, a RAM is used. When an image signal is input to an address bus, it works as a spatial filter, and a result according to a filter algorithm is output to a data bus.

The address bus and the data bus are directly connected to the setting CPU 37 by the mode switching signal, and arbitrary data can be written to the RAM. Next, in 523, the required number of pattern data of the designated number is read from the data ROM on the algorithm setting CPU unit. Here, as shown in the inspection algorithm section of FIG. 11, which will be described later, eight types of spatial filters are realized at a time, so that eight types of pattern data are read (for the 0th bit to the 7th bit). Up to).

In the case of a 3 × 3 spatial filter as shown in FIG. 11, the above pattern data needs to indicate that each bit is “1”, “0”, and either one is acceptable.
Not only 3 × 3 = 9 bits, but 9 bits × 2 = 18 bits / type are required. For example, assuming that data with a bit of 1 is [001010100] B and data with a bit of 0 is [010101010] B, the data to be expressed is [Z0101010Z] (Z means either may be used).

Next, at 524, the address pattern is initialized.

[000000000] B is performed. And 5
25, the bit designation variable X ← 0, the data variable A ←
It is set to 0, and at 526, the determination is made until the address pattern matches the X-bit pattern data. Then, when they match, at 527 the X-th data
Set a bit (set to 1). Then, at 528, one bit designation X is added, and at 529, it is determined whether or not X = 8. If X is not 8, the process returns to step 526.

When X is 8, the process proceeds to 530 in FIG. 8, and the contents of the data A are written in the memory cell indicated by the address pattern of the RAM in the inspection algorithm section.
Next, the address pattern is advanced by one at 531 and 532
The address pattern is [10000000
0], and in the case of NO, the process returns to 525 shown in FIG. If yes, at 533
The mode switching signal is set to the "test (L)" side. As a result, image data is input to the address lines of the SRAM, and a pattern matching output is output from the data lines. next,
At 534, the master CPU is notified of the end of the data setting, and the processing is terminated.

Embodiment 3 This embodiment shows the difference between the inspection-only algorithm and the pseudo-defect registration-only algorithm that can be set in the inspection algorithm unit 3 shown in the first embodiment. As a method of providing a difference between the two, basically, a first method (FIG. 9) for providing a difference in a limiting condition and a second method for drawing a rule by shifting a position on a multiple spatial filter (FIG. 10) )
There are two types. Note that this example shows the determination of a short defect.

First, FIG. 9 shows a first method for making a difference in the limiting condition. FIG. 7A shows an inspection algorithm developed on a spatial filter, and FIG. 7B shows a matching point group 4 detected by the algorithm (four black points). In (A) and (B) of the figure, 0 indicates a substrate portion, and 1 indicates a pattern portion. FIG. 3C shows a pseudo defect registration algorithm developed on a spatial filter, which is an algorithm used when registering pseudo defect data using a standard substrate. (D) shows the matching point group 40 detected by this algorithm.
In (C) and (D), 0 indicates a substrate portion, and 1 indicates a pattern portion.

The above is clear from the fact that (A) and (B) or (C) and (D) are actually superimposed and collated with respect to a combination shifted by one pixel at the top, bottom, left and right.
In other words, the procedure of the commonly used feature extraction method
11 × 1 in the vertical and horizontal directions where the inspection algorithm is developed
A spatial filter consisting of one pixel (A)
Superimposed on the captured binary image (B)
Shifted one pixel at a time, expanded on the spatial filter (A)
Spatial filter when the algorithm applied to image (B)
Luther (A) center pixel (in this case, the four pixels
On the image (B) corresponding to the third pixel from the top)
Is the point of conformity. As described above, (C)
By reducing the limiting condition in that of (A),
It can be seen that the size of the matching point group increases.

Next, FIG. 10 shows a second method of drawing a rule by shifting the position on a plurality of spatial filters. FIGS. 10A to 10D show four types of registration algorithms in which the positions of the algorithm rules on the spatial filter are changed. The outputs of the spatial filters in which these algorithms (A) to (D) are set are ORed and 1
It is connected to the next stage as one output. At this time, if a square pattern of 2 × 2 pixels shown in (E) is input to each spatial filter, the output of each spatial filter is 2
It is clear that the matching point corresponds to × 2 pixels.
That is, the algorithm is developed as in the first method.
(A) (B) (C) (D))
Superimpose on the image (E), and do not put them one pixel at a time
Algorithm developed on the spatial filter
For the center pixel of the spatial filter when matching the image (E)
The corresponding point on the image (E) is one spatial filter each.
Both luters are 2 × 2 pixel compatible points. In addition, the OR output of the full spatial filter is a 4 × 4 pixel matching point due to the relationship of the shift position of the algorithm data.

As described above, one rule is set by shifting the positions of a plurality of spatial filters, and the output of each filter is ORed to increase the area of the matching point. And the matching points (16 black dots)
Is sent to the matching data correction unit as pseudo defect data. On the other hand, FIG. 10 (F) shows an inspection algorithm, and specifically, the algorithm of (F) is written in all four spatial filters used in (A) to (D). This is the pixel where "1" is detected (4 black dots)
As it is, it is sent to the adaptation data correction unit. Further, the first method and the second method can be combined.

Fourth Embodiment As shown in FIG. 11, this embodiment shows a case where a 3 × 3 pixel spatial filter is used for the basic configuration of the inspection algorithm unit shown in the first embodiment. In the example of the input image on the left side of FIG.
The pixels are used as the input image. Then, eight spatial filters are connected to the OR circuit. And this 8
The algorithm applied to the individual spatial filters is based on the method described with reference to FIGS.

Fifth Embodiment As shown in FIG. 12, this embodiment shows a block diagram in the inspection algorithm unit 3 using the spatial filter shown in the fourth embodiment. The binary image input from the A / D converter is supplied to a shift register 51, a multiplexer 5
2. Processed by the RAM 53 and output as pseudo defect data via the OR circuit.

An address bus from the algorithm setting CPU section 37 to the multiplexer 52,
The data bus is connected to the state buffer. A system clock that drives the inspection algorithm unit 3 is a pixel clock, and drives a line memory and a shift register. A one-dimensional binary image is developed two-dimensionally by a combination of a line memory and a shift register. The shape of the two-dimensional binary image is recognized by the RAM 53, and the result is output via the OR.

Embodiment 6 This embodiment shows, as shown in FIGS. 13 and 14, a circuit example and a timing chart of a suitable data correction unit when the size of a mask cell is 10.times.10 pixels. The pseudo defect data from the inspection algorithm unit 3 is stored in a shift register (10
(Shift by the number of pixels) 56, and through an OR circuit, enters a D flip-flop 57. Then, the mask data whose mask cell interval has been corrected enters the mask comparison unit 34 or the mask memory unit 38.

The pixel clock 581 enters the shift register 56. When the mask cell has a width of 10 pixels, the pixel clock 581 is a 1/10 frequency dividing circuit 58.
, And enters the D flip-flop 57 at the rate of latch once every ten times. The pixel clock is input by one pixel clock. Then, the section of the mask width (10 in this example)
If even one pixel has pseudo defect data in one pixel, the state "H" is maintained between one mask cell with a delay of one mask cell. FIG. 14 shows a timing chart and its inputs and outputs in the circuit of FIG. The pseudo defect data after the mask cell interval correction is the mask cell image width (10 clocks). At time 2 on the output side, it can be seen that the defect shape conformance data exists during this time.

[Brief description of the drawings]

FIG. 1 is a block diagram of an inspection apparatus according to a first embodiment.

FIG. 2 is a view for explaining expansion of the area of a conforming point in the first embodiment.

FIG. 3 is a comparative explanatory diagram of a mask memory according to a first embodiment of the present invention and a mask memory according to a conventional example.

FIG. 4 is a flowchart of a pseudo defect registration process according to the second embodiment.

FIG. 5 is a flowchart of an inspection process according to the second embodiment.

FIG. 6 is a flowchart of an inspection process continued from FIG. 5;

FIG. 7 is a flowchart of a setting process of inspection algorithm data according to the second embodiment.

FIG. 8 is a flowchart of a setting process of algorithm data for inspection continued from FIG. 7;

FIG. 9 is an explanatory diagram showing a difference between an algorithm dedicated to inspection and an algorithm for registering a pseudo defect in the third embodiment.

FIG. 10 is another explanatory diagram showing the difference between the inspection-specific algorithm and the pseudo defect registration algorithm in the third embodiment.

FIG. 11 is an explanatory diagram illustrating the operation of an inspection algorithm unit according to the fourth embodiment.

FIG. 12 is a block diagram of an inspection algorithm unit according to the fifth embodiment.

FIG. 13 is a block diagram of a matching data correction unit according to a sixth embodiment.

FIG. 14 is a timing chart at the time of inspection in the sixth embodiment.

FIG. 15 is an explanatory diagram of a pseudo defect shape in a pattern of a printed wiring board.

FIG. 16 is an explanatory diagram of a pseudo defect shape in a pattern of a printed wiring board.

FIG. 17 is an explanatory diagram showing a relationship between defect candidate data and true defect data.

FIG. 18 is an explanatory view of a conventional enlarged mask method.

FIG. 19 is an explanatory view showing a problem of the conventional enlarged mask method.

[Explanation of symbols]

10. . . Printed wiring board, 11. . . pattern,
4. . . Conformity points, 41-49. . . cell,

──────────────────────────────────────────────────続 き Continued on the front page (58) Field surveyed (Int.Cl. ⁷ , DB name) G06T 1/00 G01B 11/24 G01N 21/88

Claims (2)

(57) [Claims] 1. A method for reading a wiring pattern on a printed wiring board.
Based on an image signal to be captured and an image signal of the image capturing device.
Defect detection means for selecting whether or not the data is defect data;
The true defect data selected by the defect detection means is collected.
And a means for counting data.Features of the pattern to be extracted
As an algorithm in units smaller than the mask resolution.
Along with the spatial filter created,  When creating a mask, it recognizes the shape of the defect and
Pseudo defect registration to increase the area of points that fit the system
Algorithm data on the other hand, and defect shape during inspection
Above and the area of the point that fits the algorithm
Conformity point surface of pseudo defect registration algorithm data
Inspection algorithm data that is smaller than the product
Algorithm for writing to each inspection algorithm part
The setting CPU unit and the algorithm data for registering the pseudo defect at the time of mask creation.
The shape of the binary image of the standard board based on the
Output the defect data, while the inspection algorithm
Recognition of Binary Image of Inspection Board Based on Motion Data
And an inspection algorithm unit for outputting defect candidate data, and the above matching data from the inspection algorithm unit.
Is corrected to the mask resolution unit, and the corrected defect shape conformance data is corrected.
Data correction unit that outputs the data, and correction from the data correction unit when creating the mask.
Stores the already-formed defect shape conformance data as mask data.
Memory part for correction, and corrected defect type from the conformance data correction part during inspection
Condition data and the mask data from the mask memory
And a mask matching unit that matches data
Inspection equipment for printed wiring boards. 2. The printed circuit board according to claim 1,
Inspection of printed circuit boards characterized by using inspection equipment
Inspection method.