JP3115771U - PCB for mounting consideration - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a printed circuit board for examination of mounting which makes it possible to examine manufacturing conditions in the case of component mounting at a low price and in a short time.
SOLUTION: A substrate (P), a through hole (h) disposed in a peripheral portion of the substrate (P), a circular land around the through hole (h), a BGA mounting portion (IC1 to IC3), QFP mounting part (IC11 to IC15), transistor mounting part (TR1, TR2), resistance mounting part (R1 to R4), capacitor mounting part (C1 to C4), and a solder resist, and through hole (h) No solder resist is formed on the surrounding circular portion, the first diameter which is the diameter of the through hole (h) has a plurality of values, and the second diameter which is the diameter of the circular land is the value of the first diameter. Each of the third diameters has a plurality of values, and the third diameter, which is the diameter of the circular portion around which the solder resist around the through hole (h) is not formed, has a plurality of values for each value of the second diameter.
[Selection] Figure 1

Description

  The present invention relates to a printed circuit board for mounting examination, and more particularly to a printed circuit board for evaluating the bonding property of lead-free solder and examining mounting conditions.

  In recent years, environmental issues have become more important and restrictions on the use of hazardous substances have become stricter. In this connection, it has been proposed to eliminate lead from the solder used for component mounting on circuit boards mounted on electronic devices used in a wide range of fields. No solder (hereinafter referred to as lead-free solder) is being developed. Some large companies sell actual products that use circuit boards that are part-mounted using lead-free solder.

In July 2006, the RoHS Directive came into effect in Europe, prohibiting the sale of products containing designated hazardous substances. This has been recognized as an important problem for companies that manufacture electronic devices or their circuit boards in the European market, regardless of the size of the company. Since lead, which is one of the designated hazardous substances, is contained in almost all solders, the development of lead-free solder and the development of technologies that can be used to efficiently and stably manufacture components using it is important. For example, Non-Patent Document 1 below discloses an approach to lead-free manufacturing.
PFU Technical Journal, “Efforts to comply with RoHS directive”, PFU Tec. Rev., 16, 1, pp.61-67 (05,2005)

  With regard to the use of lead-free solder, in addition to the development of lead-free solder suitable for manufacturing, appropriate manufacturing conditions when using lead-free solder, that is, component mounting conditions according to the lead-free solder used are appropriate. It is important to decide on Therefore, it is necessary to evaluate the reliability of the solder joints of the circuit board on which components are mounted under various environmental conditions.

  In some large companies, the reliability evaluation test of the lead-free solder jointability is performed using a printed circuit board of an actual product or using a printed circuit board for testing developed according to its own product.

  However, there is a problem that small and medium-sized enterprises cannot sufficiently cope with the development of a printed circuit board for examination, because it takes a large amount of money and a long period of time. In addition, it is difficult to obtain related information (manufacturing conditions, etc.) from the competitors ahead of the company.

  Accordingly, an object of the present invention is to provide a printed circuit board for studying mounting that enables the manufacturing conditions when mounting components using lead-free solder to be studied at a low cost and in a short period of time.

  The object of the present invention can be realized by the following.

  In other words, the printed circuit board for examination of mounting according to the present invention includes a substrate, a plurality of through holes arranged in a peripheral portion of the substrate so as to leave a rectangular region near the center of the substrate, and each of the through holes. A circular land formed on both surfaces of the surrounding substrate, a BGA mounting portion for mounting a plurality of BGA type ICs disposed on one surface of the substrate, and a surface disposed on both surfaces of the substrate A plurality of QFP mounting parts for mounting a QFP type IC, a transistor mounting part for mounting a plurality of transistors, a resistance mounting part for mounting a plurality of resistors, a capacitor mounting part for mounting a plurality of capacitors, and both surfaces of the substrate The solder resist is not formed in a circular portion around each of the through holes, and a plurality of the through holes are formed in a predetermined shape. The first diameter, which is arranged in parallel with the side of the substrate at an interval, and has a plurality of values as the diameter of the through hole, and the first diameter, which is the diameter of the circular land, is the value of the first diameter. The third diameter, which is a diameter of the circular portion having a plurality of values for each of which the solder resist around the through hole is not formed, has a plurality of values for each value of the second diameter. .

  The resistor mounting portion has a land arranged so that a plurality of resistors having the same dimensions can be mounted in parallel with a predetermined side of the substrate, and the capacitor mounting portion includes a plurality of capacitors having the same dimensions. A land having a land arranged so as to be mounted in parallel with a predetermined side of the substrate, and the transistor mounting portion is disposed so that a plurality of transistors having the same dimensions can be mounted in parallel with the side of the substrate. The resistance mounting portion on one surface of the substrate and the resistance mounting portion on the other surface of the substrate are arranged at symmetrical positions with the substrate interposed therebetween, and one surface of the substrate The capacitor mounting portion of the substrate and the capacitor mounting portion on the other surface of the substrate are arranged at symmetrical positions across the substrate, the transistor mounting portion on one surface of the substrate, and the other surface of the substrate Can and the transistor mounting portion is disposed at symmetrical positions across the substrate.

  The resistance mounting portion, the capacitor mounting portion, and the transistor mounting portion on the other surface of the substrate may have a land for flow soldering and a land for reflow soldering.

  Two of the BGA mounting parts, the first BGA mounting part and the second BGA mounting part, are arranged at opposite corners of the rectangular region and have a plurality of lands formed so that the same BGA type IC can be mounted. However, the dimensions of the lands of the plurality of first BGA mounting portions are different from the dimensions of the lands of the second BGA mounting portions, and the plurality of the QFP mounting portions are disposed at symmetrical positions across the substrate. The first QFP mounting part and the second QFP mounting part have lands formed so that the same QFP type IC can be mounted, and the dimensions of the land of the first QFP mounting part and the dimensions of the land of the second QFP mounting part Unlike the plurality of QFP mounting portions, the third QFP mounting portion and the fourth QFP mounting portion arranged on one surface of the substrate can mount the same QFP type IC. The land of the third QFP mounting portion is different from the size of the land of the fourth QFP mounting portion, and is symmetrical to the third QFP mounting portion with the substrate interposed therebetween. In addition, a fifth QFP mounting part is disposed at a position on the other surface of the substrate, and the fifth QFP mounting part is formed with a plurality of lands formed so that the same QFP type IC as that of the third QFP mounting part can be mounted. The size of the land of the fifth QFP mounting part and the size of the land of the third QFP mounting part may be the same.

  The value of the first diameter has three kinds of values, the value of the second diameter has three kinds of values for each value of the first diameter, and the value of the third diameter is the first value. There are two kinds of values for each value of two diameters, and a plurality of the through holes are arranged in units of 36 through holes arranged in 6 rows and 6 columns, and among the through holes in the units, The first diameters of six through holes that are continuous in one direction are equal, and the second diameter and the third diameter of these through holes are equal, and the one direction of the through holes in the unit is the one direction. 6 through-hole circular lands that are continuous in a direction perpendicular to each other are electrically connected, and among the through-holes in the unit, six through-holes located at one of both ends in the one direction From each of the holes, three consecutive in one direction Round of the lands of Ruhoru it is can be electrically connected to said one direction.

  The mounting examination printed circuit board described above may further include a migration test pattern arranged on one surface of the board.

  According to the present invention, various circuit components can be mounted in various arrangements, a general-purpose board having lands and resists of various dimensions and shapes can be provided, and reliability evaluation regarding component mounting under various conditions Experiments can be performed efficiently. Accordingly, it is possible to study a desirable mounting condition when using lead-free solder in a short period of time and at a low cost.

  In the solderability evaluation test, it is necessary to cut the board on which the circuit components are mounted and observe the cross section. By arranging the lands in a straight line, multiple mounting components can be cut at once. Therefore, it is possible to efficiently perform a solderability evaluation test.

  In addition, by arranging the lands in straight lines at the corresponding positions on the front and back surfaces of the board, it becomes possible to cut more mounting parts at a time, and more efficiently perform the solderability evaluation test. be able to.

  Further, by forming a land for flow and reflow on one surface, the surface can be used for evaluation of two kinds of mounting methods of soldering for flow and reflow.

  Also, the difference in solder jointability under different conditions of heat escape (heat dissipation characteristics, heat transfer characteristics) during soldering can be evaluated depending on the connection state between adjacent lands in the through hole.

  Hereinafter, embodiments of the present invention will be described with reference to the accompanying drawings. 1 and 2 are plan views of the front and back surfaces of a printed circuit board for studying mounting according to an embodiment of the present invention. FIG. 3 is a partially enlarged view of FIG. 1 to 3 show a common X axis and Y axis so that the direction of the substrate can be understood.

  This printed circuit board for studying mounting includes a board P and a plurality of mounting parts for mounting circuit components arranged on both sides of the board P. That is, as shown in FIG. 1, the printed circuit board for examination of mounting includes a first through-hole portion H1 disposed on the peripheral portion on one surface (hereinafter referred to as “surface” for convenience), and first to first 3rd BGA mounting part IC1-IC3, 1st-5th QFP mounting part IC11-IC15, 1st and 2nd transistor mounting part TR1, TR2, 1st-4th chip resistance mounting part R1-R4, 1st To fourth chip capacitor mounting portions C1 to C4, first diode mounting portion D1, first SOP mounting portion SOP1, electric field capacitor mounting portion CE, volume mounting portion V, connector mounting portion CN, and migration test pattern M And. Each mounting part has a figure (silk printed) indicating the shape of the assumed component.

  Further, as shown in FIG. 2, the printed circuit board for examination of mounting includes a second through-hole portion H2 disposed on the peripheral portion on the back side surface of FIG. Sixth to tenth QFP mounting portions IC51 to IC55, third and fourth transistor mounting portions TR3 and TR4, fifth to eighth chip resistor mounting portions R5 to R8, and fifth to eighth chip capacitor mounting portions C5 to C5. C8, a second diode mounting portion D2, and a second SOP mounting portion SOP2.

  1st to 3rd BGA mounting parts IC1 to IC3, 1st to 10th QFP mounting parts IC11 to IC15, IC51 to IC55, 1st to 4th transistor mounting parts TR1 to TR4, 1st to 8th chip resistance mounting parts R1 to R8 , First to eighth chip capacitor mounting portions C1 to C8, first and second diode mounting portions D1, D2, first and second SOP mounting portions SOP1, SOP2, electric field capacitor mounting portion CE, volume mounting portion V, connector mounting The part CN is assumed to mount a BGA type IC, a QFP type IC, a transistor, a chip resistor, a chip capacitor, a diode, an SOP type IC, an electric field capacitor, a variable resistor, and a connector, respectively. Each mounting part is formed with a land of conductive (for example, copper) of a predetermined size at a predetermined position so that components can be mounted using solder, and is electrically insulated by being overlapped around the land or part of the land. A material solder resist (hereinafter referred to as a resist) is formed.

  The migration test pattern M is a conductive (for example, copper) pattern for performing a migration test which is a kind of reliability evaluation test, and includes two comb-shaped portions facing each other. Formed on top. The surface of this pattern is covered with a resist except for two circular external connection terminal portions.

  1 and 2, the left and right sides (X-axis direction) are reversed, and the corresponding mounting portions on the front surface and the back surface are located symmetrically with the substrate P interposed therebetween. For example, the first QFP mounting unit IC11 is in the sixth QFP mounting unit IC51, the second QFP mounting unit IC12 is in the seventh QFP mounting unit IC52, the first transistor mounting unit TR1 is in the third transistor mounting unit TR3, and the first chip resistance mounting unit R1. Corresponds to the fifth chip resistor mounting portion R5, and the first chip capacitor mounting portion C1 corresponds to the fifth chip capacitor mounting portion C5. Further, the first and second through hole portions H1 and H2 are formed with a plurality of through holes (through holes), which are also arranged symmetrically.

  The first and second through-hole portions H1 and H2 are each composed of 32 small portions SH. In each small portion SH, 36 through holes h arranged in 6 rows and 6 columns are formed, and circular lands (not shown) are formed around the through holes h. A resist (not shown) is formed so as to overlap a part of the land. As shown in FIG. 3, the small portion SH is further composed of two first and second portions SH1 and SH2. In the first portion SH1, the land is electrically connected in the direction of one side of the substrate P (Y-axis direction in FIG. 3), and in the second portion SH2, the direction of two adjacent sides of the substrate P (in FIG. 3). , X-axis and Y-axis directions) are electrically connected. In the second portion SH2 of FIG. 3, a portion where the land is not formed is left in a part in the vicinity of the through hole h, and the other portion is formed on the substrate surface with the same conductive material as that of the land.

  Table 1 shows an example of dimensions (in mm) regarding the through hole h, the surrounding land, and the resist. The hole diameter is the diameter of the through hole h, the land diameter is the land diameter, and R is the diameter of the circular portion around the through hole h where no resist is formed (hereinafter referred to as resist diameter). The interval between the through holes is 2.54 mm. Further, combinations of values of the hole diameter H, land diameter L, and resist diameter R are shown in a tree shape at the left end of the substrate P shown in FIG. Moreover, the value of the hole diameter H is described in the outer periphery of the 1st through-hole part H1.

表１と、上記したランド間の電気的接続の違いとを考慮すると、スルーホールｈの穴径、ランド径、レジスト径の組み合わせのバリエーションは３６種類となる。

Considering Table 1 and the difference in electrical connection between the lands described above, there are 36 types of combinations of combinations of the hole diameter, land diameter, and resist diameter of the through hole h.

  Table 2 shows an example of dimensions (unit: mm) regarding the BGA mounting portion, the land of the QFP mounting portion, and the resist. N in the left end column is a number representing the Nth BGA mounting unit and the Nth QFP mounting unit. Regarding the first and second BGA mounting portions IC1 and IC2, the land size is a diameter of a circular land, and the resist size is a diameter in a circular range where no resist is formed around the land. Regarding the first to 10th QFP mounting parts IC11 to IC15 and IC51 to IC55, the land dimensions are the vertical and horizontal lengths of the rectangular lands, and the resist dimensions are the vertical and horizontal lengths of the rectangular area where the resist around the lands is not formed. is there. The relative positions of the lands in each mounting portion are determined in correspondence with the relative positions of the leads of each component that is assumed to be mounted. Therefore, when different parts are mounted, the position of the land may be changed according to the parts.

表２から分かるように、基板Ｐの同じ面に形成され、同じ部品（２５６ピンＢＧＡ）の実装を想定した第１及び第２ＢＧＡ実装部ＩＣ１、ＩＣ２では、ランド寸法及びレジスト寸法が若干異なる。

As can be seen from Table 2, the land dimensions and resist dimensions are slightly different between the first and second BGA mounting portions IC1 and IC2 that are formed on the same surface of the substrate P and are assumed to mount the same component (256-pin BGA).

  Also, the land dimensions and resist dimensions are slightly different in the first and sixth QFP mounting portions IC11 and IC51 that are formed at corresponding positions on the front and back surfaces of the substrate P and are assumed to mount the same component (208-pin QFP).

  Further, the second and third QFP mounting parts IC12 and IC13 and the seventh and eighth QFP mounting parts IC52 and IC53, which are formed on the same surface of the substrate P and are assumed to mount the same component (114 pin QFP), respectively, Dimensions and resist dimensions are slightly different.

  Further, the fourth and fifth QFP mounting parts IC14 and IC15, and the ninth and tenth QFP mounting parts IC54 and IC55, which are formed on the same surface of the substrate P and are assumed to mount the same component (100-pin QFP), respectively, Dimensions and resist dimensions are slightly different.

  On the other hand, for the second, third, seventh and eighth QFP mounting parts IC12, IC13, IC52, and IC53 assuming mounting of the same component (114 pin QFP), comparison is made with the mounting parts formed at corresponding positions on the front and back surfaces. Then, the land dimensions and the resist dimensions are the same. That is, the second and seventh QFP mounting parts IC12 and IC52 have the same land dimensions and the same resist dimensions. Similarly, in the third and eighth QFP mounting parts IC13 and IC53, the land dimensions are the same and the resist dimensions are the same.

  Similarly to the above, the fourth, fifth, ninth, and tenth QFP mounting parts IC14, IC15, IC54, and IC55 that are assumed to be mounted with the same component (100-pin QFP) are also formed at corresponding positions on the front and back surfaces. In the mounting portion, the land dimensions and the resist dimensions are the same.

  Next, the first to eighth chip resistor mounting portions R1 to R8, the first to eighth chip capacitor mounting portions C1 to C8, the first to fourth transistor mounting portions TR1 to TR4, the first and second diode mounting portions D1. , D2 and the like will be described.

  The first to eighth chip resistor mounting portions R1 to R8 are each formed with lands and resists so that a plurality of the same type of chip resistors can be mounted. For example, in the first chip resistor mounting portion R1, 20 lands having a predetermined size are arranged in a straight line so that ten 1005 chip resistors (dimensions: 1 mm × 0.5 mm) can be mounted. Yes. Regarding the other second to eighth chip resistor mounting portions R2 to R8, the sizes of chip resistors that are assumed to be mounted are different, but lands are similarly formed. In the solder bondability evaluation test, it is necessary to cut the mounted substrate and observe the cross section, but by arranging the chip resistor lands in a straight line, a plurality of mounted components (resistors ) Can be cut at a time, and a solderability evaluation test can be efficiently performed.

  However, as shown in FIG. 2, the fifth to eighth chip resistor mounting portions R5 to R8 on the back surface include lands having two types of shapes, a rectangle and a shape with rounded corners. For example, in the fifth chip resistor mounting portion R5, the upper ten lands in the Y-axis direction in FIG. 2 are rectangular, and the lower ten lands are formed in rounded corners. Thus, the surface shown in FIG. 2 can be used for evaluation of two types of mounting methods, flow and reflow soldering. The corner-shaped land assumes reflow soldering, and the round-shaped land assumes flow soldering.

  Also, some of the lands of the first to eighth chip resistor mounting portions R1 to R8 have lands of the same shape and size so that parts of the same type and the same specification can be mounted at corresponding positions on the front and back surfaces. These are arranged at corresponding positions on the front and back surfaces. For example, when comparing the first chip resistor mounting portion R1 and the fifth chip resistor mounting portion R5 arranged corresponding to the front and back surfaces, the ten lands on the upper side of the first chip resistor mounting portion R1 are the fifth chip. The same shape and the same size as the ten lands on the upper side of the resistor mounting portion R5 are formed at corresponding positions on the front and back surfaces. Thus, by arranging the lands in straight lines at corresponding positions on the front and back surfaces of the substrate P, it is possible to cut more mounting parts at a time, and more efficiently solderability. An evaluation test can be performed.

  The first to eighth chip capacitor mounting portions C1 to C8, the first to fourth transistor mounting portions TR1 to TR4, the first and second diode mounting portions D1 and D2, and the like are also included in the first to eighth chip resistor mounting portions R1 to R1. Similarly to R8, lands and resists are formed.

  Although the dimension of the board | substrate P can be 180 mm x 150 mm and thickness 1.6mm or 0.8mm, for example, it is not limited to this, It can be set as a various dimension. Various materials such as glass epoxy (FR-4), halogen-free glass epoxy, glass composite (CEM-3), and phenol can be used for the material of the substrate P.

  Further, as the surface treatment of the printed circuit board for examination of mounting, that is, the treatment of the exposed land surface, for example, a water-soluble preflux or gold flash plating treatment can be performed.

  Therefore, a printed circuit board can be manufactured using a plurality of substrates having different thicknesses and materials, and a plurality of printed circuit boards for examination of mounting can be manufactured by changing the surface treatment method. If these plural printed circuit boards for studying mounting are used, it becomes possible to perform more reliability tests, in particular, a reliability test of solderability under various conditions.

  The arrangement of small through holes constituting the through hole portion is not limited to the above described 6 rows and 6 columns, and various arrangements are possible. Further, various combinations of hole diameters, land diameters, and resist diameters may be changed, thereby providing more than 32 types of variations. Further, instead of forming the through hole portion around the entire periphery of the substrate P, a part of the periphery may be used as the through hole portion.

  Further, the shape of the flow land and the reflow land formed on the same surface of the substrate is not limited to the above shape, and may be any shape suitable for flow soldering and reflow soldering. .

  1 to 3 show an example, and the arrangement of the mounted components is not limited to this, and various changes can be made. Moreover, it is possible not to mount a part of the mounting components described above. In addition, various assumed mounting components may be changed. In this case, the land and resist may be slightly changed according to the mounting components so that the same components can be mounted at corresponding positions on both sides.

It is a top view which shows the printed circuit board for mounting examination which concerns on embodiment of this invention. It is a top view which shows the printed circuit board for mounting examination which concerns on embodiment of this invention, and shows the back surface of the surface shown in FIG. It is the top view which expanded a part of FIG.

Explanation of symbols

H1, H2 1st and 2nd through-hole parts IC1-IC3 1st-3rd BGA mounting part IC11-IC15, IC51-IC55 1st-10th QFP mounting part TR1-TR4 1st-4th transistor mounting part R1-R8 1st 1st to 8th chip resistor mounting parts C1 to C8 1st to 8th chip capacitor mounting parts D1, D2 First and second diode mounting parts CE Electric field capacitor mounting part V Volume mounting part SOP1, SOP2 First and second SOP mounting parts CN Connector mounting part M Migration test pattern SH, SH1, SH2 Small part of through hole part h Through hole

Claims (6)

A substrate,
A plurality of through holes arranged in a peripheral portion of the substrate so as to leave a rectangular region near the center of the substrate;
Circular lands formed on both sides of the substrate around each through hole;
A plurality of BGA mounting portions capable of mounting a BGA type IC disposed on one surface of the substrate;
A plurality of QFP mounting portions that can be mounted on both surfaces of the substrate and capable of mounting a QFP type IC, a transistor mounting portion that can mount a plurality of transistors, a resistance mounting portion that can mount a plurality of resistors, and a plurality of resistance mounting portions A capacitor mounting part capable of mounting a capacitor;
A solder resist covering both sides of the substrate;
The solder resist is not formed in a circular portion around each of the through holes,
The plurality of through holes are arranged in parallel to the side of the substrate at a predetermined interval,
The first diameter which is the diameter of the through hole has a plurality of values,
A second diameter, which is the diameter of the circular land, has a plurality of values for each value of the first diameter;
A printed circuit board for mounting examination, wherein a third diameter, which is a diameter of the circular portion where a solder resist around the through hole is not formed, has a plurality of values for each value of the second diameter. The resistance mounting portion has lands arranged so that a plurality of resistors having the same dimensions can be mounted in parallel with predetermined sides of the substrate,
The capacitor mounting portion has a land arranged so that a plurality of capacitors having the same dimensions can be mounted side by side in parallel with a predetermined side of the substrate,
The transistor mounting portion has a land arranged so that a plurality of transistors having the same dimensions can be mounted in parallel with the side of the substrate,
The resistance mounting portion on one surface of the substrate and the resistance mounting portion on the other surface of the substrate are arranged at symmetrical positions across the substrate,
The capacitor mounting portion on one surface of the substrate and the capacitor mounting portion on the other surface of the substrate are arranged at symmetrical positions across the substrate,
2. The transistor mounting portion on one surface of the substrate and the transistor mounting portion on the other surface of the substrate are arranged at symmetrical positions with the substrate interposed therebetween. Printed circuit board for mounting consideration.   3. The resistance mounting portion, the capacitor mounting portion, and the transistor mounting portion on the other surface of the substrate each have a land for flow soldering and a land for reflow soldering. PCB for mounting considerations. Two of the BGA mounting parts, the first BGA mounting part and the second BGA mounting part, are arranged at opposite corners of the rectangular region and have a plurality of lands formed so that the same BGA type IC can be mounted. And
The dimensions of the lands of the plurality of first BGA mounting portions are different from the dimensions of the lands of the second BGA mounting portions,
Among the plurality of QFP mounting portions, the first QFP mounting portion and the second QFP mounting portion arranged at symmetrical positions across the substrate have lands formed so that the same QFP type IC can be mounted,
The size of the land of the first QFP mounting portion is different from the size of the land of the second QFP mounting portion,
Among the plurality of QFP mounting portions, the third QFP mounting portion and the fourth QFP mounting portion arranged on one surface of the substrate have a plurality of lands formed so that the same QFP type IC can be mounted,
The land size of the third QFP mounting portion is different from the land size of the fourth QFP mounting portion,
A fifth QFP mounting portion is disposed at a position on the other surface of the substrate that is symmetrical to the third QFP mounting portion across the substrate,
The fifth QFP mounting part has a plurality of lands formed so that the same QFP type IC as the third QFP mounting part can be mounted,
The printed circuit board for mounting examination according to any one of claims 1 to 3, wherein the size of the land of the fifth QFP mounting portion is the same as the size of the land of the third QFP mounting portion. The value of the first diameter has three values,
The value of the second diameter has three values for each value of the first diameter,
The value of the third diameter has two values for each value of the second diameter,
The plurality of through holes are arranged in units of 36 through holes arranged in 6 rows and 6 columns,
Among the through holes in the unit, six through holes continuous in one direction have the same first diameter, and the second diameter and the third diameter with respect to these through holes are respectively equal.
Of the through holes in the unit, the circular lands of six through holes continuous in a direction orthogonal to the one direction are electrically connected,
Of the through holes in the unit, the circular land of three through holes continuous in the one direction from each of the six through holes located at one of both ends in the one direction is the one of the through holes. The printed circuit board for mounting examination according to any one of claims 1 to 4, wherein the printed circuit board is electrically connected in a direction.   The printed circuit board for mounting examination according to any one of claims 1 to 5, further comprising a migration test pattern arranged on one surface of the board.

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