JP3109189B2 - Driving method of three-electrode surface discharge type plasma display panel - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a plasma display panel (PDP: Plasma Display Panel) utilizing light emission accompanying gas discharge and excitation light emission of a phosphor by ultraviolet light accompanying gas discharge.
The present invention relates to a method for driving a so-called three-electrode surface-discharge type plasma display panel, which is configured by providing three electrodes per cell in the panel.

[0002]

2. Description of the Related Art Conventionally, there is known a three-electrode surface discharge type plasma display panel whose conceptual diagram is shown in FIG.

In FIG. 1, reference numeral 1 denotes a panel main body, 2 denotes an X electrode forming a first electrode, 3 denotes a Y electrode forming a second electrode, and 4 denotes an address electrode forming a third electrode. Here, a display line 5 is formed by a pair of the X electrode 2 and the Y electrode 3.
A cell 6 is formed at the intersection of a pair of X electrode 2, Y electrode 3 and address electrode 4. Note that the X electrodes 2 of the display lines 5 are commonly connected, and the Y electrodes 3 are independently formed for each display line 5.

An X-side driver 7 supplies an X-side address pulse and an X-side discharge sustaining pulse to the X-electrode 2.
A Y-side driver that supplies a Y-side write pulse, a Y-side erase pulse, and a Y-side sustaining pulse to the electrode 3, 9 is an address driver that supplies an erase pulse to the address electrode 4, and 10 is X
Driver 7, Y driver 8, and address driver 9
Control circuit.

FIG. 3 is an exploded perspective view showing the basic structure of the three-electrode surface discharge type plasma display panel of FIG. 2. In the drawing, reference numerals 11 and 12 denote glass substrates, and 2A and 2B respectively constitute X electrodes 2. Transparent electrode and bus electrode, 3A and 3
B is a transparent electrode and a bus electrode constituting the Y electrode 3 respectively. The bus electrode 2B is a low-resistance electrode for avoiding a voltage drop such as an X-side write pulse, and the bus electrode 2B is a low-resistance electrode for avoiding a voltage drop such as a Y-side pulse.

Reference numeral 15 denotes a dielectric layer covering the X electrode 2 and the Y electrode 3; 16 denotes a grid-like rib for preventing discharge diffusion;
Reference numeral 7 denotes a phosphor, and reference numeral 18 denotes a separator for preventing color mixture of the red, green, and blue phosphors and maintaining a discharge gap.

FIG. 4 is a view for explaining a conventional driving method of such a three-electrode surface discharge type plasma display panel.
In particular, FIG. 4A is a waveform diagram, and FIGS. 4B to 4E are schematic cross-sectional views of a part of a three-electrode surface discharge type plasma display panel.

In the conventional driving method, after all cells are discharged for each selected display line to accumulate wall charges, discharge erasure of cells that do not require sustain discharge, ie, cells that do not perform display, is performed. In the case where display data is written for each selected display line by performing the above operation, first, as shown in FIG. 4A, a write pulse 19 of a positive voltage and Vw [V] is applied to the X electrode 2, and A write pulse 20 of -Vs [V] (Vs> 0) is applied to the Y electrode 3 of the selected display line, and the Y electrode 3 of the unselected display line is held at the GND potential.

In this case, the voltage applied between the X electrode 2 and the Y electrode 3 of the selected display line is Vw + Vs, but Vw + Vs> Vf (discharge start voltage)> Vw, Vs
By setting each voltage so that the following condition is satisfied, discharge can be caused in all the cells only in the selected display line.

In this case, in the selected display line, as shown in FIG. 4B, negative wall charges are formed on the dielectric layer 15 on the X electrode 2 and on the dielectric layer 15 on the Y electrode 3. , A positive wall charge is accumulated, and a wall voltage is accumulated in all the cells on the selected display line. Since the wall voltage has a polarity that reduces the internal voltage of the discharge space, the discharge ends instantaneously, for example, at 0.1 to 1 μS.

Then, discharge sustaining pulses 21 and 22 having a negative voltage of -Vs [V] are alternately applied to the X electrode 2 and the Y electrode 3 to utilize the wall charges accumulated on the dielectric layer 15. Discharge, that is, sustain discharge is performed.

Here, for the cells from which the discharge should be erased, that is, the cells for which no display is performed, the sustaining pulses 21, 2
2 is applied for 1 to 2 cycles, and after sustain discharge is performed,
As shown in FIG. 4c, the X electrode 2 of the selected display line
Positive wall charges are accumulated on the upper dielectric layer 15, and the Y electrode 3
At the stage when negative wall charges are accumulated on the upper dielectric layer 15,
A positive voltage, Va, is applied to the address electrode 4 of the cell from which discharge is to be erased.
The erase pulse 23 of [V] is applied, and the erase pulse 24 of -Vs [V] is applied to the Y electrode 3 of the selected display line.

Then, the sustain discharge is performed for all the cells on the selected display line. In particular, the erase pulse 23 is applied to the address electrode 4 in the cell for erasing the discharge. A discharge occurs simultaneously with the Y electrode 3, and excessive positive wall charges are accumulated on the dielectric layer 15 on the Y electrode 3 as shown in FIG. 4D.

In this case, if the positive voltage Va is set to a value that exceeds the discharge starting voltage by the wall voltage itself due to the accumulated wall charges, when the external voltage is removed, that is, when the X electrode 2 and the Y electrode When both are set to the GND potential, self-erasing discharge occurs, and as shown in FIG. 4E, the wall charges of this cell disappear, and the display is erased.

[0015]

However, the self-erasing discharge occurs in the vicinity of the X electrode 2 and the Y electrode 3 of the target cell. However, there is a problem in that the self-erase discharge is not sufficiently performed, and an erase error may occur.

The present invention has been made in view of the above points, and has been made capable of preventing erroneous erasure and performing good image display.
An object of the present invention is to provide a driving method of an electrode surface discharge type plasma display panel.

[0017]

A method of driving a three-electrode surface discharge type plasma display panel according to the present invention comprises first and second methods .
When electrodes are arranged in parallel on the first substrate for each display line,
In addition, a third electrode is formed on a second substrate facing the first substrate.
Three electrodes arranged so as to intersect the first and second electrodes
In the surface discharge type plasma display panel, the first and second
Of the electrodes, the first and second electrodes of the selected display line
Apply the voltage required to start discharge between the poles, and
The discharge of all cells for each indicated line to accumulate wall charges
Step 1 and discharge erasure of cells that do not perform display selectively
By doing so, the display data is displayed for each selected display line.
A second step of writing data, and in the first step,
Auxiliary pulse is applied to the third electrode corresponding to the cell that does not perform display
Is applied .

[0018]

According to the present invention, the first of the selected display lines is selected.
And applying a voltage required for starting discharge between the second electrode and the second electrode.
Discharge all cells for each selected display line to reduce wall charges
In the first step of accumulation, the cells that are not displayed
An auxiliary pulse is applied to the corresponding third electrode.
Therefore, in a cell where no display is performed, the first and second cells are not displayed.
Discharge occurs not only between the electrodes but also between the second and third electrodes.
This replenishes wall charges accumulated near the second electrode.
Can be

Therefore, even in a cell having a high discharge start voltage during the self-erasing discharge, the accumulated wall charge is not relatively insufficient, and the self-erasing discharge is completely performed.
Erase mistakes are avoided.

[0020]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the present invention will be described below with reference to FIG. 1 by taking as an example the case of driving a three-electrode surface discharge type plasma display panel shown in FIG. I do.

FIG. 1 is a diagram for explaining an embodiment of the present invention. In particular, FIG. 1A is a waveform diagram, and FIGS.
FIG. 2 is a schematic sectional view of a part of an electrode surface discharge type plasma display panel.

In this embodiment, all the cells are discharged for each selected one display line to accumulate wall charges, and then the cells which are not to be displayed are discharged and erased. When writing display data every time,
As shown in FIG. 1A, a positive voltage and a write pulse 19 of Vw [V] are applied to the X electrode 2, and a negative voltage and a write pulse 20 of -Vs [V] are applied to the Y electrode 3 of the selected display line. The Y electrode 3 of the display line which is not displayed is held at the GND potential, and a positive voltage, Va [V], of the auxiliary pulse 25 is applied to the address electrode 4 corresponding to the cell not performing the display.

In this case, a discharge occurs between the X electrode 2 and the Y electrode 3 and, particularly, in a cell where no display is performed, a discharge also occurs between the address electrode 4 and the Y electrode 3.
In the selected display line, negative wall charges are accumulated on the dielectric layer 15 on the X electrode 2, and positive wall charges are accumulated on the dielectric layer 15 on the Y electrode 3, and discharge is stopped. To end.

In this embodiment, as shown in FIG. 4B, in a cell in which no display is performed, unlike the conventional case, the address electrode 4 has a positive electrode on the dielectric layer 15 on the Y electrode 3. Extra positive wall charges are accumulated by the amount of application of the voltage auxiliary pulse 25.

Then, discharge sustaining pulses 21, 22 of a negative voltage, -Vs [V], are alternately applied to the X electrode 2 and the Y electrode 3, and the wall charges accumulated on the dielectric layer 15 are utilized. Sustain discharge is performed.

Here, for the cells from which the discharge is to be erased, the sustaining pulses 21 and 22 are applied for one to two cycles, and after the sustaining discharge is repeated, as shown in FIG. At the stage where the positive wall charges are accumulated on the dielectric layer 15 on the electrode 2 and the negative wall charges are accumulated on the dielectric layer 15 on the Y electrode 3, the address electrode 4 of the cell from which discharge is erased is applied. The erase pulse 23 of the positive voltage Va [V] is applied, and the erase pulse 24 of the negative voltage -Vs [V] is applied to the Y electrode 3 of the selected display line.

Then, the sustain discharge is performed for all the cells of the selected display line. In particular, in the cell in which the erase pulse 23 is applied to the address electrode 4, the address discharge between the address electrode 4 and the Y electrode 3 is performed. During the discharge,
As shown in the figure, excessive positive wall charges are accumulated on the dielectric layer 15 on the Y electrode 3.

As a result, when the external voltage is removed, that is, the X electrode 2, the Y electrode 3, and the address electrode 4 are all connected to the GN.
When the potential is D, a self-erasing discharge occurs, and as shown in FIG. 1D, the wall charges of the cell disappear, and erasing of display is realized.

Here, in this embodiment, when discharging all the cells of the selected display line and accumulating the wall charges, a positive voltage Vw [V] write pulse 1 is applied to the X electrode 2.
9. Write pulse 2 of negative voltage, −Vs [V], applied to Y electrode 3
0, a voltage necessary for starting discharge between the X electrode 2 and the Y electrode 3 is applied, and the auxiliary pulse 25 of the positive voltage, Va [V] is also applied to the address electrode 4 corresponding to the cell which does not perform display. Is applied, a discharge is caused not only between the X electrode 2 and the Y electrode 3 but also between the address electrode 4 and the Y electrode 3, and the dielectric layer surface near the Y electrode 3 corresponding to the cell where no display is performed. Can be supplemented with positive wall charges.

Therefore, even in a cell having a high discharge start voltage during the self-erasing discharge, the accumulated wall charges are not relatively insufficient, and the self-erasing discharge is completely performed.
Erase mistakes can be avoided, and good image display can be performed.

[0031]

According to the present invention, the selected display line is selected.
Voltage required to start discharge between first and second electrodes
To discharge all cells for each selected display line
No display is performed in the first step of accumulating charges
Assume that an auxiliary pulse is applied to the third electrode corresponding to the cell.
As a result, in cells that do not perform display,
And between the second and third electrodes as well as between the second and third electrodes.
Discharge occurs and wall charges accumulated near the second electrode
During self-erase discharge, even in a cell with a high discharge start voltage, the accumulated wall charges are not relatively inadequate, the self-erase discharge is completely performed, and erasure mistakes are avoided. And good image display can be performed.

[Brief description of the drawings]

FIG. 1 is a diagram for explaining a driving method of a three-electrode surface discharge type plasma display panel according to one embodiment of the present invention.

FIG. 2 is a conceptual diagram of a three-electrode surface discharge type plasma display panel.

FIG. 3 is an exploded perspective view showing a basic structure of a three-electrode surface discharge type plasma display panel.

FIG. 4 is a view for explaining a method of driving a conventional three-electrode surface discharge type plasma display panel.

[Explanation of symbols]

 2 X electrode 3 Y electrode 4 Address electrode 11, 12 Glass substrate 15 Dielectric layer

Claims (1)

(57) [Claims] A first electrode and a second electrode are arranged on a first substrate in parallel for each display line, and a third electrode is arranged on the first substrate.
A three-electrode surface discharge type plasma display panel arranged on a second substrate facing the first substrate so as to intersect the first and second electrodes, wherein the first and second electrodes are selected from the first and second electrodes. A first step of applying a voltage required to start discharge between the first and second electrodes of the displayed display line to discharge all cells in the selected display line to accumulate wall charges; A second step of writing display data for each display line by selectively performing discharge erasure of the non-displayed cells.
The amount of wall charge stored is determined by the amount of wall charge stored in the display cell.
A method of driving a three-electrode surface discharge type plasma display panel, wherein an auxiliary pulse is applied to the third electrode corresponding to a cell which does not perform display so as to increase the number of cells.