JP3108297B2 - Automatic BPF adjustment method for FM signal detector - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for automatically adjusting a BPF of an FM signal detector in a reproduction apparatus of an audio signal in a stationary VTR, a portable video camera, and the like. The present invention relates to a method for automatically adjusting the BPF of an FM signal detector that can be adjusted with high accuracy.

[0002]

2. Description of the Related Art In a stationary VTR, a portable video camera, or the like, an audio signal is FM-modulated, recorded, and reproduced by an FM signal detector. I that performs detection of an FM signal using a VCO that oscillates at the same frequency as the carrier of the FM signal
There is an FM signal detector that has been converted into a C signal. In such a case, it is necessary to set the oscillation frequency of the VCO to a frequency exactly equal to the carrier of the FM signal. for that purpose,
An accurate oscillation frequency can be expected if a tank circuit including a capacitor and a coil or a device using a crystal oscillator is used as the oscillation element of the VCO. However, if a tank circuit or a crystal oscillator is used as the oscillation element of the VCO, the tank circuit or the crystal oscillator must be externally attached to the IC when it is made into an IC, which increases the number of external components and the number of pins of the IC. There was a problem of inviting.

[0003] Therefore, taking advantage of the fact that the carrier frequency of the input FM signal is very accurate, an FM that can use a VCO that does not use a tank circuit or a crystal oscillator can be used.
A signal detector is used. FIG. 2 shows such an FM signal detector, and a reproduction signal including an audio signal and a video signal is applied to an input terminal (1). The center frequency of the BPF (2) is set to extract an FM-modulated audio signal. When a BPF is formed into an IC, the center frequency of the BPF tends to fluctuate, and adjustment is required. Therefore, FIG.
In the figure, the BPF (2) is connected to the variable resistor (4) via the external terminal (3) of the IC. Variable resistor (4)
To adjust the center frequency of the BPF (3),
The M signal is extracted at the maximum level. The extracted FM signal is applied to the phase comparator (5), and the FM signal from the VCO (6) is
The signal is compared with a signal having the same frequency as the carrier of the M signal.

The VCO (6) comprises a BPF and a limiter, and does not use a tank circuit or a crystal oscillator. The phase comparator (5) detects a phase difference and a frequency difference between two input signals, and an AC component of the difference is an FM detection signal, and a DC component is a VCO signal.
This is the variation of the free-run frequency in (6).

The output signal of the phase comparator (5) is a current output and is smoothed by a time constant determined according to the capacitor (8) of the filter (7) and the current value. A reference voltage Vref from a reference power supply (10) is applied to the filter (7) via a resistor (9), and the DC voltage of the capacitor (8) when there is no signal is the reference voltage Vref. Therefore, the output signal of the phase comparator (5) is equal to the reference voltage Vre.
The output is superimposed on f.

[0006] The output signal of the filter (7) is applied to a V / I (voltage-to-current conversion) conversion circuit (11) and becomes a current to change the center frequency of the VCO (6). Therefore, V
The CO (6) oscillates in synchronization with the input FM signal of the correct frequency, and the phase difference and the frequency difference between the two input signals in the phase comparator (5) can be detected.

Therefore, the output signal of the filter (7) can be output to the output terminal (13) via the buffer (12) as an FM detection signal.

[0008]

However, in the block shown in FIG. 2, the free-running frequency of the VCO (6) in the initial state may not be the set value (frequency equal to the carrier of the FM signal), which is a large difference. Therefore, there is a problem that the dynamic range at the output terminal (13) cannot be sufficiently obtained.

That is, the carrier frequency of the FM signal is 1.
Suppose that the free-run frequency of the VCO (6) is expected to oscillate at 1.5 MHZ.
In this state, it is assumed that the VCO (6) oscillates at 1.6 MHz. Then, 1.5M is output from the phase comparator (5).
A signal corresponding to the frequency difference between HZ and 1.6 MHZ is generated. Since this signal is constantly generated, it becomes a DC voltage ΔV at the filter (7). DC voltage ΔV is equal to reference voltage Vref
And applied to the V / I conversion circuit (11).
The free-run frequency of (6) is corrected to 1.5 MHz.
Therefore, the frequency characteristic of the BPF constituting the VCO (6) is converted from A to B in FIG. The reference voltage Vref from the reference power supply (10) is set so that the FM detection signal generated at the output terminal (13) is output with the maximum dynamic range. When the above-described voltage ΔV is superimposed on the reference voltage Vref, the no-signal level of the FM detection signal fluctuates, and the dynamic range of the FM detection signal cannot be sufficiently secured. There was a risk of distortion. In particular, recent ICs are desired to have low power consumption, and the power supply voltage has been reduced.
Therefore, since the dynamic range cannot be originally secured sufficiently, the DC fluctuation is a problem.

Further, the FM signal detector shown in FIG.
(2) is connected to a variable resistor (4) via an external terminal (3) of the IC. This is because it is necessary to adjust the variable resistor (4) to adjust the center frequency of the BPF (3). However, the adjustment operation complicates the manufacturing process, and an increase in the number of parts causes an increase in cost. Was. Also, BPF
The adjustment of the center frequency in (2) needs to be performed accurately, and when considering automatic adjustment, it is difficult to obtain accurate automatic adjustment.

[0011]

SUMMARY OF THE INVENTION The present invention has been made in view of the above points, and has a first BPF for extracting an input FM signal.
A VCO whose center frequency changes in the same direction as the first BPF according to the control signal; a phase comparator for detecting a phase difference between an oscillation output signal of the VCO and an FM signal from the first BPF; A filter for smoothing the output signal of the filter, superimposing the smoothed signal on a reference voltage from a reference power supply, outputting the superimposed signal to the VCO and outputting the signal as an FM detection signal, and applying the output voltage of the filter to the output. A DC blocking filter that blocks a DC component of a voltage, a bias circuit that superimposes an output AC signal of the DC blocking filter on a reference voltage from the reference power supply, and outputs the output signal of the filter and an output signal of the bias circuit. And a DC level difference between the two signals is detected, and the oscillation frequency of the VCO and the center frequency of the first BPF are controlled in accordance with the difference. That a comparator the control signal generated, the first 1BPF and zapping circuit for generating a control signal for adjusting the center frequency of the first 1BPF control signal and adding from control signal and the comparator from the zapping circuit
An adder to be applied to the first BPF, and when adjusting the center frequency of the first BPF, a feedback loop in which an output signal of the phase comparator is fed back is cut off so that the VCO oscillates in a free run. A control voltage for adjusting the oscillation frequency of the VCO is applied to the terminal of the comparator to which the output signal of the filter is applied, and the oscillation frequency of the VCO is set to a desired value, and at the same time, the center frequency of the first BPF is roughly adjusted. A test signal is applied to the first BPF, and a control signal for fine adjustment is generated from the zapping circuit while observing an output signal of the test signal to finely adjust the center frequency of the first BPF. .

[0012]

According to the present invention, the level of the output signal of the filter is compared with the output signal of the bias circuit, the DC fluctuation component in the output signal of the phase comparator is extracted, and the free-run frequency of the VCO is adjusted. I have. Therefore, the DC voltage for free-run frequency adjustment is not applied to the VCO from the filter, and the FM detection signal can be output by being superimposed on the reference voltage.

Further, according to the present invention, the VCO and the first BP
F is configured so that the oscillation frequency changes in the same direction according to the control signal, and the output of the comparator is also applied to the first BPF, so that the center frequency of the first BPF can be automatically adjusted.
Further, according to the present invention, when adjusting the center frequency of the first BPF, the feedback loop to which the output signal of the phase comparator is fed back is cut off so that the VCO oscillates in free-run,
First, the control frequency for adjusting the oscillation frequency of the VCO is applied to the terminal of the comparator to which the output signal of the filter is applied, and the oscillation frequency of the VCO is set to a desired value. Coarse adjustment is possible. Next, since a test signal is applied to the first BPF and a control signal for fine adjustment is generated from the zapping circuit while observing the output signal, the center frequency of the first BPF can be finely adjusted.

[0014]

FIG. 1 shows a black expansion circuit according to the present invention.
(14) a DC blocking filter to which the output voltage of the filter (7) is applied to block a DC component of the output voltage; (15) a reference power supply for generating a voltage equal to the reference voltage Vref of the reference power supply (10); 16) is a DC blocking filter (14)
A bias circuit for superimposing the output AC signal on the reference voltage from the reference power supply (15) and outputting the superposed signal; and (17) a comparator comprising an output signal of the filter (7) and an output of the bias circuit (16). A comparator which compares the level of the signal with the signal, detects a DC level difference between the two signals (the AC component is canceled out), and generates a current IDC according to the difference;
8) is a constant current source that generates a current Io that determines the center frequency of the VCO (6), and (21) adds the current IDC and the current Io and supplies the result to the V / I conversion circuit (11), and the VCO (6). )
(50) is a first BPF whose center frequency is roughly adjusted according to the collector current of the transistor (51), (10)
0) is a zapping circuit for finely adjusting the center frequency of the first BPF (50), and (101) is an adding circuit.

In FIG. 1, the same circuit blocks as those in FIG. 2 are denoted by the same reference numerals, and description thereof will be omitted. now,
The carrier frequency of the FM signal is 1.5 MHz and the VCO
It is assumed that the free-run frequency of (6) is also expected to oscillate at 1.5 MHz. In that state, VCO (6)
Oscillates at 1.6 MHz. Then, from the phase comparator (5), a DC signal (a DC signal for returning the VCO (6) to the carrier frequency) corresponding to the frequency difference between 1.5 MHZ and 1.6 MHZ and an AC signal AC subjected to FM detection are obtained. Occur. Of these signals, the AC signal AC is constantly generated, and therefore becomes a DC voltage ΔV at the filter (7). DC voltage ΔV
And the AC signal AC are superimposed on the reference voltage Vref, and IC
And is applied to a DC blocking filter (14) and a comparator (17) through an external terminal (19). When the DC component is removed by the DC blocking filter (14), only the AC signal AC passes, and the DC signal is re-biased by the bias circuit (16) and the external terminal (20).
Are applied to the comparator (17). One input of the comparator (17) is connected to a DC voltage Δ from an external terminal (19) of the IC.
A signal in which V and the AC signal AC are superimposed on the reference voltage Vref is applied. Therefore, when the comparison operation is performed in the comparator (17), the reference voltage Vref and the AC signal A
C is canceled, and only the DC voltage ΔV is detected. The detected DC voltage ΔV is output in a current format and supplied to the current mirror circuit (21) as a current IDC.

The constant current source (18) generates a current Io that determines the center frequency of the VCO (6). The current Io is added to the current IDC and a current mirror circuit (21)
And supplied to the V / I conversion circuit (11). Therefore, the center frequency of the VCO (6) is controlled by the current IDC. When the center frequency of the VCO (6) changes, the DC voltage Δ of the filter (7) changes accordingly.
V changes, and further, the output current IDC of the comparator (17) changes. That is, the feedback loop operates, and the operation continues until the DC voltage of the filter (7) becomes equal to the reference voltage Vref. Then, the DC voltage of the filter (7) becomes equal to the reference voltage Vref, and the VCO (6)
Is adjusted to 1.5 MHZ.

At the same time as the above operation, the output voltage of the filter (7) is applied to the V / I conversion circuit (11),
(6) oscillates in synchronization with the phase of the input FM signal. Accordingly, the VCO (6) adjusts the free-run frequency to 1.5 MHZ and inputs F
Oscillation occurs in synchronization with the phase of the M signal, and accurate detection of the FM signal becomes possible.

Since the DC voltage of the filter (7) becomes equal to the reference voltage Vref, the detected AC signal AC
Can be superimposed on a desired no-signal voltage (reference voltage Vref) and obtained at the output terminal of the filter (7), and a signal can be obtained with a dynamic range that makes full use of the power supply voltage.
The final output is obtained at an output terminal (13) via a buffer (12).

FIG. 4 shows a specific circuit example of the V / I conversion circuit (11) of FIG. 1. A voltage from the filter (7) is applied between the terminal (30) and the terminal (31), and the difference is obtained. Dynamic amplifiers (32) and (33) and diodes (34), (3
5) and (36) are converted into current. Also,
The transistor (37) of the current mirror circuit (21) of FIG.
Is equivalent to the transistor (37) in FIG.
It serves as an operating current source for the differential amplifier (33). Therefore, a current that is the sum of the voltage obtained by converting the voltage from the filter (7) into a current and the collector current of the transistor (37) flows through the terminal (38).

FIG. 5 shows a specific circuit example of the VCO (6) of FIG. 1, which is composed of a second BPF (47) having terminals (40) and (41) as inputs and outputs, and a limiter (42). Is done. The differential amplifier (4) constituting the second BPF (47)
Changing the transconductance gm of (3) and (44) changes the center frequency of the second BPF (47). The transconductance gm of the differential amplifiers (43) and (44) is
Operating current source (45) for differential amplifiers (43) and (44)
And (46) may be changed. Therefore, if the current flowing through the terminal (38) in FIG. 4 is set to the operating current sources (45) and (46), the center of the second BPF (47) is changed according to the output current of the V / I conversion circuit (11). The frequency changes, and the center frequency of the VCO (6) changes.

The VCO (6) in FIG. 1 is not limited to the one shown in FIG. The oscillation frequency of the multivibrator can be determined according to the operating current source of the differential amplifier constituting the multivibrator and the capacitance value of the capacitor. VCO (6) in FIG. 1 and first BPF
(50) may be any relationship as long as the center frequency changes in the same direction according to the control signal.

The first BPF (50) shown in FIG. 1 is a second BPF having the terminal (40) and the terminal (41) shown in FIG.
It can be made with the same circuit configuration as (47). With the circuit having the same configuration, the second BPF (47) is 1.5 MHZ
If the first BPF (50) is adjusted to 1.
It can be adjusted to 5 MHZ. That is, the current Io and the current IDC
The transistor (51) is current-mirror-connected to a current mirror circuit (21) in which a current to which the sum of the above and the current flows flows. In this way, the adjustment current flows through the transistor (51), and the center frequency of the first BPF (50) can be automatically adjusted. That is, the current from the transistor (51) is inverted by the current mirror circuit (102) and flows to the first BPF (50) via the adding circuit (101). Thereby, the first B
The center frequency of the PF (50) can be roughly adjusted. The coarse adjustment will be described. 1st BPF (50) of FIG. 1 and VCO
Since (6) is formed on the same IC when it is formed into an IC, the characteristics can be relatively uniformed, but it is difficult to completely equalize the characteristics because it is physically separated. Therefore, the control signal for controlling the center frequency of the VCO (6)
It is difficult to completely adjust the first BPF (50). Therefore, in the present invention, the first BPF (5) that has been roughly adjusted by the zapping circuit (100) during IC manufacturing.
Fine adjustment is performed at 0).

FIG. 6 shows a method of zapping when the FM signal detector of FIG. 1 is manufactured as an IC.
Zapping is performed when the IC is still in a wafer state, and is performed when the electrical characteristics of the chip are checked from pins or pads of the IC using a so-called IC tester. First, a phase comparator (5), a filter (7), V
/ I conversion circuit (11) and VCO (6) PLL
The loop is cut off, and the VCO (6) oscillates at the free-run frequency (cut-off mode is prepared in advance. In the example of FIG. 6, the output signals of the first BPF (50) and the VCO (6) are sent to the phase comparator (5). So that the frequency characteristics of the first BPF (50) can be observed. In addition, a terminal (103) for measuring the output signal level of the first BPF (50) and a terminal (104) for measuring the oscillation frequency of the VCO (6) are provided.
A control voltage for adjusting the free-run frequency of the CO (6) is applied from the variable power supply (105).

From this state, the voltage of the variable power supply (105) is swept. Then, similarly to the case of FIG. 1, the current (current Io + current ID) flowing through the transistor (37) of FIG.
C) changes, and the oscillation frequency of the VCO (6) changes.
At this time, the reference voltage Vref from the filter (7) is applied to the terminals (30) and (31). And a terminal (104) for measuring the oscillation frequency of the VCO (6).
The oscillation output signal obtained from the above is measured, and a point at which oscillation occurs accurately at the free-run frequency (1.5 MHZ) is searched. Thereby, the free-run frequency adjustment of the VCO (6) is completed. At the same time, a control current flows from the current mirror circuit (21) via the transistor (51) and the first BPF
The coarse adjustment of the frequency characteristic of (50) is performed.

Next, a test signal is applied to the input terminal (1), the level of the signal obtained from the terminal (103) is measured, and the frequency characteristic of the first BPF (50) is finely adjusted. That is, while observing the level of the signal obtained from the terminal (103), the resistance value of the zapping circuit (100) is determined,
A control current corresponding to the resistance value is generated. The control current is added to the current from the current mirror circuit (21) and supplied to the first BPF (50). Assuming that the center frequency of the first BPF (50) is 1.5 MHZ, 1.4 MHZ,
1.5 MHZ and 1.6 MHZ signals are applied in order, and a center frequency is selected so that the output level becomes equal at the three points. FIG. 9 shows this state.
The center frequency of the first BPF (50) is selected so that the levels of the points are uniform.

Thereafter, the IC as a product is changed from the state shown in FIG.
In this case, the state returns to the state shown in FIG. 1. In FIG. 1, however, the free-run frequency of the VCO (6) is adjusted similarly to the case shown in FIG. If a control current for adjustment is passed, fine adjustment of the center frequency of 1BPF (50) becomes possible. FIG. 7 shows a specific circuit example of the zapping circuit (100) in FIG. 6. By selecting conduction or interruption of the zapping transistors (110) to (113), 16 different currents are obtained at the point A. Value is obtained. The current at point A is a current mirror circuit (1
It flows to point B via 14) and (115). The current at the point A is assumed to increase or decrease based on the eighth current, which is assumed to be Iz. The current flowing through the current mirror circuit (116) is defined as Iz. By doing so, a control current for fine adjustment flowing in or out of the point B can be generated, and is added to the current from the current mirror circuit (102) and flows to the first BPF (50). FIG. 8 shows an example of the zapping transistors (110) to (113). In observation, the pad (117) is opened or grounded, and the on / off of the transistor (110) is determined. When the observation is completed and the transistor (110) is turned off, the Zener diode (118) is destroyed by the current from the pad (117), and the transistor (11) is turned off.
When turning on (0), the pad (117) is opened. These operations are automatically performed by an IC tester.

[0027]

As described above, according to the present invention, the level comparison between the output signal of the filter and the output signal of the bias circuit is performed, and the DC fluctuation component in the output signal of the phase comparator is extracted. The free-run frequency of the VCO is adjusted according to the DC fluctuation component. Therefore, a DC voltage for free-run frequency adjustment is not applied from the filter to the VCO, and the non-signal voltage of the FM detection signal can be set to the reference voltage. As a result, an FM detection signal can be obtained with a dynamic range that makes full use of the power supply voltage, and an FM signal detector that can operate even at a low power supply voltage and is suitable for use in an IC can be obtained.

According to the present invention, the VCO and the first BP
F is configured so that the oscillation frequency changes in the same direction according to the control signal, and the output of the comparator is also applied to the first BPF, so that the center frequency of the first BPF can be automatically adjusted, eliminating the trouble of adjustment. . Further, according to the present invention, the first BP
When adjusting the center frequency of F, the feedback loop in which the output signal of the phase comparator is fed back is cut off so that the VCO oscillates in free-run. First, the terminal of the comparator to which the output signal of the filter is applied Since the oscillation frequency of the VCO is set to a desired value by applying the control voltage for adjusting the oscillation frequency of the VCO, the center frequency of the first BPF can be roughly adjusted. Next, since a test signal is applied to the first BPF and a control signal for fine adjustment is generated from the zapping circuit while observing the output signal, the center frequency of the first BPF can be finely adjusted. As a result, the center frequency of the first BPF can be automatically adjusted with the same accuracy as in manual operation.

[Brief description of the drawings]

FIG. 1 is a block diagram showing an FM signal detector according to the present invention.

FIG. 2 is a block diagram showing a conventional FM signal detector.

FIG. 3 is a characteristic diagram for describing a conventional FM signal detector.

FIG. 4 is a circuit diagram showing a specific circuit example of the FM signal detector of FIG. 1;

FIG. 5 is a circuit diagram showing a specific circuit example of the FM signal detector of FIG. 1;

FIG. 6 is a diagram illustrating a method of automatically adjusting the BPF of the FM signal detector according to the present invention.

FIG. 7 is a circuit diagram showing a specific circuit example of the zapping circuit (100) of FIG.

8 is a circuit diagram showing a specific circuit example of the zapping transistor of FIG. 7;

FIG. 9 is a characteristic diagram for explaining FIG. 6;

[Description of Signs] (5) Phase comparator (6) VCO (7) Filter (14) DC blocking filter (16) Bias circuit (17) Comparator (100) Zapping circuit

──────────────────────────────────────────────────続 き Continued on the front page (58) Field surveyed (Int. Cl. ⁷ , DB name) H03D 3/02 H03L 7/08

Claims (2)

(57) [Claims] 1. A first BPF for extracting an input FM signal, a VCO whose center frequency changes in the same direction as the first BPF in accordance with a control signal, and an oscillation output signal of the VCO and an FM signal from the first BPF. A phase comparator for detecting a phase difference; smoothing an output signal of the phase comparator; superimposing the smoothed signal on a reference voltage from a reference power supply; outputting the superimposed signal to the VCO; and outputting the signal as an FM detection signal. A filter; a DC blocking filter to which an output voltage of the filter is applied to block a DC component of the output voltage; and a bias circuit which superimposes an output AC signal of the DC blocking filter on a reference voltage from the reference power supply and outputs the superposed signal. Performing a level comparison between the output signal of the filter and the output signal of the bias circuit to detect a DC level difference between the two signals,
According to the difference, the oscillation frequency of the VCO and the 1B
A comparator for generating a control signal for controlling the center frequency of the PF; a zapping circuit for generating a control signal for adjusting the center frequency of the first BPF; and a control signal from the zapping circuit and a control signal from the comparator. And an adder for applying to the first BPF. When the center frequency of the first BPF is adjusted, a feedback loop in which an output signal of the phase comparator is fed back is cut off, and the VCO is free-run. Oscillate, and apply a control voltage for adjusting the free-run frequency of the VCO to a terminal of a comparator to which an output signal of the filter is applied.
At the same time as setting the oscillation frequency to a desired value.
The center frequency of F is roughly adjusted, and then a test signal is applied to the first BPF and a control signal for fine adjustment is generated from the zapping circuit while observing an output signal of the test signal.
A BPF automatic adjustment method for an FM signal detector, wherein a center frequency of a BPF is finely adjusted. 2. The FM signal detector according to claim 1, wherein said FM signal detector comprises an IC, and said center frequency of said first BPF is roughly adjusted by an IC.
2. The method according to claim 1, wherein the step is performed at the time of manufacturing.
Automatic BPF adjustment method for M signal detector.