JP3096341B2 - High electron mobility transistor - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a high electron mobility transistor having an InAlAs gate contact layer / InGaAs channel layer / InAlAs carrier supply layer / InAlAs buffer layer.

[0002]

2. Description of the Related Art InAlAs gate contact layer / In
GaAs channel layer / InAlAs carrier supply layer / I
FIG. 5 shows a cross-sectional structure of a high electron mobility transistor having an nAlAs buffer layer. 1 is an electrode metal, 2 is
i-InAlAs gate contact layer, 3 is i-InAlAs
GaAs channel layer, 4 is an i-InAlAs spacer layer, 5 is an n-InAlAs carrier supply layer, 6 is i-InAlAs carrier supply layer.
-InAlAs buffer layer, 7 I. -InP substrate 11 is an electrode metal (for alloy). As described above, a high electron mobility transistor (HEMT) having a carrier supply layer below a channel layer is generally called an inverted HEMT. This structure has an InGaAs channel layer / I
It is considered that the two-dimensional electron layer formed at the interface of the nAlAs carrier supply layer approaches the gate, and thus exhibits better device characteristics than the HEMT having the conventional structure.

References describing this type of technology include (1) Kajiyama and others; Applied Physics Lett., Vol. 23,
No. 8, p. 458, 1973, (2) GI NG, et al .; Applied Physics Letter, 52
Vol. 9, No. 728, 1988 (GI Ng, et.a.
l .; Appl. Phys. Lett., 52 (9), p.728, 1988),
(3) Akasaki et al .; IEICE Technical Report, 91 (321), ED91
-118, p. 13, and the like.

[0004]

In the case of the above-mentioned conventional inverted HEMT, since the i-InAlAs gate contact layer exists between the source and drain electrodes and the two-dimensional electron layer, the two-dimensional source and drain electrodes are connected to each other. In order to contact the electronic layer, an AuGe-based alloy ohmic electrode was indispensable. In this case, there are problems such as (i) it is difficult to reduce the contact resistance in a fine pattern, (ii) poor uniformity and reproducibility, and (iii) large changes with time to heat.

SUMMARY OF THE INVENTION An object of the present invention is to solve the above-mentioned problems in the prior art, and to achieve high electron transfer that enables ohmic contact between source and drain electrodes and an InGaAs channel layer by using a non-alloy, and also enables low contact resistance. The purpose is to provide a transistor.

[0006]

In order to achieve the above object, according to the first aspect of the present invention, an InAlAs gate contact layer / InGaAs channel layer / InAlAs
In a high electron mobility transistor having a carrier supply layer / InAlAs buffer layer, In
There is AlAs gate contact layer, InAlAs gate contact layer immediately below the source and drain electrodes is removed, a source electrode and a drain electrode are in ohmic contact with the direct InGaAs channel layer, before
The In composition of the InGaAs channel layer exceeds 80%
A high electron mobility transistor characterized by being formed as described above .

According to a second aspect, an InAlAs gate is provided.
Contact layer / InGaAs channel layer / InAlAs
High voltage having carrier supply layer / InAlAs buffer layer
In a child mobility transistor, In
There is an AlAs gate contact layer, a source electrode and
The InAlAs gate contact layer immediately below the drain electrode is
Has been removed and the source and drain electrodes
Ohmic contact with InGaAs channel layer
The In composition of the InGaAs channel layer is within the channel layer.
InAlAs gate contact
In composition at the interface between the gate layer and the InGaAs channel layer is 80%.
% Of the high electron mobility transistor.

[0008]

Further, according to claim 3 , InAlA
s gate contact layer / InGaAs channel layer / In
In a high electron mobility transistor having an AlAs carrier supply layer / InAlAs buffer layer, InGaAs
An InAs layer is inserted in the channel layer, an InAlAs gate contact layer is provided immediately below the gate electrode, and the InAlAs gate contact layer is provided immediately below the source and drain electrodes and above the InAs layer.
The As channel layer is removed, and the high electron mobility transistor has a structure in which the source electrode and the drain electrode are in direct ohmic contact with the InAs layer.

[0010]

According to the present invention, In is provided under the source and drain electrodes.
By removing the AlAs gate contact layer by etching, ohmic contact between the source and drain electrodes and the InGaAs channel layer is made possible by non-alloy.
By eliminating the Schottky barrier between the s channel layers, the contact resistance is reduced.

[0011]

FIG. 1 shows an element structure according to a first embodiment of the present invention. This structure is manufactured by removing at least the InGaAs layer using wet etching or dry etching. When the InGaAs channel layer is lattice-matched to InP, the In composition is 53%.
The Schottky barrier height Φ _B at this time is about 0.2 eV (Reference 1). This Φ _B cannot be exceeded by thermal excitation at room temperature. However, by optimizing the device structure, a two-dimensional electron layer can be formed several tens of meters from the interface between the source and drain electrodes and the InGaAs channel layer. Becomes Thereby, the ohmic contact between the source and drain electrodes and the two-dimensional electron layer can be obtained by the non-alloy.

FIG. 2 shows an element structure according to a second embodiment of the present invention. 8 is an i-InGaAs channel layer (I
n composition 80% or more). When the In composition of InGaAs exceeds 80%, Φ _B becomes almost zero (Reference 1). From this, it is possible to reduce the contact resistance by setting the In composition of the InGaAs channel layer to 80% or more.

FIG. 3 shows an element structure according to a third embodiment of the present invention. 9 is an i-InGaAs channel layer (I
n composition is increased step by step). In the second embodiment, by gradually increasing the In composition of the InGaAs channel layer, the In composition becomes 80% at the interface of the InAlAs gate contact layer / InGaAs channel layer.
This is what is done above.

FIG. 4 shows an element structure according to a fourth embodiment of the present invention. Reference numeral 10 denotes an InAs insertion layer. InA
The s layer is inserted into the InGaAs channel layer at a thickness of 20 to 60 °. Since Φ _B of InAs is negative,
It is possible to reduce the contact resistance as compared with the case where the source and drain electrodes are brought into contact with the InGaAs channel layer (Reference 1). In addition, it has been confirmed that the method of increasing the In composition of the InGaAs channel layer and the method of inserting the InAs layer increase the mobility and the device characteristics (References 2 and 3). This indicates that the present invention can improve not only the contact resistance but also the electron transport characteristics of the channel layer.

[0015]

As described above, by removing the InAlAs gate contact layer under the source and drain electrodes by etching, ohmic contact between the source and drain electrodes and the InGaAs channel layer can be achieved by non-alloy. In addition, the contact resistance can be reduced by eliminating the Schottky barrier between the drain electrode and the InGaAs channel layer.

[Brief description of the drawings]

FIG. 1 shows an InGaAsH inverted structure according to a first embodiment of the present invention.
Sectional drawing of EMT.

FIG. 2 is a sectional view of a second embodiment of the present invention.

FIG. 3 is a sectional view of a third embodiment of the present invention.

FIG. 4 is a sectional view of a fourth embodiment of the present invention.

FIG. 5 is a cross-sectional view of a conventional InGaAs inverted structure HEMT.

[Explanation of symbols]

DESCRIPTION OF SYMBOLS 1 ... Gate electrode metal 2 ... i-InAlAs gate contact layer 3 ... i-InGaAs channel layer 4 ... i-InAlAs spacer layer 5 ... n-InAlAs carrier supply layer 6 ... i-InAlAs buffer layer 7 ... S. I. -InP substrate 8 ... i-InGaAs channel layer (In composition 80% or more) 9 ... i-InGaAs channel layer (In composition is gradually increased) 10 ... i-InAs insertion layer 11 ... Source and drain electrode metal (for alloy) 12) Source / drain electrode metal (non-alloy)

────────────────────────────────────────────────── ─── Continuation of the front page (56) References JP-A-63-102270 (JP, A) JP-A-63-107173 (JP, A) JP-A-61-174675 (JP, A) IEICE Technology Research Report, Vol. 91, No. 321 (1991-11-15), ED91-118, CPM91-89, pp. 195-143. 13-18 (58) Field surveyed (Int.Cl. ⁷ , DB name) H01L 29/778 H01L 21/338 H01L 29/812

Claims (3)

(57) [Claims] 1. An InAlAs gate contact layer / InG
aAs channel layer / InAlAs carrier supply layer / In
High electron mobility transistor having AlAs buffer layer
The InAlAs gate contour just below the gate electrode
And an I / O layer immediately below the source and drain electrodes.
The nAlAs gate contact layer has been removed and the
Source and drain electrodes are directly InGaAs channels
And in ohmic contact with the layer, the high electron mobility transistor, wherein the In composition of the InGaAs channel layer is formed so as to exceed 80%. 2. InAlAs gate contact layer / InG
aAs channel layer / InAlAs carrier supply layer / In
High electron mobility transistor having AlAs buffer layer
The InAlAs gate contour just below the gate electrode
And an I / O layer immediately below the source and drain electrodes.
The nAlAs gate contact layer has been removed and the
Source and drain electrodes are directly InGaAs channels
Layer and in ohmic contact with the formation the like In composition of the InGaAs channel layer is stepwise increased in the channel layer, the In composition is more than 80% at the interface of the InAlAs gate contact layer / InGaAs channel layer A high electron mobility transistor characterized by being made. 3. An InAlAs gate contact layer / InG
aAs channel layer / InAlAs carrier supply layer / In
In a high electron mobility transistor having an AlAs buffer layer, an InAs layer is inserted in an InGaAs channel layer, an InAlAs gate contact layer is provided directly below a gate electrode, and a portion directly below a source electrode and a drain electrode and above the above InAs layer. Wherein the InAlAs gate contact layer and the InGaAs channel layer are removed, and the source electrode and the drain electrode are in direct ohmic contact with the InAs layer.