JP3089794B2 - Method and apparatus for identifying unknown system using adaptive filter - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method and an apparatus for identifying an unknown system using an adaptive filter (adaptive filter). Such an adaptive filter leaks to an echo canceller for removing an echo generated in a 2-wire / 4-wire conversion unit, an equalizer for removing intersymbol interference received on a transmission path, and a microphone for acoustic input. It is applied to a noise canceller for removing noise to be included, a howling canceller for removing howling caused by acoustic coupling from a speaker to a microphone, and the like.

[0002]

2. Description of the Related Art Usually, the identification of an unknown system by an adaptive filter is performed by inputting the same signal to the unknown system to be identified and the adaptive filter, and subtracting the output of the adaptive filter from the output of the unknown system. This is hereinafter referred to as an error signal) to update the coefficients of the adaptive filter. Echo cancellers, equalizers, noise cancellers, howling cancellers, and the like are known as applications of identification of unknown systems using such adaptive filters. (Adaptive Signal Processing (ADAPTIVE SIGNAL PROCES)
SING), Prentice Hall (PRENIC)
E-HALL), 1985; hereinafter, "Document 1") Since the basic operation of the adaptive filter in these applications is almost the same, a description will be given of a noise canceller as an example.

A noise canceller uses an adaptive (adaptive) filter having a transfer function that approximates an impulse response of a path through which noise passes from a noise source to a main input terminal, and uses a pseudo filter corresponding to a noise component mixed into the main input terminal. By generating noise (noise replica), it operates so as to suppress noise that enters the main input terminal and interferes with the signal. At this time, each tap coefficient of the adaptive filter is sequentially corrected by correlating a difference signal obtained by subtracting a noise replica from a mixed signal in which noise and a signal are mixed and a reference noise obtained at a reference input terminal. . As a typical example of such a coefficient correction of the adaptive filter, that is, a convergence algorithm of the noise canceller, an LMS algorithm (LMS ALGOR) is used.
ITHM) (Reference 1) and Learning Identification Method (LEARNING IDENT)
IFICATION METHOD; LIM) (IEE Transactions on Automatic Control (IEEE TRANSACTION)
NS ON AUTOMATIC CONTROL) 1
Vol. 2, No. 3, 1967, pp. 282-287; hereinafter, "Literature 2") is known.

FIG. 14 is a block diagram showing an example of a configuration of a conventional noise canceller. The mixed signal of the signal and the noise detected at the main input terminal 1 is supplied to a subtractor 4. On the other hand, the reference noise detected at the reference input terminal 2 is supplied to the adaptive filter 3.
Noise generated by the adaptive filter 3
The noise component is eliminated by subtracting the replica from the mixed signal by the subtractor 4, and the signal is supplied to the output terminal 5. The output of the subtractor 4 is simultaneously supplied to the multiplier 13 and multiplied by 2α, and used for updating the coefficient of the adaptive filter 3. Where α is a constant and is called the step size. Now, the signal s _k (where k is an index indicating the time), the reference noise is _nk , and the noise to be deleted is v
_Assuming that the additional noise received by _k and s _k is δ _k , the signal W _k supplied from the input terminal 1 to the subtractor 4 is represented by the following equation. W _k = s _k + v _k + δ _k .... (1) The purpose of the noise canceller is to generate a replica u _k of the noise component v _k in equation (1) and eliminate the noise. 14, adaptive filter 3, a subtracter 4, using a closed loop circuit consisting of the multiplier 13, by generating an adaptive noise replica u _k, a difference in the following equation as an output signal of the subtracter 4 The signal d _k can be obtained. _{d k = s k + v k} -u k ........................................ .. (2) However, since δ _k is generally considered to be sufficiently smaller than s _k , this is ignored. In equation (2),
(V _k −u _k ) is called residual noise, and is equal to an error signal when considered as a system identification problem. Assuming the LMS algorithm, the m-th coefficient _{cm, k} of the adaptive filter 3 is updated according to the following equation. _{cm, k} = _{cm, k-1} + 2α · d _k · _{nm, k-1} ..................... 3) expressed equation (3) for all n coefficients in matrix _{form, c k = c k-1} + 2α · d k · n k-1 ............... ....... (4) Here, _ck and _nk are respectively given by the following equations. c _k = [c ₀ c ₁ ... c _N-1 ] ^T ... _{.. (5) n k = [} n k n k-1 ............... n k-N + 1] T ............ ... (6) where [•] ^T represents the transpose of the matrix. On the other hand, in the LIM, the coefficient is updated according to equation (7) instead of equation (4). c _k = c _k−1 + (2 μ / N · σ _n ² ) · d _k · n _k-1 (7) μ The step size, σ _n ^2, is the average power input to the adaptive filter 3. N
σ _n ² is used to make the value of the step size μ inversely proportional to the average power and perform stable convergence. N
Although there are several methods for obtaining σ _n ² , for example, it can be obtained by Expression (8).

(Equation 1)

[0005] The step size in equations (4) and (7) defines the speed of convergence of the adaptive filter and the residual noise level after convergence. In the case of LMS,
The larger α is, the faster the convergence, but the higher the residual noise level. Conversely, to achieve a sufficiently low residual noise level, a correspondingly small α must be employed, which leads to a reduction in convergence speed. The same applies to the step size μ of the LIM.

[0006] In order to satisfy conflicting demands on the convergence speed and the step size of the residual noise, algorithms for varying the step size have been proposed. (Proceedings of International Conference on Axistics Speech and
Signal processing (PROCEEDINGSOF)
INTERNATIONAL CONFERENCE
ON ACOUSTICS, SPEECH AND
SIGNAL PROCESSING) 1990, 1
This algorithm is hereinafter referred to as SGA-GAS (Stochastic G).
radient Adaptive Filters with Gradient Adaptive St
ep Size).

The SGA-GAS uses α _k in place of the step size α of the LMS algorithm in equation (4). α _k is defined by Expression (9) as a value proportional to the negative slope of the power d _k ² of the difference signal d _k .

(Equation 2) ρ is a positive constant and usually a very small value is used. Equation (9) is _obtained by using the noise _nk as follows: α _k = α _k−1 + ρd _k d _k−1 n ^T _k−1 n _k ………………… (10) Can be represented. In addition, α _k must satisfy the following condition.

(Equation 3) Here, tr ｛·｝ is a matrix trace, and R is an _nk autocorrelation matrix.

FIG. 15 is a block diagram of the SGA-GAS. 14 is different from FIG. 14 in that the fixed step size 2α is calculated using the correlation of the filter input signal calculated by the correlation calculation circuit 16.
And is given after being limited by the limiter 17.

FIG. 16 shows the correlation calculation circuit 16 in FIG.
This is an example of the configuration. The delay elements 121 ₁ , 121 ₂ ,.
The tapped delay line consisting of 121 _N-1 and 121 _N has n
_k is supplied via input terminal 120. Delay element 121
_{1, 121 2, ......, 121} N-1, 121 respectively output the multiplier 122 _{1 N, 122 2, ......, 122} N-1,
122 _N and the input _nk and the delay elements 121 ₁ , 121
_2, ..., 121 output the multiplier 122 ₁ of _N-1, 122
_2, 122 _3, ..., it is supplied to the 122 _N-1, 122 _N. That is, the multipliers 122 ₁ , 122 ₂ ,.
Each of the _{2 N-1, 122 N (} n k, n k-1), (n
_k-1 , _nk-2 ), ( _nk-2 , _nk-3 ), ..., (n
_{kN + 2, n kN + 1} ), (n kN + 1, n kN) is input, the output of these multipliers is _{n k n k-1, n} k-1 n
_{k-2, n k-2} n k-3, ......, n k-N + 2 n k- N + 1, n k-N + 1
n _kN . Multipliers 122 ₁ , 122 ₂ ,..., 12
The outputs of 2 _N−1 and 122 _N are supplied to all the multi-input adders 123, and the outputs of the multi-input adders 123

(Equation 4) Is transmitted to the output terminal 124.

[0010] The correlation C _k obtained by the correlation calculation circuit 16 is transmitted to the step size controller 15. The step size controller 15 can be represented by a block diagram shown in FIG. 17, and calculates Expression (10). The difference signal d _k of FIG. 15 is input to the input terminal 90, and the correlation value C _k = n of _nk supplied from the correlation calculation circuit 16 is input to the input terminal 94.
_k-1 ^T _nk is supplied. The signal obtained at the output terminal 101 is supplied to the limiter 17 in FIG. The d _k supplied to the input terminal 90 is delayed by one sample period by the delay element 91 to become d _k−1 and supplied to the multiplier 92. The multiplier 92 is also supplied with d _k, and the output d _k d _k-1 of the multiplier 92 is transmitted to the multiplier 93. On the other hand, C _k = n _{k -1} ^T _nk supplied to the input terminal 94 is multiplied by d _k d _{k -1} in the multiplier 93 and further multiplied by ρ in the multiplier 94, and then ρd _k d _k- It is transmitted to the adder 98 as a ^{_{1 n k-1 T n k}} . In the adder 98, the signal from the multiplier 95 and the input terminal 9
9, the feedback signal supplied to the output terminal 101 is added.
Is transmitted to As apparent from FIG. 15, the output of the limiter 17 is supplied to the input terminal 99 after being delayed by one sample period by the delay element 10. Therefore, the signal α _k transmitted to the output terminal 101 is α _k−1 + ρd _k d _k−1 n _k−1 ^T n _k
Which is consistent with equation (10).

FIG. 18 shows the structure of the limiter shown in FIG. The step size α _k is supplied to the minimum value circuit 22 in FIG. 18 via the input terminal 23 from the step size controller 15 in FIG. Minimum value circuit 2
The other input terminal 2 has a threshold value of the maximum value Th _H
Are supplied to the maximum value circuit 21 as the minimum value. The other input terminal of the maximum value circuit 21 is supplied with the threshold value Th _L of the minimum value, and the larger one of them is supplied to the output terminal 20 as the maximum value. That is, the step size α _k supplied to the input terminal 23 is limited in the maximum value and the minimum value by the minimum value Th _L and the maximum value Th _H ,

(Equation 5) If Th _L = 0 and Th _H = 2 / (3 · tr３R｝), it is equivalent to executing the equation (11).

The maximum value circuit and the minimum value circuit of FIG. 18 can be realized by the configuration shown in FIG. First, the minimum value circuit will be described as an example. The two input terminals of the minimum value circuit in FIG. 18 correspond to the input terminals 33 and 34 in FIG.
The signals supplied to the input terminals 33 and 34 are
And to the comparator 32 at the same time. The comparator 32 compares the two signals and outputs the smaller signal to the selector 31.
Generates a control signal as selected by. This control signal is transmitted to the selector 31, and the signal from the input terminal 33 or 34 selected by the selector 31 is transmitted to the output terminal 30 as a minimum value. Conversely, in the case of the maximum value circuit, the comparator 32 generates a control signal such that the larger value of the two supplied inputs is selected by the selector 31. Other operations are exactly the same as those of the minimum value circuit.

[0013]

In the ideal case where d _k = v _k -u _k holds, the negative slope of the power d _k ² of the difference signal d _k represents an error in system identification, and Can be used for size control. However, in general, d _k = s _k
Since d _k is affected by s _k as represented by + v _k −u _k, it is no longer possible to obtain a correct d _k ² slope, and
The step size is also not properly controlled. Also, even when s _k is zero, if δ _k in equation (1) cannot be neglected, d _k = v _k −u _k + δ _k ……………………………………. ... (14), and δ _k becomes an obstacle to the error signal v _k −u _{k in the same} manner as s _k . Both of these cause an increase in convergence time or an increase in the final error level after convergence. Further, although the filter input signal is usually a non-stationary signal, the convergence time may be long or unstable due to fluctuations in the filter input signal power.

An object of the present invention, the error signal v _k -u strongly interfering signals for _k, the unknown system identification method by the adaptive filter that can be short convergence time and little stably achieve a final error signal level after convergence And a device.

[0015]

[Means for Solving the Problems]

According to a first aspect of the present invention, a plurality of input signal samples delayed by one sample period are multiplied by a plurality of multiplicands corresponding thereto, and the output of an adaptive filter which outputs the sum of the multiplication results is output. To reduce the difference signal subtracted from the output signal of the unknown system,
When identifying the unknown system by normalizing a value obtained by multiplying the difference signal, the input signal sample and the variable by a filter input power, and adding the updated value to the multiplicand as an update amount per one time to update the value. Then, after adding a value proportional to the slope of the difference signal normalized to the filter input power with respect to the variable to the variable to obtain a sum, and using a limited sum obtained by limiting the sum, the variable It is characterized in that the threshold value for changing and adding the limit is obtained by using the past sum with the limit.

According to a second aspect , in the first aspect , the threshold value is obtained by using a square value of the past limited sum.

[0018] The third invention is the first invention, replaced by a first predetermined constant sum with the limit when it is detected that there is a change in the difference signal, using the first constant And changing the variable.

According to a fourth aspect, in the first aspect, when it is detected that the difference signal fluctuates, the limited sum is replaced with the sum by the number of clocks equal to a predetermined second constant, The variable is changed using the sum .

In a fifth aspect based on the third or fourth aspect , the variation detection of the difference signal is performed by obtaining a square value of the difference signal, and determining the number of clocks after the start of the system identification. A maximum value is obtained from all the square values until a constant is reached, and a product obtained by multiplying the maximum value by a predetermined fourth constant is compared with the square value one by one.

In a sixth aspect based on the third or fourth aspect , the variation detection of the difference signal is performed by obtaining an absolute value of the difference signal, and setting a number of clocks after the start of system identification to a third constant. , A maximum value is obtained from all the absolute values until the absolute value is reached, and a product obtained by multiplying the maximum value by a predetermined fourth constant is compared with the absolute value one by one.

According to a seventh aspect , the first , second , third , fourth , fifth, or fifth aspect is provided.
In the sixth invention, the restricted sum is a value obtained by multiplying the past restricted sum or its squared value by a predetermined fifth constant, and the sum of the predetermined sixth constant and the predetermined sixth constant. Are compared, and the limited sum is used as the limited sum.

In an eighth aspect , the first , second , third , fourth , fifth, or fifth aspect is provided.
In the sixth invention, the restricted sum is a value obtained by multiplying the past restricted sum or its squared value by a predetermined seventh constant, and a predetermined eighth constant and the sum And the maximum value is used as the restricted sum.

In a ninth aspect based on the seventh aspect , the restricted sum is obtained by adding the fifth limited sum to the past limited sum or its squared value.
The minimum value obtained by comparing the value obtained by multiplying the constant with the sixth constant and the sum and the previous restricted sum or the value obtained by squaring the restricted sum are The value obtained by multiplying the seventh constant and the eighth constant are compared, and the maximum value is used as the limited sum.

In a tenth aspect based on the seventh aspect , the limited sum is obtained by multiplying the past limited sum or its squared value by the seventh constant and the sixth sum. the value obtained by multiplying a seventh constant of the minimum and the restricted sum or the restricted sum of the past obtained by comparing the sum with a constant to a value obtained by squaring the eighth And the maximum value is used as the restricted sum.

[0026]

According to an eleventh aspect of the present invention, when identifying the characteristics of an unknown system using an adaptive filter, a subtracter for subtracting an output of the adaptive filter from an output signal of the unknown system to obtain a difference signal; A correlation calculation circuit that receives the input signal of the filter and calculates the power and correlation of the input signal; a first delay element that receives the power and delays it by one sample period; and a difference signal that is supplied from the correlation calculation circuit. A step size controller for sequentially calculating a step size used for updating a coefficient of the adaptive filter by receiving a correlation value, a delay power output from the first delay element, and a second delay element output; A limiter that receives the output of the step size controller and limits the output, and delays the output of the limiter by one sample period. A first multiplier for multiplying the second delay element for feeding back to said step size controller and said limiter, said difference signal and an output of said limiter,
At least a first normalization circuit for normalizing the output of the first multiplier with the power supplied from the correlation calculation circuit, wherein the output of the first normalization circuit is used for updating the coefficient of the adaptive filter. It is characterized in that it is used as a step size.

According to a twelfth invention, when identifying the characteristics of an unknown system using an adaptive filter, a subtracter for subtracting an output of the adaptive filter from an output signal of the unknown system to obtain a difference signal; An error variation detection circuit that receives the input signal of the adaptive filter, and calculates a correlation between the power of the input signal and a correlation calculation circuit that receives the input signal of the adaptive filter and detects a variation of the identification error of the adaptive filter included in the difference signal. A first delay element which receives the power and delays it by one sample period, a delay value which is the output of the first delay element, a correlation value supplied from the difference signal and the correlation calculation circuit, and a second delay element A step size controller for receiving a device output and sequentially calculating a step size used for updating coefficients of the adaptive filter; A limiter to restrict receives the output of the-up size controller, and a second delay element the output of said limiter by one sample period delay returns to the step size controller and said limiter,
A selector for selecting and outputting the output of the limiter and the first constant in accordance with the output of the error variation detection circuit; a first multiplier for multiplying the output signal of the selector by the difference signal; At least a first normalization circuit for normalizing an output of the first multiplier with the power supplied from the correlation calculation circuit, and updating an output of the first normalization circuit with coefficients of the adaptive filter. -It is characterized by being used as a size.

A thirteenth invention is directed to a subtractor for obtaining a difference signal by subtracting an output of the adaptive filter from an output signal of the unknown system when identifying a characteristic of the unknown system using the adaptive filter; Receiving the adaptive filter included in the difference signal and detecting a change in the identification error of the adaptive filter, a holding circuit for holding the output of the error change detecting circuit for a certain period of time, and an input signal of the adaptive filter. A correlation calculating circuit for receiving the power of the input signal and calculating a correlation, a first delay element for receiving the power and delaying by one sample period, and a correlation value supplied from the difference signal and the correlation calculating circuit; A step size receiving the delay power output from the first delay element and the output of the second delay element and used for updating the coefficient of the adaptive filter; The step size for sequential computation
A controller, a limiter that receives and limits the output of the step size controller, and a second delay element that delays the output of the limiter by one sample period and returns the output to the limiter and the step size controller; A selector for selecting and outputting an output of the limiter and an output of the step size controller according to an output of the holding circuit; a first multiplier for multiplying an output signal of the selector by the difference signal; At least a first normalization circuit that normalizes an output of a first multiplier with the power supplied from the correlation calculation circuit, and outputs an output of the first normalization circuit to update a coefficient of the adaptive filter. It is characterized in that it is used as a step size.

In a fourteenth aspect based on the eleventh , twelfth, or thirteenth aspect , the step size controller comprises: a third delay element for delaying the difference signal by one sample period, and an output of the third delay element. And a second multiplication of the difference signal
A third multiplier for multiplying the correlation value output from the correlation calculation circuit by the output of the second multiplier, a fourth multiplier for multiplying the output of the third multiplier by a constant, A second normalization circuit for normalizing the output of the fourth multiplier with a filter input power which is an output of the correlation calculation circuit, and adding the output of the second normalization circuit and the output of the second delay element And an adder.

In a fifteenth aspect based on the twelfth or thirteenth aspect, the error variation detection circuit receives a difference signal and squares the fifth multiplier, and receives an output of the fifth multiplier and 0. A first selector for selecting one of the outputs by a counter output, a first maximum value circuit for receiving the first selector output and the fourth delay element output and outputting a maximum value, and the first maximum value A sixth multiplier for multiplying the output of the circuit by a fourth constant;
A comparison circuit that compares the output of the sixth multiplier with the output of the fifth multiplier and outputs information indicating which is larger, and the fourth delay element is provided by the first maximum value circuit. The output is delayed by one sample period and then fed back to the first maximum value circuit.

In a sixteenth aspect based on the twelfth aspect or the thirteenth aspect, the error variation detection circuit includes: an absolute value circuit for obtaining an absolute value of the difference signal; A third selector for selecting
A first maximum value circuit that receives the third selector output and the fourth delay element output and outputs a maximum value, and a sixth multiplication that multiplies the output of the first maximum value circuit by a fourth constant And a comparison circuit that compares the output of the sixth multiplier and the output of the fifth multiplier and outputs information indicating which is larger, and the fourth delay element includes the first maximum. The output of the value circuit is delayed by one sample period and then fed back to the first maximum value circuit.

[0033]

In a seventeenth aspect based on the eleventh, twelfth or thirteenth aspect, the limiter comprises: an eighth multiplier for multiplying the feedback signal by a fifth constant; and an output of the eighth multiplier and an input signal. A second minimum value circuit that receives the sixth constant and detects a minimum value, a ninth multiplier that multiplies the feedback signal by a seventh constant, and outputs the ninth multiplier and the second It is characterized by comprising a third maximum value circuit which receives the output of the minimum value circuit and the eighth constant and outputs the maximum value.

In an eighteenth aspect based on the eleventh, twelfth or thirteenth aspect, the limiter comprises: a seventh multiplier for multiplying the feedback signal by a fifth constant; and an output of the seventh multiplier and an input signal. A second minimum value circuit that receives a sixth constant to detect a minimum value, and outputs a maximum value in response to the seventh multiplier output, the second minimum value circuit output, and the eighth constant. It is characterized by comprising a third maximum value circuit.

In a nineteenth aspect based on the eleventh, twelfth or thirteenth aspect, the limiter includes a tenth multiplier for receiving the feedback signal and squaring the same, and outputting the tenth multiplier output and a fifth constant. It is characterized by comprising an eighth multiplier for multiplying, and a second minimum value circuit for detecting the minimum value by receiving the output of the eighth multiplier, the input signal and the sixth constant.

According to a twentieth aspect, in the eleventh, twelfth, or thirteenth aspect, the limiter includes a tenth multiplier for receiving the feedback signal and squaring the same, and calculating the tenth multiplier output and a seventh constant. The ninth multiplier is characterized by comprising a ninth multiplier for multiplying, and a third maximum value circuit for outputting the maximum value in response to the output of the ninth multiplier, the input signal and the eighth constant.

In a twenty-first aspect based on the eleventh, twelfth, or thirteenth aspect, the limiter includes a tenth multiplier for receiving the feedback signal and squaring the same, and determining the output of the tenth multiplier and a fifth constant. An eighth multiplier for multiplying, a second minimum value circuit for detecting the minimum value by receiving the output of the eighth multiplier, the input signal, and the sixth constant, the output of the tenth multiplier and the seventh A ninth multiplier for multiplying the constant of
It is characterized by comprising a third maximum value circuit which receives the eighth constant and outputs the maximum value.

In a twenty-second aspect based on the eleventh, twelfth, or thirteenth aspect, the limiter comprises: an eleventh multiplier for receiving the feedback signal and multiplying by a fifth constant; A tenth multiplier for multiplying the feedback signal,
A third minimum value circuit for detecting the minimum value by receiving the multiplier output, the input signal and the sixth constant, and outputting the maximum value by receiving the tenth multiplier output, the input signal and the eighth constant Second
, And a maximum value circuit.

[0040]

The method and apparatus for identifying an unknown system using an adaptive filter according to the present invention normalize the step size with the filter input power when calculating the step size used for updating the coefficient using the slope of the error signal power. This realizes stable and high-speed convergence with respect to an unsteady signal. In addition, the obtained step size change amount is restricted depending on the past step size, thereby preventing the step size from remarkably deviating from a correct value due to interference of noise or the like, and at the same time, identifying the identification error signal. Monitor power to detect sudden changes in the characteristics of the unknown system to be identified, and reset the step size or remove the step size limit for a fixed time to achieve fast convergence and low identification error. To balance.

[0041]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Next, the present invention will be described in detail with reference to the drawings. FIG. 1 is a block diagram showing one embodiment of the present invention. In the figure, the function blocks to which the same reference numerals as in FIG. 15 are assigned have the same functions as in FIG. The difference between FIG. 1 and FIG. 15 is that the correlation value and the filter input power delayed by one sample period via the delay element 8 are supplied to the step size controller 6 as the output of the correlation calculation circuit 7, and This means that the output of the multiplier 13 is normalized by the filter input power in the normalization circuit 14.

FIG. 2 shows the configuration of the correlation calculation circuit 7 of FIG. Although the configuration is basically the same as FIG. 16,
Delay elements 121 ₁ , 121 ₂ ,..., 121 _N−1 , 12
The 1 _N input signals are multipliers 125 ₁ , 125 ₂ ,
..., 125 _N−1 , 125 _N squared and summed in the multi-input adder 126

(Equation 6) Is calculated. Therefore, the correlation calculation circuit 7 calculates the correlation C _k = n
_k-1 ^T _nk and the filter input power P _k = _nk ^T _nk will be calculated. The obtained C _k is supplied to the step size controller 6, and P _k is supplied to the delay element 8 and the normalization circuit 14.

FIG. 3 is a block diagram showing details of the step size controller 6 in FIG. The basic configuration is the same as that of the conventional example shown in FIG. 17, except that the signal supplied from the multiplier 95 to the adder 98 is normalized by the signal supplied to the input terminal 96 in the normalization circuit 97. different. The input terminal 96 is supplied with the filter input power P _k−1 from the correlation calculation circuit 7 via the delay element 8. Therefore, at the output terminal 101, α _k = α _k−1 + ρd _k d _k−1 n ^T _k−1 n _k / P _k−1 (16) is obtained. Equation (16) expresses the second term on the right side of equation (10) as P
It is a form normalized by _k-1 . By normalization, stable control of the step size can be performed even for an unsteady signal.

The structure of the limiter 17 is the same as that of the conventional example described with reference to FIG. The output of the limiter 17 is the multiplier 1
After being supplied to 3, it is multiplied by d _k to obtain α _k · d _k , which is transmitted to the normalization circuit 14. The normalization circuit 14 is also supplied with _pk from the correlation calculation circuit 7, and obtains α _k · d _k
The value α _k / P _k · d _k normalized by P _k is transmitted to the adaptive filter 3 and used for updating the coefficient. Therefore, the coefficient updating equation in the filter 3 is as follows: C _k = C _k−1 + α _k / P _k · d _k · _{nk −1} (17) ^Considering that P ^k is defined in equation (15), equation (17) is equal to LIM in equation (7) except that the step size is adaptively controlled. Therefore, the first and twelfth inventions shown in FIG. 1 use SGA-G for non-stationary signals like LIM for LMS algorithm.
It is easily understood that faster and more stable convergence can be achieved than AS.

FIG. 4 shows an embodiment of the first invention. In the figure, the function blocks given the same reference numbers as those in FIG. 1 have the same functions as those in FIG. 4 is different from FIG. 1 in that the output of the delay element 10 is also fed back to the limiter 9 and the configuration of the limiter 9. FIG.
FIG. 5 is a detailed block diagram showing an example of the limiter 9 in FIG.
Shown in The input terminal 23 is supplied with αk from the step size controller 6, and the input terminal 24 is connected to the output terminal 20 via the delay element 10.
The size α _k-1 bar is returned. The feedback signal supplied to the input terminal 24 is transmitted to multipliers 25 and 26. α
_{The k-1} bar is multiplied by positive constants η and θ by multipliers 25 and 26, respectively. The obtained outputs ηα _k-1 bar and θα _k-1 bar are supplied to the maximum value circuit 27 and the minimum value circuit 28, respectively. The minimum value circuit 28 receives the signal from the step size controller 6 of FIG.
The step size αk is supplied. Another input terminal of the minimum value circuit 28 has a threshold value of the maximum value Th _H.
Is supplied. These three inputs, αk, Th
_H , θα _k−1 bar are compared, and the minimum value among them is transmitted to the maximum value circuit 27 as the output of the minimum value circuit 28.
The other input terminal of the maximum value circuit 27 is supplied with the minimum threshold value Th _H and the output ηα _k−1 bar of the multiplier 25, and the maximum value of these is supplied to the output terminal 20. Is done. That is, the step size αk supplied to the input terminal 23 has the minimum value ThH and ηα _k−1 bar and the maximum value Tk.
The maximum value and the minimum value are limited by h _H and θα _k−1 bar, and the result is output as the following limited step size α _k bar.

(Equation 7) Here, max {A, B} and min {A, B} represent the maximum and minimum values of A and B, respectively. Therefore, the coefficient update equation in filter 3 is

(Equation 8) Becomes

The amplitude distributions of sk and vk-uk are generally independent. Therefore,

(Equation 9) Holds, and by using α _k bar instead of α _k ,
Even if sk interferes with vk-uk, sk (Z)
The instantaneous effect on vk-uk can be suppressed by the limiter 9, and a stable step size can be obtained. FIG.
Uses a minimum and maximum limit to stabilize the step size, but only the maximum or minimum value is valid. Further, the limit value when the step size increases and the limit value when the step size decreases can be set to be equal. FIG. 6 shows an embodiment of the limiter 9 in the case where the step size increase and decrease are limited by the same limit value.

In FIG. 6, the feedback signal from the delay element 10 supplied to the input terminal 24 is multiplied by η in the multiplier 25 and then transmitted to the maximum value circuit 27 and the minimum value circuit 28 as ηα _k−1 bar. You. _{Hereinafter, min {Th H, θα k} -1 bar} except for limiting the maximum value of the step size using the _{min {Th H, ηα k-} 1 bar} instead of, exactly the embodiment of FIG. 5 Do the same thing.

FIG. 7 shows an embodiment of the limiter 9 according to the ninth and twenty-first inventions. The difference from the block diagram shown in FIG. 5 is that the feedback signal supplied to the input terminal 24 is
This is a point that is squared by 0 and then transmitted to multipliers 25 and 26. Considering that the normal step size is 1 or less, the limit value max at the time and decreasing increment step size _{{Th H, ηα k-1} 2 bars}, min {Th _H, θα
_k−1 ² bar 比例 is proportional to the square of the restricted step size α _k−1 bar one sample period before, and the smaller the restricted step size, the stronger the restriction. Therefore, when the influence of sk is large, that is, when the step size is small, a more stable step size can be obtained.

FIG. 8 shows an embodiment of the limiter 9 according to the tenth and twenty-second aspects of the present invention. The difference from the block diagram shown in FIG. 7 is that the limit value when the step size is increased and the limit value when the step size is decreased are set to be the same as in FIG. The feedback signal from the delay element 10 supplied to the input terminal 24 is transmitted to the multipliers 200 and 201. The feedback signal is a multiplier 20
After multiplying η by 1 to obtain ηα _k-1 bar, the multiplier 200
In the ηα _k-1 ² bars it is further multiplied by the feedback signal. η
alpha _k-1 ² bar is transmitted to the maximum value circuit 27 and minimum value circuit 28, it is commonly used as a limit value at the time of decreasing the limit value during increase step size.

As described with reference to FIG.
If the maximum value and the minimum value of the size are limited by using the values of the past step sizes, the characteristics of the unknown system to be identified suddenly change, causing a problem when the error signal suddenly increases. In such a case, the adaptive filter must follow the change in the unknown system characteristic by rapidly increasing the step size. However, if the value of the step size is limited by its past value, it can only change slowly, and the characteristic of following the system fluctuation deteriorates. Therefore, in the third , fourth, twelfth, and thirteenth inventions, a sudden change in the characteristic of an unknown system to be identified is detected by an error fluctuation detection circuit, and the step size is reset or the restriction on the step size is removed. .

FIG. 9 shows one embodiment of the third and twelfth aspects of the present invention. In the embodiment shown in FIG. Is different from that of the first embodiment in that it is replaced with a predetermined step size α0 and then transmitted to the multiplier 13 only when the variation of the above is detected. The replacement of the step size is realized by controlling the selector 12 with the output of the error fluctuation detecting circuit, selecting α0 and transmitting it to the multiplier 13.

FIG. 10 shows an embodiment of the fifth and fifteenth aspects of the present invention, in which the error signal is varied by monitoring the square value of the difference signal dk. FIG. 10 shows an embodiment of an error fluctuation detection circuit. An error signal is supplied to an input terminal 50, which is squared by a multiplier 51 and then transmitted to a selector 52 and a comparison circuit 57. 0 is supplied to another input of the selector 52, one of which is selected by the output of the counter 53, and supplied to the maximum value circuit 54. The output of the maximum value circuit 54 is fed back to another input of the maximum value circuit 54 via the delay element 55. The counter 53 keeps counting up to a predetermined integer Nc, and supplies a control signal to the selector 52 so that the selector 52 selects the signal supplied from the multiplier 51. Accordingly, the feedback circuit closed by the delay element 55 from the multiplier 51 through the selector 52 and the maximum value circuit 54 detects and stores the maximum value of the first to Nc-th samples. When the Ncth and subsequent samples are input, the selector 52 selects 0 and transmits it to the maximum value circuit 54. Therefore, the output of the maximum value circuit 54 is a signal supplied from the delay element 55, that is, from the first to the Ncth. , And this signal is transmitted to the multiplier 56. In the multiplier 56, the maximum value circuit 5
The maximum value supplied from 4 is multiplied by a constant eth and transmitted to the comparator 57. On the other hand, the square value of the error signal, which is the output of the multiplier 51, is supplied to the other input terminal of the comparator 57. The comparison circuit 57 outputs 1 when the square value of the error signal is large, and outputs 0 otherwise.
Communicate to

The signal supplied to the output terminal 58 is supplied to the selector 12 in FIG. The limited step size from the limiter 9 is also supplied to the selector 12. The selector 12 selects and outputs the signal from the limiter 9 when 0 is supplied as the control signal and α ₀ when 1 is supplied as the control signal. Therefore, when a change is detected in the error signal, the fixed step size α ₀ is supplied to the multiplier 13, and otherwise, the limited step size α _k obtained by the limiter 9 is supplied to the multiplier 13.

FIG. 11 shows an embodiment of the sixth and sixteenth aspects of the present invention, in which the error signal is varied by monitoring the absolute value of the difference signal dk. An error signal is supplied to the input terminal 50. The error signal is transmitted to the selector 52 and the comparison circuit 57 after the absolute value is calculated by the absolute value circuit 59. The subsequent operation is exactly the same as that of the embodiment shown in FIG.

FIG. 12 shows an embodiment of the fourth and thirteenth aspects of the present invention. In the embodiment shown in FIG. Is different from the moment when the fluctuation is detected and replaced by a step size .alpha.k which has no limit for a fixed time and then transmitted to the multiplier 13. Substitution step size controls the selector 12 at the output of the error variation detection circuit, to transmit selects the output αk output alpha _k bar directly instead of the step size controller 6 of the limiter 9 to the multiplier 13 Is realized. The time for replacement with the unlimited step size is determined by the holding circuit 1 receiving the output of the error fluctuation detection circuit 11.
03 parameters. The error fluctuation detection circuit can have the configuration shown in FIG. 10 or FIG.

FIG. 13 shows an embodiment of the holding circuit 103 of FIG. A signal from the error fluctuation detection circuit 11 is supplied to an input terminal 111, and the selector 112 and the counter 113
Is transmitted to The output of selector 112 is output terminal 11
5 and at the same time, is fed back to the selector 112 via the delay element 114. The counter 113 resets the count when 1 is supplied to the input terminal 111. Normally, the count is changed from 0 to K so that the selector 112 selects the signal supplied from the input terminal 111.
When the value takes a value between _th, the selector 112 sets the delay element 11
4 is controlled so that the feedback signal is selected and transmitted to the output terminal 115. Therefore, after the error fluctuation is detected by the error fluctuation detecting circuit 11 once, during the period of K _th +1 sample,
The output terminal 115 is supplied with 1 and the selector 12 selects an unlimited step size and supplies it to the multiplier 13.

[0057]

As described above in detail, according to the present invention, when calculating the step size used for updating the coefficient by using the slope of the error signal power, the step size is standardized by the filter input power. By doing so, stable and high-speed convergence is realized for non-stationary signals. In addition, the obtained step size change amount is restricted depending on the past step size, thereby preventing the step size from remarkably deviating from a correct value due to interference of noise or the like, and at the same time, identifying the identification error signal. The power is monitored to detect sudden changes in the characteristics of the unknown system to be identified.
By resetting the size or excluding the limitation of the step size for a certain period of time, it is possible to provide a method and apparatus for identifying an unknown system using an adaptive filter that achieves both high-speed convergence and low identification error.

[Brief description of the drawings]

FIG. 1 is a block diagram showing an embodiment of the present invention.

FIG. 2 is a block diagram illustrating an embodiment of a correlation calculation circuit.

FIG. 3 is a block diagram illustrating one embodiment of a step size controller.

FIG. 4 is a block diagram showing an embodiment of the first and eleventh inventions.

FIG. 5 is a block diagram showing an embodiment of a limiter according to the seventeenth invention.

FIG. 6 is a block diagram showing an embodiment of a limiter according to the eighteenth invention.

FIG. 7 is a block diagram showing another embodiment of the limiter according to the seventeenth invention.

FIG. 8 is a block diagram showing another embodiment of the limiter according to the eighteenth invention.

FIG. 9 is a block diagram showing an embodiment of the second and twelfth inventions.

FIG. 10 is a block diagram showing an embodiment of an error fluctuation detection circuit according to the fifteenth invention.

FIG. 11 is a block diagram showing an embodiment of an error fluctuation detection circuit according to the sixteenth invention.

FIG. 12 is a block diagram showing an embodiment of the third and thirteenth inventions.

FIG. 13 is a block diagram showing an embodiment of a holding circuit according to the third and thirteenth inventions.

FIG. 14 is a block diagram showing a conventional example.

FIG. 15 is a block diagram showing another conventional example.

FIG. 16 is a block diagram showing an embodiment of a correlation calculation circuit in a conventional example.

FIG. 17 is a block diagram showing an embodiment of a step size controller in a conventional example.

FIG. 18 is a block diagram showing an embodiment of a limiter in a conventional example.

FIG. 19 is a block diagram showing an embodiment of a maximum value circuit and a minimum value circuit.

Continuation of the front page (56) References JP-A-2-63328 (JP, A) JP-A-63-279622 (JP, A) Takashi Tanihagi "Theory of Digital Signal Processing 3 Estimation and Adaptive Signal Processing" (Showa 61 −12− 10) Corona p. 84-86, p. 181-182 IEICE Autumn Meeting, 1991 [1] (1991), Hideyuki Furuhashi, Akihiko Sugiyama, "Noise-Resistant Gradient Adaptive Step Size Stochastic Gradient Algorithm" p. 74 IEEE Proc. ICASSSP '90, 1990 [3] (1990); J. Mathews et al. "Stochastic Gradient A Adaptive Filters with Gradient Adaptive Step Size", p. 1385 -1388 (58) Field surveyed (Int. Cl. ⁷ , DB name) H03H 21/00 H04B 3/00 JICST file (JOIS)

Claims (22)

(57) [Claims] An output from an unknown system is obtained by multiplying a plurality of input signal samples delayed by one sample period by a plurality of multiplicands corresponding thereto and outputting the output of an adaptive filter as a sum of the multiplication results. In order to reduce the difference signal subtracted from the signal, a value obtained by multiplying the difference signal and the input signal sample by a variable is normalized by a filter input power, and then added to the multiplicand as an update amount per time, and the value is added. When the unknown system is identified by updating the sum, a value proportional to the slope of the difference signal normalized by the filter input power with respect to the variable is added to the variable to obtain a sum, and then limited to the sum. Wherein the variable is changed using a restricted sum obtained by adding a restriction, and a threshold value for applying the restriction is obtained by using the past restricted sum. Method of identifying unknown systems using data. 2. The method for identifying an unknown system by an adaptive filter according to claim 1, wherein the threshold value is obtained by using a square value of the past limited sum. When wherein it detects that there is a change in the difference signal is replaced with a first predetermined constant sum with the restriction, and characterized by changing the variable by using the first constant The method for identifying an unknown system by using the adaptive filter according to claim 1. 4. When detecting that there is a change in the difference signal, the limited sum is replaced with the sum by the number of clocks equal to a predetermined second constant, and the variable is changed using the sum . The method for identifying an unknown system by using the adaptive filter according to claim 1. 5. A method for detecting a fluctuation of a difference signal, comprising calculating a square value of the difference signal, and determining a maximum value from all the square values until the number of clocks after the start of system identification reaches a predetermined third constant. 5. An unknown system identification by an adaptive filter according to claim 3, wherein a value is obtained, and a product obtained by multiplying the maximum value by a predetermined fourth constant is compared with the square value one by one. the method of. 6. The fluctuation detection of the difference signal calculates an absolute value of the difference signal and calculates a maximum value from all the absolute values until the number of clocks after the start of system identification reaches a predetermined third constant. The method for identifying an unknown system using an adaptive filter according to claim 3 or 4, wherein the absolute value is obtained by comparing the product obtained by multiplying the maximum value by a predetermined fourth constant and the absolute value. 7. The restricted sum is obtained by multiplying a value obtained by multiplying the past restricted sum or its squared value by a predetermined fifth constant, and a predetermined sixth constant and the sum. 7. The method for identifying an unknown system by using an adaptive filter according to claim 1, wherein the sum is limited and the restricted sum is taken as the minimum value. 8. The restricted sum is obtained by multiplying the past restricted sum or its squared value by a predetermined seventh constant, and a predetermined eighth constant and the sum. The method for identifying an unknown system by an adaptive filter according to claim 1, 2, 3, 4, 5, or 6, wherein a comparison is made and a maximum value is used as the restricted sum. 9. The restricted sum is obtained by comparing a value obtained by multiplying the past restricted sum or its squared value by the fifth constant with the sixth constant and the sum. And comparing a value obtained by multiplying a minimum value and the past restricted sum or its squared value by a seventh constant with an eighth constant, and using the maximum value as the restricted sum. A method for identifying an unknown system by using the adaptive filter according to claim 7 . 10. The restricted sum is obtained by comparing a value obtained by multiplying the past restricted sum or its squared value by the seventh constant with the sixth constant and the sum. And comparing a value obtained by multiplying a minimum value and the past restricted sum or its squared value by a seventh constant with an eighth constant, and using the maximum value as the restricted sum. A method for identifying an unknown system by using the adaptive filter according to claim 7 . 11. A subtracter for obtaining a difference signal by subtracting an output of the adaptive filter from an output signal of the unknown system when identifying a characteristic of the unknown system using the adaptive filter, and an input signal of the adaptive filter. A correlation calculating circuit that receives the power and calculates a correlation with the input signal; a first delay element that receives the power and delays it by one sample period; and a difference signal and a correlation value supplied from the correlation calculating circuit. Receiving the delay power as the output of the first delay element and the output of the second delay element,
A step size controller for sequentially calculating a step size used for updating a coefficient of the filter, a limiter for receiving and limiting the output of the step size controller, and delaying the output of the limiter by one sample period. A limiter, a second delay element that feeds back to the step size controller, a first multiplier that multiplies the output of the limiter by the difference signal, and an output of the first multiplier that is supplied from the correlation calculation circuit. At least a first normalization circuit for normalizing with an applied power, wherein an output of the first normalization circuit is used as a step size for updating the coefficient of the adaptive filter. Equipment for system identification. 12. A subtractor for obtaining a difference signal by subtracting an output of the adaptive filter from an output signal of the unknown system when identifying a characteristic of the unknown system by using the adaptive filter. An error variation detection circuit that detects a variation in the identification error of the adaptive filter included in the signal, a correlation calculation circuit that receives an input signal of the adaptive filter and calculates a power and a correlation of the input signal; A first delay element for receiving and delaying one sample period, the difference signal, a correlation value supplied from the correlation calculation circuit, a delay power output from the first delay element, and a second delay element output. A step size controller for sequentially calculating a step size used for updating coefficients of the adaptive filter,
A limiter that receives and limits the output of the step size controller, a second delay element that delays the output of the limiter by one sample period and feeds back to the limiter and the step size controller, A selector for selecting and outputting an output and the first constant according to the output of the error variation detection circuit, a first multiplier for multiplying an output signal of the selector by the difference signal,
At least a first normalization circuit for normalizing the multiplier output with the power supplied from the correlation calculation circuit,
An apparatus for identifying an unknown system by an adaptive filter, wherein an output of the first normalization circuit is used as a step size for updating a coefficient of the adaptive filter. 13. A subtractor for obtaining a difference signal by subtracting an output of the adaptive filter from an output signal of the unknown system when identifying a characteristic of the unknown system using the adaptive filter. An error fluctuation detection circuit that detects fluctuations in the identification error of the adaptive filter included in the signal, a holding circuit that holds the output of the error fluctuation detection circuit for a certain period of time, and receives the input signal of the adaptive filter and receives the input signal. A correlation calculation circuit for calculating a power and a correlation of a signal, a first delay element for receiving the power and delaying by one sample period, a correlation value supplied from the difference signal and the correlation calculation circuit, and the first delay Receiving the delayed power output from the element and the second delay element output, and using the delayed power for updating the coefficient of the adaptive filter;
A step size controller for sequentially calculating the size, a limiter for receiving and limiting the output of the step size controller, and delaying the output of the limiter by one sample period to the limiter and the step size controller. A second delay element that feeds back, a selector that selects and outputs the output of the limiter and the output of the step size controller according to the output of the holding circuit, and multiplies an output signal of the selector by the difference signal. And a first normalization circuit for normalizing an output of the first multiplier with the power supplied from the correlation calculation circuit, and an output of the first normalization circuit. Is used as a step size for updating the coefficients of the adaptive filter. Location. 14. The step size controller comprises:
A third delay element that receives the difference signal and delays it by one sample period, a second multiplier that multiplies the output of the third delay element by the difference signal, a correlation value that is an output of a correlation calculation circuit, and the second delay element. A third multiplier that multiplies the output of the second multiplier, a fourth multiplier that multiplies the third multiplier output by a constant, and a filter that outputs the fourth multiplier output to the correlation calculation circuit. 13. The system according to claim 11, further comprising a second normalization circuit for normalizing the input power, and an adder for adding the output of the second normalization circuit and the output of the second delay element. Or 1
3. An apparatus for identifying an unknown system using the adaptive filter according to 3. 15. An error variation detection circuit comprising: a fifth multiplier for receiving a difference signal and squaring the difference signal; and a first multiplier for selecting one of the fifth multiplier based on an output of the fifth multiplier and 0 and a counter output. A selector, a first maximum value circuit that receives the first selector output and the fourth delay element output and outputs a maximum value, and a second multiplication unit that multiplies an output of the first maximum value circuit by a fourth constant. And a comparison circuit that compares the output of the sixth multiplier with the output of the fifth multiplier and outputs information of which is larger, and the fourth delay element is configured by the fourth delay element. 2. The method according to claim 1, wherein an output of said maximum value circuit is delayed by one sample period and then fed back to said first maximum value circuit.
14. An apparatus for identifying an unknown system using the adaptive filter according to 2 or 13. 16. An error fluctuation detection circuit, comprising: an absolute value circuit for obtaining an absolute value of a difference signal; a third selector which receives an output of the absolute value circuit and receives 0 and selects one of the outputs according to a counter output; A first maximum value circuit that receives the selector output of No. 3 and the output of the fourth delay element and outputs a maximum value, a sixth multiplier that multiplies the output of the first maximum value circuit by a fourth constant, A comparison circuit that compares the output of the sixth multiplier with the output of the fifth multiplier and outputs information indicating which is larger, and the fourth delay element includes the first maximum value circuit. After receiving the output of the first and delaying by one sample period,
14. The apparatus for identifying an unknown system using an adaptive filter according to claim 12, wherein the feedback is performed to a maximum value circuit. 17. An eighth multiplier for multiplying a feedback signal by a fifth constant, and a second detector for detecting a minimum value by receiving the output of the eighth multiplier, the input signal, and the sixth constant. , A ninth multiplier for multiplying the feedback signal by a seventh constant, and a maximum value receiving the ninth multiplier output, the second minimum value circuit output, and the eighth constant. And a third maximum value circuit for outputting the second maximum value.
Or an apparatus for identifying an unknown system using the adaptive filter according to 13. 18. A limiter for multiplying a feedback signal by a fifth constant, a second multiplier for receiving a seventh multiplier output, an input signal, and a sixth constant to detect a minimum value. And a third maximum value circuit that outputs the maximum value in response to the output of the seventh multiplier, the output of the second minimum value circuit, and the eighth constant. Claim 1
An apparatus for identifying an unknown system using the adaptive filter according to 1, 12, or 13. 19. A tenth multiplier for receiving the feedback signal and squaring the same, an eighth multiplier for multiplying the output of the tenth multiplier by a fifth constant, and an eighth multiplier. 12. A second minimum value circuit for detecting a minimum value by receiving an output of the filter, an input signal, and a sixth constant, and further comprising a second minimum value circuit.
14. An apparatus for identifying an unknown system using the adaptive filter according to 12 or 13. 20. A tenth multiplier for receiving the feedback signal and squaring the same, a ninth multiplier for multiplying the output of the tenth multiplier by a seventh constant, and a ninth multiplier. 12. A third maximum value circuit for receiving a device output, an input signal and an eighth constant and outputting a maximum value.
14. An apparatus for identifying an unknown system using the adaptive filter according to 12 or 13. 21. A tenth multiplier for receiving the feedback signal and squaring the same, an eighth multiplier for multiplying the output of the tenth multiplier by a fifth constant, and an eighth multiplier. A second minimum circuit for detecting the minimum value by receiving the output of the multiplier, the input signal, and the sixth constant, a ninth multiplier for multiplying the output of the tenth multiplier by a seventh constant, 14. The unknown by the adaptive filter according to claim 11, 12 or 13, comprising a third maximum value circuit which outputs the maximum value in response to the multiplier output of No. 9, the input signal and the eighth constant. Equipment for system identification. 22. A limiter comprising: an eleventh multiplier for receiving a feedback signal and multiplying the fifth constant by a fifth constant; a tenth multiplier for multiplying the output of the eleventh multiplier by the feedback signal; 1
A third minimum value circuit that receives the multiplier output of 0, the input signal, and the sixth constant to detect a minimum value, and sets a maximum value by receiving the output of the tenth multiplier, the input signal, and the eighth constant. 14. The apparatus for identifying an unknown system by an adaptive filter according to claim 11, further comprising a second maximum value circuit for outputting.