JP2973656B2

JP2973656B2 - Method and apparatus for identifying unknown system using adaptive filter

Info

Publication number: JP2973656B2
Application number: JP3308687A
Authority: JP
Inventors: 昭彦杉山
Original assignee: NEC Corp
Current assignee: NEC Corp
Priority date: 1991-07-30
Filing date: 1991-11-25
Publication date: 1999-11-08
Anticipated expiration: 2014-11-08
Also published as: JPH05304444A

Description

DETAILED DESCRIPTION OF THE INVENTION

【０００１】[0001]

【産業上の利用分野】本発明は、適応フィルタ（アダプ
ティブ・フィルタ）を用いて未知システムを同定する方
法及び装置に関する。このようなアダプティブ・フィル
タは、２線／４線変換部で生じるエコーを除去するため
のエコー・キャンセラ、伝送路上で受ける符号間干渉を
除去するための等化器、音響入力用のマイクロホンに漏
れ込むノイズを除去するためのノイズ・キャンセラ、ス
ピーカからマイクロホンに至る音響結合によって生じる
ハウリングを除去するためのハウリング・キャンセラ等
に応用されている。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method and an apparatus for identifying an unknown system using an adaptive filter (adaptive filter). Such an adaptive filter leaks to an echo canceller for removing an echo generated in a 2-wire / 4-wire conversion unit, an equalizer for removing intersymbol interference received on a transmission path, and a microphone for acoustic input. It is applied to a noise canceller for removing noise to be included, a howling canceller for removing howling caused by acoustic coupling from a speaker to a microphone, and the like.

【０００２】[0002]

【従来の技術】通常アダプティブ・フィルタによる未知
システムの同定は、同定しようとする未知系とアダプテ
ィブ・フィルタに同一の信号を入力し、未知系出力から
アダプティブ・フィルタ出力を差し引いて得られる同定
誤差（以下、これを誤差信号と呼ぶ）を用いてアダプテ
ィブ・フィルタの係数を更新することによって行われ
る。このようなアダプティブ・フィルタによる未知シス
テムの同定の応用として、エコー・キャンセラ，等化
器，ノイズ・キャンセラ，ハウリング・キャンセラなど
が知られている（アダプティブ・シグナル・プロセシン
グ（ＡＤＡＰＴＩＶＥＳＩＧＮＡＬＰＲＯＣＥＳＳＩ
ＮＧ），プレンティス・ホール社（ＰＲＥＮＴＩＣＥ−
ＨＡＬＬ），１９８５年；以下、「文献１」）。これら
の応用におけるアダプティブ・フィルタの基本動作はほ
とんど同じなので、ここではノイズ・キャンセラを例に
取って説明する。2. Description of the Related Art Usually, the identification of an unknown system by an adaptive filter is performed by inputting the same signal to the unknown system to be identified and the adaptive filter, and subtracting the output of the adaptive filter from the output of the unknown system. This is hereinafter referred to as an error signal) to update the coefficients of the adaptive filter. An echo canceller, an equalizer, a noise canceller, a howling canceller, and the like are known as applications of identification of an unknown system using such an adaptive filter (adaptive signal processing (ADAPTIVESIGNAL PROCESSSI).
NG), Prentice Hall (PRENTICE-
HALL), 1985; hereinafter, "Document 1"). Since the basic operation of the adaptive filter in these applications is almost the same, a noise canceller will be described here as an example.

【０００３】ノイズ・キャンセラはノイズ源から主入力
端子までノイズが通る経路のインパルス応答を近似する
伝送関数を持つ適応（アダプティブ）・フィルタを用い
て、主入力端子に混入するノイズ成分に対応した擬似ノ
イズ（ノイズ・レプリカ）を生成することにより、主入
力端子に混入して信号に妨害を与えるノイズを抑圧する
ように動作する。この時、アダプティブ・フィルタの各
タップ係数は、ノイズと信号が混在した混在信号からノ
イズ・レプリカを差し引いた差信号と、参照入力端子に
て得られる参照ノイズとの相関をとることにより逐次修
正される。このようなアダプティブ・フィルタの係数修
正すなわちノイズ・キャンセラの収束アルゴリズムの代
表的なものとしてＬＭＳアルゴリズム（ＬＭＳＡＬＧ
ＯＲＩＴＨＭ）（文献１）とラーニング・アイデンティ
フィケーション・メソッド（ＬＥＡＲＮＩＮＧＩＤＥ
ＮＴＩＦＩＣＡＴＩＯＮＭＥＴＨＯＤ；ＬＩＭ）（ア
イイーイーイー・トランザクションズ・オン・オートマ
ティック・コントロール（ＩＥＥＥＴＲＡＮＳＡＣＴ
ＩＯＮＳＯＮＡＵＴＯＭＡＴＩＣＣＯＮＴＲＯ
Ｌ）１２巻３号，１９６７年，２８２−２８７ページ参
照；以下、「文献２」）が知られている。A noise canceller uses an adaptive (adaptive) filter having a transfer function that approximates an impulse response of a path through which noise passes from a noise source to a main input terminal, and uses a pseudo filter corresponding to a noise component mixed into the main input terminal. By generating noise (noise replica), it operates so as to suppress noise that enters the main input terminal and interferes with the signal. At this time, each tap coefficient of the adaptive filter is successively corrected by correlating the difference signal obtained by subtracting the noise replica from the mixed signal in which the noise and the signal are mixed, and the reference noise obtained at the reference input terminal. You. As a representative example of such adaptive filter coefficient correction, that is, a convergence algorithm of the noise canceller, an LMS algorithm (LMS ALG) is used.
ORITHM) (Reference 1) and Learning Identification Method (LEARNING IDE)
NTIFICATION METHOD; LIM) (IEEE Transactions on Automatic Control (IEEE TRANSACT)
IONS ON AUTOMATIC CONTROL
L) Vol. 12, No. 3, 1967, pp. 282-287; hereinafter, "Document 2") is known.

【０００４】図１は、従来のノイズ・キャンセラの一構
成例を示したブロック図である。主入力端子１において
検出された信号とノイズとの混在信号は、減算器４に供
給される。一方、参照入力端子２において検出された参
照ノイズはアダプティブ・フィルタ３に供給される。ア
ダプティブ・フィルタ３によって発生されたノイズ・レ
プリカが、減算器４にて混在信号から減算されることに
よってノイズ成分が消去され、信号が出力端子６へ供給
される。減算器４の出力は同時に乗算器５へ供給されて
２α倍され、アダプティブ・フィルタ３の係数更新に使
用される。ここにαは定数で、ステップ・サイズと呼ば
れる。いま、信号をｓ_k（但し、ｋは時刻を示す指
標）、参照ノイズをｎ_k、消去しようとするノイズをｖ
_k、信号ｓ_kが受ける付加ノイズをδ_kとすると、入力
端子１より減算器４に供給される信号ｗ_kは次式で表さ
れる。FIG. 1 is a block diagram showing an example of the configuration of a conventional noise canceller. The mixed signal of the signal and the noise detected at the main input terminal 1 is supplied to a subtractor 4. On the other hand, the reference noise detected at the reference input terminal 2 is supplied to the adaptive filter 3. The noise replica generated by the adaptive filter 3 is subtracted from the mixed signal by the subtractor 4 to eliminate noise components, and the signal is supplied to the output terminal 6. The output of the subtracter 4 is simultaneously supplied to the multiplier 5 and multiplied by 2α, and used for updating the coefficient of the adaptive filter 3. Where α is a constant and is called the step size. Now, let the signal be s _k (where k is an index indicating the time), the reference noise be _nk , and the noise to be deleted be v
_k, When _k additional noise δ of signal s _k receives signal w _k to be supplied to the subtractor 4 from the input terminal 1 is expressed by the following equation.

【０００５】[0005]

【数１】 (Equation 1)

【０００６】ノイズ・キャンセラの目的は、数１におけ
るノイズ成分ｖ_kのレプリカｕ_kを生成し、ノイズを消
去することである。図１において、アダプティブ・フィ
ルタ３、減算器４，乗算器５からなる閉ループ回路を用
いて、適応的にノイズ・レプリカｕ_kを生成することに
より、減算器４の出力信号として次式に示す差信号ｄ_k
を得ることができる。The purpose of the noise canceller is to generate a replica u _k of the noise component v _k in equation (1) and eliminate the noise. In Figure 1, the adaptive filter 3, a subtracter 4, using a closed loop circuit consisting of the multiplier 5 by generating an adaptive noise replica u _k, a difference in the following equation as an output signal of the subtracter 4 Signal d _k
Can be obtained.

【０００７】[0007]

【数２】 (Equation 2)

【０００８】但し、一般にδ_kはｓ_kに比較して十分小
さいと考えられるから、これを無視している。数２にお
いて、（ｖ_k−ｕ_k）は残留ノイズと呼ばれ、システム
同定問題として考えれば、誤差信号に等しい。ＬＭＳは
アルゴリズムを仮定すれば、アダプティブ・フィルタ３
のｍ番目の係数ｃ_m,kは次式に従って更新される。[0008] However, since the general δ _k is considered to be sufficiently small compared to s _k, are ignoring this. In Equation 2, (v _k -u _k ) is called residual noise, and is equal to an error signal when considered as a system identification problem. Assuming the algorithm, the LMS has an adaptive filter 3
The m-th coefficient c _{m, k} are updated in accordance with the following equation.

【０００９】[0009]

【数３】 (Equation 3)

【００１０】Ｎ個の係数全てに関する数３を行列形式で
表せば、[0010] By expressing the equation 3 for all N coefficients in a matrix form,

【００１１】[0011]

【数４】 (Equation 4)

【００１２】となる。ここに、ｃ_kとｎ_kはそれぞれ次
式で与えられる。## EQU1 ## Here, _ck and _nk are respectively given by the following equations.

【００１３】[0013]

【数５】 (Equation 5)

【００１４】[0014]

【数６】 (Equation 6)

【００１５】但し、［・］^Tは行列の転置を表す。一
方、ＬＩＭでは数４の代りに、数７に従って係数の更新
が行われる。Here, [·] ^T represents transposition of a matrix. On the other hand, in the LIM, the coefficient is updated according to Equation 7 instead of Equation 4.

【００１６】[0016]

【数７】 (Equation 7)

【００１７】μは、ＬＩＭに対するステップ・サイズ、
σ_n ²はアダプティブ・フィルタ３に入力される平均電力
である。σ_n ²はステップ・サイズμの値を前記平均電力
に反比例させ、安定な収束を行わせるために用いられ
る。σ_n ²を求めるためにはいくつかの方法があるが、例
えば数８によって求めることができる。Μ is the step size for the LIM,
σ _n ² is the average power input to the adaptive filter 3. σ _n ² is used to make the value of the step size μ inversely proportional to the average power and perform stable convergence. There are several methods for obtaining σ _n ^2. For example, σ _n ² can be obtained by Expression 8.

【００１８】[0018]

【数８】 (Equation 8)

【００１９】数４と数７におけるステップ・サイズは、
アダプティブ・フィルタの収束の速度と収束後の残留ノ
イズ・レベルを規定する。ＬＭＳの場合には、αが大き
いほど収束は速くなるが、残留ノイズ・レベルは大きく
なる。反対に、十分小さい残留ノイズ・レベルを達成す
るためには、それに見合った小さいαを採用する必要が
あり、収束速度の低下を招く。ＬＩＭのステップ・サイ
ズμについても、同様である。The step sizes in Equations 4 and 7 are:
It defines the speed of convergence of the adaptive filter and the residual noise level after convergence. In the case of LMS, the larger α is, the faster the convergence, but the higher the residual noise level. Conversely, to achieve a sufficiently low residual noise level, a correspondingly small α must be employed, which leads to a reduction in convergence speed. The same applies to the step size μ of the LIM.

【００２０】収束速度と残留ノイズのステップ・サイズ
に対する相反する要求を満たすために、ステップ・サイ
ズを可変にするアルゴリズムが提案されている（プロシ
ーディングス・オブ・インターナショナル・カンファレ
ンス・オン・アクースティクス・スピーチ・アンド・シ
グナル・プロセシング（ＰＲＯＣＥＥＤＩＮＧＳＯＦ
ＩＮＴＥＲＮＡＴＩＯＮＡＬＣＯＮＦＥＲＥＮＣＥ
ＯＮＡＣＯＵＳＴＩＣＳ，ＳＰＥＥＣＨＡＮＤ
ＳＩＧＮＡＬＰＲＯＣＥＳＳＩＮＧ）１９９０年，１
３８５−１３８８ページ参照；以下、「文献３」）。以
下、このアルゴリズムをＳＧＡ−ＧＡＳ（Ｓｔｏｃｈａ
ｓｔｉｃＧｒａｄｉｅｎｔＡｄａｐｔｉｖｅＦｉ
ｌｔｅｒｓｗｉｔｈＧｒａｄｉｅｎｔＡｄａｐｔ
ｉｖｅＳｔｅｐＳｉｚｅ）と呼ぶ。To meet the contradictory requirements on the convergence speed and the step size of the residual noise, an algorithm for varying the step size has been proposed (Proceedings of International Conference on Axistics Speech).・ And signal processing (PROCEEDINGS OF
INTERNATIONAL CONFERENCE
ON ACOUSTICS, SPEECH AND
SIGNAL PROCESSING) 1990, 1
Pp. 385-1388; hereinafter, “Document 3”). Hereinafter, this algorithm is referred to as SGA-GAS (Stocha
stick Gradient Adaptive Fi
liters with Gradient Adapt
liveStep Size).

【００２１】ＳＧＡ−ＧＡＳは、数４のＬＭＳアルゴリ
ズムのステップ・サイズαの代りに、α_Kを用いる。α
_Kは差信号ｄ_kの電力ｄ_k ²の負の傾きに比例した値とし
て、数９で定義される。In the SGA-GAS, α _K is used instead of the step size α of the LMS algorithm of Equation 4. α
_K is defined by Expression 9 as a value proportional to the negative slope of the power d _k ² of the difference signal d _k .

【００２２】[0022]

【数９】 (Equation 9)

【００２３】ρは正の定数で通常は非常に小さな数が用
いられる。数９は、ノイズｎ_kを用いると、Ρ is a positive constant and usually a very small number is used. Equation 9 is _obtained by using noise _nk .

【００２４】[0024]

【数１０】 (Equation 10)

【００２５】と表すことができる。さらに、α_kは以下
の条件を満たさなければならない。Can be expressed as follows. In addition, α _k must satisfy the following condition.

【００２６】[0026]

【数１１】 [Equation 11]

【００２７】ここに、｛・｝^Tは行列の転置、ｔｒ
｛・｝はトレース、Ｒはｎ_kの自己相関行列を表す。Where ｛·｝ ^T is the transpose of the matrix, tr
｛·｝ Represents a trace, and R represents an _nk autocorrelation matrix.

【００２８】図２はＳＧＡ−ＧＡＳのブロック図であ
る。図１との違いは、固定されていたステップ・サイズ
２αがステップ・サイズ・コントローラ８で計算され、
リミッタ７で制限された後に与えられることである。ス
テップ・サイズ・コントローラ８は図３に示すブロック
図で表すことができ、数１０を計算する。FIG. 2 is a block diagram of the SGA-GAS. The difference from FIG. 1 is that the fixed step size 2α is calculated by the step size controller 8,
This is given after being limited by the limiter 7. The step size controller 8 can be represented by the block diagram shown in FIG.

【００２９】入力端子９０には図２の差信号ｄ_kが、入
力端子９３にはｎ_kが供給されている。出力端子１００
にて得られる信号は図２のリミッタ７へ供給される。入
力端子９０に供給されたｄ_kは遅延素子９１で１サンプ
ル周期遅延されてｄ_k-1となり、乗算器９２に供給され
る。乗算器９２にはｄ_kも供給されており、乗算器９２
の出力であるｄ_kｄ_k-1は乗算器９６へ伝達される。The input terminal 90 is supplied with the difference signal d _k of FIG. 2, and the input terminal 93 is supplied with n _k . Output terminal 100
Are supplied to the limiter 7 in FIG. The d _k supplied to the input terminal 90 is delayed by one sample period by the delay element 91 to become d _k−1 and supplied to the multiplier 92. The multiplier 92 is also supplied with d _k ,
D _k d _{_k-1} is output is transmitted to the multiplier 96.

【００３０】一方、入力端子９３に供給されたｎ_Kは相
関計算回路９４に伝達される。相関計算回路９４では、
次式で定義される相関Ｃ_kが計算されて乗算器９６へ伝
達される。On the other hand, n _K supplied to the input terminal 93 is transmitted to the correlation calculation circuit 94. In the correlation calculation circuit 94,
The correlation C _k defined by the following equation is calculated and transmitted to the multiplier 96.

【００３１】[0031]

【数１２】 (Equation 12)

【００３２】Ｃ_k＝ｎ_k-1 ^Tｎ_kは乗算器９６でｄ_kｄ
_k-1と乗算され、さらに乗算器９７でρ倍された後、ρ
ｄ_kｄ_k-1ｎ_k-1 ^Tｎ_kとして加算器９８に伝達される。
加算器９８では乗算器９７からの信号と遅延素子９９の
出力である１サンプル周期前の信号が加算されて、出力
端子１００へ伝達される。従って、出力端子１００へ伝
達される信号α_kは、α_k-1＋ρｄ_kｄ_k-1ｎ_k-1 ^Tｎ_k
となり、数１０に一致する。C _k = n _{k -1} ^T _nk is calculated by the multiplier 96 as d _k d
multiplied by _k−1 and further multiplied by ρ by the multiplier 97,
It is transmitted to the adder 98 as _{_{_{d k d k-1 n k}}} -1 T n k.
In the adder 98, the signal from the multiplier 97 and the signal one sample cycle before, which is the output of the delay element 99, are added and transmitted to the output terminal 100. Therefore, the signal α _k transmitted to the output terminal 100 is α _k−1 + ρd _k d _k−1 n _k−1 ^T n _k
Which is equal to the expression 10.

【００３３】図４は図３の相関計算回路９４の構成であ
る。図３において入力端子９３に供給される信号は、図
４において入力端子１２０に供給される信号に対応す
る。入力端子１２０に供給される信号サンプルをｎ_kと
すると、ｎ_kは遅延素子１２１₁，１２１₂，…，１２
１_N-1，１２１_Nからなるタップ付遅延線に供給され
る。遅延素子１２１₁，１２１₂，…，１２１_N-1，１
２１_Nの出力はそれぞれ乗算器１２２₁，１２２₂，
…，１２２_N-1，１２２_Nに、また入力ｎ_kと遅延素子
１２１₁，１２１₂，…，１２１_N-1の出力は乗算器１
２２₁，１２２₂，１２２₃，…，１２２_N-1，１２２
_Nに供給される。すなわち、乗算器１２２₁，１２
２₂，…，１２２_N-1，１２２_Nにはそれぞれ（ｎ_k，
ｎ_k-1），（ｎ_k-1，ｎ_k-2），（ｎ_k-2，ｎ_k-3），
…，（ｎ_k-N+2，ｎ_k-N+1），（ｎ_k-N+1，ｎ_k-N）が
入力されており、これらの乗算器の出力はｎ_kｎ_k-1，
ｎ_k-1ｎ_k-2，ｎ_k-2ｎ_k-3，…，ｎ_k-N+2ｎ_k-N+1，
ｎ_k-N+1ｎ_k-Nとなる。乗算器１２２₁，１２２₂，
…，１２２_N-1，１２２_Nの出力は全て多入力加算器１
２３に供給されており、多入力加算器１２３の出力FIG. 4 shows the configuration of the correlation calculation circuit 94 shown in FIG. The signal supplied to the input terminal 93 in FIG. 3 corresponds to the signal supplied to the input terminal 120 in FIG. When signal samples supplied to the input terminal 120 and n _k, n _k delay elements 121 _1, 121 _2, ..., 12
It is supplied to the tapped delay line consisting of _{1 _N-1,} 121 N. Delay elements 121 ₁ , 121 ₂ ,..., 121 _N−1 , 1
The outputs of 21 _N are multipliers 122 ₁ , 122 ₂ , respectively.
..., 122 _N-1, to 122 _N, also the input n _k and the delay element 121 _1, 121 _2, ..., 121 output _N-1 multiplier 1
_{_{_{22 1, 122 2, 122 3}}} , ..., 122 N-1, 122
Supplied to _N. That is, the multipliers 122 ₁ , 12 ₁
2 _2, ..., each of the _{_{122 N-1, 122 N (}} n k,
_nk-1 ), ( _nk-1 , _nk-2 ), ( _nk-2 , _nk-3 ),
_{..., (n kN + 2,} n kN + 1), (n kN + 1, n kN) is input, the output of these multipliers is n _{_k} n _{_k-1,}
_nk-1 _nk-2 , _nk-2 _nk-3 , ..., _{nk-N + 2} _{nk-N + 1} ,
_{nk-N + 1} _nkN . Multipliers 122 ₁ , 122 ₂ ,
, 122 _N−1 and 122 _N are all multi-input adders 1
And the output of the multi-input adder 123

【００３４】[0034]

【数１３】 (Equation 13)

【００３５】ｎ_kがＣ_kとして出力端子１２４へ伝達さ
れる。The n _k is transmitted to the output terminal 124 as C _k .

【００３６】図５は図２のリミッタの構成を表したもの
である。図５の最小値回路２２には図３のステップ・サ
イズ・コントローラ８から入力端子２３を経て、ステッ
プ・サイズα_kが供給される。最小値回路２２の他方の
入力端子には最大値のしきい値であるＴｈ_Hが供給され
ており、これらのうちの小さい方が最小値として最大値
回路２１に供給される。最大値回路２１の他方の入力端
子には最小値のしきい値であるＴｈ_Lが供給されてお
り、これらのうちの大きい方が最大値として出力端子２
０に供給される。すなわち、入力端子２３に供給された
ステップ・サイズα_kは、最小値Ｔｈ_L，最大値Ｔｈ_H
で最大値と最小値を制限されて、以下のα_k（バー）と
なって出力される。FIG. 5 shows the structure of the limiter of FIG. The step size α _k is supplied to the minimum value circuit 22 of FIG. 5 from the step size controller 8 of FIG. The other input terminal of the minimum value circuit 22 is supplied with the threshold value Th _H of the maximum value, and the smaller one of them is supplied to the maximum value circuit 21 as the minimum value. The other input terminal of the maximum value circuit 21 is supplied with the threshold value Th _L of the minimum value, and the larger one of them is used as the maximum value as the output terminal 2.
0 is supplied. That is, the step size α _k supplied to the input terminal 23 is the minimum value Th _L and the maximum value Th _H
The maximum value and the minimum value are limited by and are output as α _k (bar) below.

【００３７】[0037]

【数１４】 [Equation 14]

【００３８】Ｔｈ_L＝０，Ｔｈ_H＝２／（３・ｔｒ
｛Ｒ｝）とすれば、数１１を実行したことに等しい。Th _L = 0, Th _H = 2 / (3 · tr
{R}) is equivalent to executing Equation 11.

【００３９】図５の最大値回路及び最小値回路は、図６
に示す構成で実現できる。まず、最小値回路を例にとっ
て説明する。図５における最小値回路の２つの入力端子
は、図６の入力端子３３及び３４に相当する。入力端子
３３及び３４に供給された信号はセレクタ３１及び比較
器３２に同時に伝達されている。比較器３２では両者の
比較を行い、小さい方の信号がセレクタ３１で選択され
るような制御信号を発生する。この制御信号はセレクタ
３１に伝達され、セレクタ３１で選択された入力端子３
３もしくは３４からの信号は最小値として出力端子３０
へ伝達される。反対に、最大値回路の場合は、比較器３
２は供給された２入力のうち大きい方の値がセレクタ３
１で選択されるような制御信号を発生する。その他の動
作は最小値回路のときと全く等しい。The maximum value circuit and the minimum value circuit of FIG.
It can be realized by the configuration shown in FIG. First, the minimum value circuit will be described as an example. The two input terminals of the minimum value circuit in FIG. 5 correspond to the input terminals 33 and 34 in FIG. The signals supplied to the input terminals 33 and 34 are simultaneously transmitted to the selector 31 and the comparator 32. The comparator 32 compares the two, and generates a control signal such that the smaller signal is selected by the selector 31. This control signal is transmitted to the selector 31 and the input terminal 3 selected by the selector 31
The signal from 3 or 34 is set to the minimum value at the output terminal 30.
Is transmitted to Conversely, in the case of the maximum value circuit, the comparator 3
2 is the selector 3
1. Generate a control signal as selected in 1. Other operations are exactly the same as those of the minimum value circuit.

【００４０】[0040]

【発明が解決しようとする課題】ｄ_k＝ｖ_k−ｕ_kが成
立する理想的な場合には、差信号ｄ_kの電力ｄ_k ²の負の
傾きはシステム同定の誤差を表し、ステップ・サイズ制
御に用いることができるが、一般にノイズ・キャンセラ
ではｄ_k＝ｓ_k＋ｖ_k−ｕ_kで表されるようにｄ_kはｓ
_kの影響を受けるので、もはや正しいｄ_k ²の傾きを得る
ことはできず、ステップ・サイズも正しく制御されな
い。またノイズ・キャンセラ以外でｓ_kが零の場合に
も、数１におけるδ_kが無視できない場合には、In the ideal case where d _k = v _k -u _k holds, the negative slope of the power d _k ² of the difference signal d _k represents an error in system identification, and Although it can be used for size control, generally in a noise canceller, d _k is s as represented by d _k = s _k + v _k −u _k
_Because of the influence of _k , it is no longer possible to get the correct d _k ² slope and the step size is not properly controlled. Also when s _k is zero outside noise canceller, if [delta] _k in Equation 1 can not be ignored,

【００４１】[0041]

【数１５】 (Equation 15)

【００４２】となり、δ_kがｓ_kと同様に誤差信号ｖ_k
−ｕ_kに対する妨害となる。これらは共に、収束時間の
増加、或いは収束後の最終誤差レベルの増大を引き起こ
す。Where δ _k is the same as _sk and the error signal v _k
The disturbance to the -u _k. Both of these cause an increase in convergence time or an increase in the final error level after convergence.

【００４３】本発明の目的は、誤差信号ｖ_k−ｕ_kに対
する妨害信号に強く、短い収束時間と小さい収束後の最
終誤差信号レベルを達成することのできる適応フィルタ
による未知システム同定の方法及び装置を提供すること
にある。The object of the present invention, the error signal v _k -u strongly interfering signals for _k, short convergence time and little after convergence method and apparatus of the unknown system identification by the adaptive filter capable of achieving a final error signal level Is to provide.

【００４４】[0044]

【課題を解決するための手段】本発明の適応フィルタに
よる未知システムの同定方法は、１サンプル周期ずつ遅
延された複数の入力信号サンプルを、それぞれに対応し
た複数の被乗数と乗算を行い、その乗算結果の総和をも
って出力とするアダプティブ・フィルタの出力を未知シ
ステムの出力信号から差し引いた差信号を小さくするよ
うに、前記差信号と前記入力信号サンプルと予め定めら
れた第１の定数を乗算した値を１回当りの更新量として
前記被乗数に加算してその値を更新することにより前記
未知システムを近似する際に、前記差信号の前記第１の
定数に対する傾きに比例した値を前記第１の定数に加算
して和を求め、この和に制限を加えた制限付和を用いて
前記第１の定数を変化させ、前記制限を加えるためのし
きい値は過去の前記制限付和を用いて求めることを特徴
とする。According to the method of identifying an unknown system using an adaptive filter according to the present invention, a plurality of input signal samples delayed by one sample period are multiplied by a plurality of corresponding multiplicands, and the multiplication is performed. A value obtained by multiplying the difference signal by the input signal sample and a predetermined first constant so as to reduce a difference signal obtained by subtracting the output of the adaptive filter which is output as the sum of the results from the output signal of the unknown system. Is added to the multiplicand as an update amount per time, and the value is updated to approximate the unknown system. When approximating the unknown system, a value proportional to the slope of the difference signal with respect to the first constant is used as the first constant. The first constant is changed by using a restricted sum obtained by adding a limit to the sum to obtain a sum. And obtaining using restricted sum.

【００４５】また本発明の適応フィルタによる未知シス
テム同定の装置は、アダプティブ・フィルタを用いて未
知システムの特性を同定する際に、アダプティブ・フィ
ルタの出力を未知システムの出力信号から差し引いて差
信号を得る減算器と、前記差信号とアダプティブ・フィ
ルタの入力信号を受けて前記アダプティブ・フィルタの
係数更新に用いられるステップ・サイズを逐次計算する
ステップ・サイズ・コントローラと、このステップ・サ
イズ・コントローラの出力を受けて制限を加えるリミッ
タと、このリミッタの出力をリミッタに帰還するための
第１の遅延素子と、前記リミッタ出力と前記差信号を乗
算する第１の乗算器とを少なくとも具備し、前記第１の
乗算器の出力を前記アダプティブ・フィルタの係数更新
のステップ・サイズとして用いることを特徴とする。In the apparatus for identifying an unknown system using an adaptive filter according to the present invention, when identifying the characteristic of an unknown system using an adaptive filter, the output of the adaptive filter is subtracted from the output signal of the unknown system to obtain a difference signal. A subtractor, a step size controller for receiving the difference signal and the input signal of the adaptive filter, and sequentially calculating a step size used for updating coefficients of the adaptive filter, and an output of the step size controller And a first delay element for feeding back an output of the limiter to the limiter, and a first multiplier for multiplying the output of the limiter and the difference signal. The output of the multiplier 1 is used as a step size for updating the coefficient of the adaptive filter. Characterized by using as.

【００４６】また本発明の適応フィルタによる未知シス
テム同定の方法は、１サンプル周期ずつ遅延された複数
の入力信号サンプルを、それぞれに対応した複数の被乗
数と乗算を行い、その乗算結果の総和をもって出力とす
るアダプティブ・フィルタの出力を未知システムの出力
信号から差し引いた差信号を小さくするように、前記差
信号と前記入力信号サンプルと予め定められた第１の定
数を乗算した値を１回当りの更新量として前記被乗数に
加算してその値を更新することにより前記未知システム
を近似する際に、前記差信号の前記第１の定数に対する
傾きに比例した値を前記第１の定数に加算して和を求
め、この和に制限を加えた制限付和を用いて前記第１の
定数を変化させ、前記制限を加えるためのしきい値は過
去の前記制限付和の２乗値を用いて求めることを特徴と
する。In the method for identifying an unknown system using an adaptive filter according to the present invention, a plurality of input signal samples delayed by one sample period are multiplied by a plurality of multiplicands corresponding to the respective samples, and the sum is output as the sum of the multiplication results. In order to reduce the difference signal obtained by subtracting the output of the adaptive filter from the output signal of the unknown system, the value obtained by multiplying the difference signal, the input signal sample and a predetermined first constant is calculated per time. When approximating the unknown system by adding the update amount to the multiplicand and updating the value, a value proportional to the slope of the difference signal with respect to the first constant is added to the first constant. A first sum is obtained, the first constant is changed using a restricted sum obtained by adding a restriction to the sum, and a threshold value for applying the restriction is a threshold of the past restricted sum. And obtaining using a square value.

【００４７】また本発明の適応フィルタによる未知シス
テム同定の方法は、前記差信号の前記第１の定数に対す
る傾きに比例した値を前記第１の定数に加算して和を求
め、前記差信号に変動があることを検出したときには前
記和を予め定められた第２の定数に置換し、この和に制
限を加えた制限付和を用いて前記第１の定数を変化さ
せ、前記制限のしきい値は過去の制限付和の２乗値を用
いて生成することを特徴とする。Further, in the method of identifying an unknown system using an adaptive filter according to the present invention, a value proportional to a slope of the difference signal with respect to the first constant is added to the first constant to obtain a sum, and the sum is obtained. When it is detected that there is a change, the sum is replaced with a predetermined second constant, and the first constant is changed using a limited sum obtained by adding a limit to the sum, and the threshold of the limit is changed. The value is generated using the square value of the past restricted sum.

【００４８】また本発明の適応フィルタによる未知シス
テム同定の方法は、前記差信号の前記第１の定数に対す
る傾きに比例した値を前記第１の定数に加算して和を得
た後、この和に制限を加えた制限付和を求め、前記差信
号に変動があることを検出したときには前記制限付和を
予め定められた第２の定数に置換し、置換された制限付
和を用いて前記第１の定数を変化させ、前記制限のしき
い値は過去の制限付和の２乗値を用いて生成することを
特徴とする。In the method for identifying an unknown system using an adaptive filter according to the present invention, a value proportional to a slope of the difference signal with respect to the first constant is added to the first constant to obtain a sum, and the sum is obtained. The restricted sum is obtained by adding a restriction to, and when it is detected that the difference signal fluctuates, the restricted sum is replaced with a predetermined second constant, and the replaced restricted sum is used by using the replaced restricted sum. The method is characterized in that the first constant is changed, and the threshold value of the restriction is generated using the square value of the past restricted sum.

【００４９】また本発明の適応フィルタによる未知シス
テム同定の方法は、差信号の変数に対する傾きに比例し
た値を前記変数に加算して和を得た後、この和に制限を
加えた制限付和を求め、前記差信号に変動があることを
検出したときには予め定められた第１の定数に等しいク
ロック数だけ前記和をもって前記制限付和とし、前記制
限付和を用いて前記変数を変化させ、前記制限のしきい
値は過去の制限付和を用いて生成することを特徴とす
る。In the method for identifying an unknown system using an adaptive filter according to the present invention, a value proportional to the slope of a difference signal with respect to a variable is added to the variable to obtain a sum, and the sum is then restricted. Determine, when it is detected that there is a change in the difference signal, the sum is the limited sum with the number of clocks equal to a predetermined first constant, and the variable is changed using the limited sum, The threshold value of the restriction is generated using a past sum with restriction.

【００５０】また本発明の適応フィルタによる未知シス
テム同定の方法は、差信号の変数に対する傾きに比例し
た値を前記変数に加算して和を得た後、この和の平均値
を求め、この平均値を前記変数とすることを特徴とす
る。In the method of identifying an unknown system using the adaptive filter according to the present invention, a value proportional to the slope of the difference signal with respect to the variable is added to the variable to obtain a sum, and an average value of the sum is obtained. It is characterized in that a value is the variable.

【００５１】また本発明の適応フィルタによる未知シス
テム同定の方法は、差信号の変数に対する傾きに比例し
た値を前記変数に加算して平均化し、得られた平均値を
用いて前記平均演算の時定数を求め、前記差信号に変動
があることを検出したときには予め定められた第１の定
数に等しいクロック数だけ前記時定数を前記変数の初期
値で置換し、前記平均値を用いて前記変数とすることを
特徴とする。In the method of identifying an unknown system using an adaptive filter according to the present invention, a value proportional to a slope of a difference signal with respect to a variable is added to the variable and averaged, and the obtained average value is used for the averaging operation. A constant is obtained, and when it is detected that the difference signal fluctuates, the time constant is replaced with an initial value of the variable by the number of clocks equal to a predetermined first constant, and the variable is calculated using the average value. It is characterized by the following.

【００５２】[0052]

【作用】請求項１〜１７記載の適応フィルタによる未知
システム同定の方法及び装置は、係数更新に用いるステ
ップ・サイズを誤差信号電力の傾きを用いて計算する際
に、得られたステップ・サイズの変化量に過去のステッ
プ・サイズに依存する制限を設け、雑音等の妨害によっ
てステップ・サイズが正しい値から著しく離れてしまう
ことを防止すると同時に、同定誤差信号のパワーを監視
して同定対象の未知システムの特性が急変動したことを
検知し、ステップ・サイズをリセットすることによっ
て、高速収束と低同定誤差を両立させる。According to the method and apparatus for identifying an unknown system using an adaptive filter according to the present invention, the step size used for updating the coefficient is calculated by using the slope of the error signal power. The variation is limited depending on the past step size to prevent the step size from remarkably deviating from the correct value due to disturbances such as noise, and to monitor the power of the identification error signal to determine the unknown of the identification target. By detecting a sudden change in the characteristics of the system and resetting the step size, both fast convergence and low identification error can be achieved.

【００５３】請求項１８〜３６記載の適応フィルタによ
る未知システム同定の方法及び装置は、係数更新に用い
るステップ・サイズを誤差信号電力の傾きを用いて計算
する際に、得られたステップ・サイズの変化量に過去の
ステップ・サイズの２乗値に依存する制限を設け、雑音
等の妨害によってステップ・サイズが正しい値から著し
く離れてしまうことを防止すると同時に、同定誤差信号
のパワーを監視して同定対象の未知システムの特性が急
変動したことを検知し、ステップ・サイズをリセットす
ることによって、高速収束と低同定誤差を両立させる。In the method and apparatus for identifying an unknown system using an adaptive filter according to claims 18 to 36, the step size used for updating the coefficient is calculated by using the slope of the error signal power. By setting a limit on the amount of change depending on the square value of the past step size, it is possible to prevent the step size from deviating significantly from the correct value due to interference such as noise, and to monitor the power of the identification error signal. By detecting a sudden change in the characteristics of the unknown system to be identified and resetting the step size, both high-speed convergence and low identification error can be achieved.

【００５４】請求項３７〜４３記載の適応フィルタによ
る未知システム同定の方法及び装置は、係数更新に用い
るステップ・サイズを誤差信号電力の傾きを用いて計算
する際に、得られたステップ・サイズの変化量に過去の
ステップ・サイズに依存する制限を設け、雑音等の妨害
によってステップ・サイズが正しい値から著しく離れて
しまうことを防止すると同時に、同定誤差信号のパワー
を監視して同定対象の未知システムの特性が急変動した
ことを検知し、一定時間だけステップ・サイズの制限を
リセットすることによって、高速収束と低同定誤差を両
立させる。In the method and apparatus for identifying an unknown system using an adaptive filter according to the present invention, the step size used for updating the coefficient is calculated by using the slope of the error signal power. The variation is limited depending on the past step size to prevent the step size from remarkably deviating from the correct value due to disturbances such as noise, and to monitor the power of the identification error signal to determine the unknown of the identification target. By detecting a sudden change in the characteristics of the system and resetting the limit of the step size for a certain period of time, both high-speed convergence and low identification error can be achieved.

【００５５】請求項４４〜５５記載の適応フィルタによ
る未知システム同定の方法及び装置は、係数更新に用い
るステップ・サイズを誤差信号電力の傾きを用いて計算
する際に、得られたステップ・サイズを平均化し、雑音
等の妨害によってステップ・サイズが正しい値から著し
く離れてしまうことを防止すると同時に、同定誤差信号
のパワーを監視して同定対象の未知システムの特性が急
変動したことを検知し、一定時間だけ平均化の時定数を
リセットすることによって、高速収束と低同定誤差を両
立させる。In the method and apparatus for identifying an unknown system using an adaptive filter according to claims 44 to 55, the step size obtained when calculating the step size used for updating the coefficient by using the slope of the error signal power is used. Averaging to prevent the step size from deviating significantly from the correct value due to disturbances such as noise, and at the same time, monitor the power of the identification error signal to detect a sudden change in the characteristics of the unknown system to be identified, By resetting the averaging time constant for a fixed time, both high-speed convergence and low identification error can be achieved.

【００５６】[0056]

【実施例】次に図面を参照して請求項１〜１７に記載の
発明について詳細に説明する。図７は、本発明の一実施
例を示すブロック図である。図７において、図２と同一
の参照番号を付与された機能ブロックは図２と同一の機
能を有するものとする。図７と図２の相違点は、乗算器
５に供給されるステップ・サイズを制限するリミッタ９
のシステムが遅延素子１０で帰還されていることであ
る。BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 is a block diagram showing a first embodiment of the present invention; FIG. 7 is a block diagram showing one embodiment of the present invention. In FIG. 7, it is assumed that functional blocks to which the same reference numerals as those in FIG. 2 are assigned have the same functions as those in FIG. The difference between FIG. 7 and FIG. 2 is that a limiter 9 that limits the step size supplied to the multiplier 5 is used.
Is fed back by the delay element 10.

【００５７】図８は図７のリミッタ９の構成を表したも
のである。図７において遅延素子１０にはリミッタ９か
ら制限付ステップ・サイズα_k（バー）が供給される。
遅延素子１０の出力、すなわちα_k-1（バー）は、入力
端子２４を経て乗算器２５及び２６へ伝達される。α
_k-1（バー）は乗算器２５及び２６でそれぞれａ及びｂ
を乗算され、ａα_k-1（α_k-1バー），ｂα_k-1（α
_k-1バー）として最大値回路２７及び最小値回路２８へ
供給される。最小値回路２８には図７のステップ・サイ
ズ・コントローラ８から入力端子２３を経て、ステップ
・サイズα_kが供給される。また、最小値回路２８の別
の入力端子には最大値のしきい値であるＴｈ_Hが供給さ
れている。これらの３入力、すなわちα_k，Ｔｈ_H，ｂ
α_k-1（α_k-1バー）が比較されて、そのなかの最小値
が最小値回路２８の出力として最大値回路２７へ伝達さ
れる。最大値回路２７の別の入力端子には最小値のしき
い値であるＴｈ_Lと乗算器２５の出力ａα_k-1（α_k-1
バー）が供給されており、これらのうちの最大値が出力
端子２０に供給される。すなわち、入力端子２３に供給
されたステップ・サイズα_kは、最大値Ｔｈ_L及びａα
_k-1（α_k-1バー）、最大値Ｔｈ_H及びｂα_k-1（α
_k-1バー）で最大値と最小値を制限されて、以下のα_k
（バー）となって出力される。FIG. 8 shows the structure of the limiter 9 shown in FIG. In FIG. 7, a limiting step size α _k (bar) is supplied from a limiter 9 to a delay element 10.
The output of the delay element 10, that is, α _k-1 (bar) is transmitted to multipliers 25 and 26 via an input terminal 24. α
_k-1 (bar) is a and b in multipliers 25 and 26, respectively.
It is multiplied _{_{by, aα k-1 (α k}} -1 bar), bα _k-1 (α
_(k-1 bar) is supplied to the maximum value circuit 27 and the minimum value circuit 28. The minimum value circuit 28 is supplied with the step size α _k from the step size controller 8 of FIG. Further, another input terminal of the minimum value circuit 28 is supplied with the threshold value Th _H of the maximum value. These three inputs, α _k , Th _H , b
α _k−1 (α _k−1 bar) are compared, and the minimum value among them is transmitted to the maximum value circuit 27 as the output of the minimum value circuit 28. Another input terminal of the maximum value circuit 27 has a threshold value Th _L of the minimum value and an output aα _k−1 (α _{k−1) of the} multiplier 25.
) Are supplied, and the maximum value of these is supplied to the output terminal 20. That is, the step size α _k supplied to the input terminal 23 is the maximum value Th _L and aα
_k-1 (α _k-1 bar), maximum value Th _H and bα _k-1 (α
_k-1 bar), the maximum and minimum values are limited by the following α _k
(Bar) and output.

【００５８】[0058]

【数１６】 (Equation 16)

【００５９】ｓ_kとｖ_k−ｕ_kの振幅分布は一般に独立
である。従って、[0059] amplitude distribution of s _k and v _{_k} -u _k is generally independently. Therefore,

【００６０】[0060]

【数１７】 [Equation 17]

【００６１】が成立し、α_kの代りにα_k（バー）を用
いることにより、ｓ_kがｖ_k−ｕ_kに対して妨害となっ
ても、ｓ_kのｖ_k−ｕ_kに対する瞬間的な影響をリミッ
タ９で抑圧し、安定なステップ・サイズを得ることがで
きる。図８では最大値と最小値の両方の制限でステップ
・サイズの安定かを図っているが、最大値もしくは最小
値のどちらか一方だけでも有効である。[0061] is established, by using the alpha instead of _k alpha _k (bar), even if a disturbance s _k is relative to v _k -u _k, instantaneous for v _k -u _k of s _k Effect can be suppressed by the limiter 9, and a stable step size can be obtained. In FIG. 8, the step size is stabilized by limiting both the maximum value and the minimum value. However, only one of the maximum value and the minimum value is effective.

【００６２】図８を用いて説明したように、ステップ・
サイズの最大値と最小値を過去のステップ・サイズの値
を用いて制限すると、同定しようとする未知システムの
特性が急変して、誤差信号が急増した場合などに不都合
が生じる。このような場合にはステップ・サイズを急激
に大きくして未知システム特性の変化に適応フィルタを
追随させなければならない。しかし、ステップ・サイズ
の値がその過去の値で制限されていると緩やかにしか変
化することができず、システム変動への追随特性が劣化
する。この点に対処することのできるステップ・サイズ
・コントローラの実施例を図９に示す。As described with reference to FIG.
If the maximum value and the minimum value of the size are limited by using the values of the past step sizes, the characteristics of the unknown system to be identified suddenly change, causing a problem when the error signal suddenly increases. In such a case, the adaptive filter must follow the change in the unknown system characteristic by rapidly increasing the step size. However, if the value of the step size is limited by its past value, it can only change slowly, and the characteristic of following the system fluctuation deteriorates. An embodiment of a step size controller capable of addressing this point is shown in FIG.

【００６３】図９において、図３と同一の参照番号を付
与された機能ブロックは図３と同一の機能を有するもの
とする。図３において加算器９８の出力は直接出力端子
１００へ伝達されているが、図９においてはセレクタ４
３を介している。セレクタ４３の他の入力端子にはα_O
が供給されている。セレクタ４３は誤差変動検出回路４
２からの制御信号によって、α_Oもしくは加算器９８の
出力を選択して、出力信号、すなわちステップ・サイズ
として出力端子１００へ伝達する。また、セレクタ４３
の出力信号は遅延素子９９を経て加算器９８に帰還され
ている。従って、セレクタ４３が加算器９８からの信号
を選択して出力端子１００に伝達しているときは図９は
図３と全く等しい動作をすることになり、ステップ・サ
イズは過去の値に変化分を加算して計算される。セレク
タ４３がα_Oを出力端子１００へ供給するときは、過去
の値にかかわらずステップ・サイズはα_Oに等しくな
り、これはステップ・サイズを再設定することに相当す
る。誤差変動検出回路４２は、入力端子９０に供給され
る誤差信号を入力としてその変動を検出し、変動が検出
されたときには１を、それ以外のときは０を発生する。
セレクタ４３は誤差変動検出回路４２から１が供給され
たときはα_Oを選択し、０が供給されたときは加算器９
８の出力信号を選択する。次に誤差変動検出回路４２に
ついて説明する。In FIG. 9, it is assumed that functional blocks to which the same reference numerals as those in FIG. 3 have the same functions as those in FIG. The output of the adder 98 is directly transmitted to the output terminal 100 in FIG. 3, but in FIG.
Through three. The other input terminal of the selector 43 has α _O
Is supplied. The selector 43 is an error fluctuation detection circuit 4
According to the control signal from 2, α _O or the output of the adder 98 is selected and transmitted to the output terminal 100 as an output signal, that is, a step size. Also, the selector 43
Is output to the adder 98 via the delay element 99. Therefore, when the selector 43 selects the signal from the adder 98 and transmits the signal to the output terminal 100, FIG. 9 performs the same operation as that of FIG. Is calculated by adding When the selector 43 supplies α _O to the output terminal 100, the step size becomes equal to α _O regardless of the past value, which corresponds to resetting the step size. The error fluctuation detection circuit 42 receives the error signal supplied to the input terminal 90 as an input, detects the fluctuation, and generates 1 when the fluctuation is detected, and generates 0 otherwise.
The selector 43 selects α _O when 1 is supplied from the error fluctuation detection circuit 42, and selects the adder 9 when 0 is supplied.
8 is selected. Next, the error fluctuation detection circuit 42 will be described.

【００６４】図１０に誤差変動検出回路の一例を示す。
入力端子５０には誤差信号が供給されており、これは乗
算器５１で２乗された後、セレクタ５２と比較回路５７
に伝達される。セレクタ５２の別の入力には０が供給さ
れており、カウンタ５３の出力によっていずれかが選択
され、最大値回路５４へ供給され、最大値回路５４の出
力は遅延素子５５を介して最大値回路５４の別の入力に
帰還されているから、カウンタ５３は予め定められた整
数Ｎ_Cまでカウントアップを続け、セレクタ５２が乗算
器５１から供給された信号を選択するような制御信号を
セレクタ５２へ供給する。従って、乗算器５１からセレ
クタ５２、最大値回路５４を経て遅延素子５５によって
閉じる帰還回路は、一番目からＮ_C番目のサンプルの最
大値を検出して保存することになる。Ｎ_C番目以降のサ
ンプルが入力されるとセレクタ５２は０を選択して最大
値回路５４へ伝達するので、最大値回路５４の出力は遅
延素子５５から供給される信号、すなわち一番目からＮ
_C番目までのサンプルの最大値となり、この信号が乗算
器５６へ伝達される。乗算器５６では最大値回路５４か
ら供給された最大値に定数ｅ_thが乗算されて比較器５７
へ伝達される。一方、比較回路５７の他の入力端子には
乗算器５１の出力である誤差信号の２乗値が供給されて
いる。比較回路５７は、誤差信号の２乗値が大きいとき
は１を、それ以外のときは０を出力し、出力端子５８へ
伝達する。出力端子５８へ供給された信号によって図３
のセレクタ４３が制御され、ステップ・サイズとしてα
_O又はα_Kが出力される。誤差信号をｅ_kとすると、比
較回路５７の入力はそれぞれ、FIG. 10 shows an example of the error fluctuation detecting circuit.
An error signal is supplied to an input terminal 50, which is squared by a multiplier 51, and then is supplied to a selector 52 and a comparison circuit 57.
Is transmitted to The other input of the selector 52 is supplied with 0, one of which is selected by the output of the counter 53 and supplied to the maximum value circuit 54, and the output of the maximum value circuit 54 is supplied via the delay element 55 to the maximum value circuit Since it is fed back to another input of the counter 54, the counter 53 continues counting up to a predetermined integer N _C, and sends a control signal to the selector 52 so that the selector 52 selects the signal supplied from the multiplier 51. Supply. Therefore, a feedback circuit from the multiplier 51 the selector 52, closed by the delay element 55 through the maximum value circuit 54 will be saved by detecting the maximum value of N _C th sample from a second. When the samples after the N _C- th sample are input, the selector 52 selects 0 and transmits it to the maximum value circuit 54. Therefore, the output of the maximum value circuit 54 is a signal supplied from the delay element 55, that is,
The maximum value of the samples up to the _C- th sample is obtained, and this signal is transmitted to the multiplier 56. The multiplier 56 multiplies the maximum value supplied from the maximum value circuit 54 by a constant e _{th, and}
Is transmitted to On the other hand, the square value of the error signal output from the multiplier 51 is supplied to another input terminal of the comparison circuit 57. The comparison circuit 57 outputs 1 when the square value of the error signal is large, and outputs 0 otherwise, and transmits the output signal to the output terminal 58. The signal supplied to the output terminal 58 causes the signal shown in FIG.
Is controlled, and the step size is α
_O or alpha _K is output. Assuming that the error signal is e _k , the inputs of the comparison circuit 57 are

【００６５】[0065]

【数１８】 (Equation 18)

【００６６】となる。従って、図９の出力端子１００に
供給されるステップ・サイズα_kは数１９で表される。Is obtained. Accordingly, the step size α _k supplied to the output terminal 100 in FIG.

【００６７】[0067]

【数１９】 [Equation 19]

【００６８】数１９で得られたステップ・サイズα_kが
ステップ・サイズ・コントローラ８の出力としてリミッ
タ７へ伝達される。The step size α _k obtained by the equation (19) is transmitted to the limiter 7 as an output of the step size controller 8.

【００６９】図１１は、誤差変動検出回路の別の例であ
る。図１０との違いは、乗算器５１が絶対値回路５９に
置換されている点であり、その他は全く等しい。従っ
て、図１１に示す誤差変動検出回路を用いた場合には、
図９の出力端子１００に供給されるステップ・サイズα
_kは数２０で表される。FIG. 11 shows another example of the error fluctuation detecting circuit. The difference from FIG. 10 is that the multiplier 51 is replaced by an absolute value circuit 59, and the others are completely the same. Therefore, when the error fluctuation detection circuit shown in FIG. 11 is used,
Step size α supplied to output terminal 100 in FIG.
_k is represented by Equation 20.

【００７０】[0070]

【数２０】 (Equation 20)

【００７１】数２０で得られたステップ・サイズα_kが
ステップ・サイズ・コントローラ８の出力としてリミッ
タ９へ伝達される。The step size α _k obtained by the equation (20) is transmitted to the limiter 9 as an output of the step size controller 8.

【００７２】図１２は本発明の他の実施例で、図７に示
す実施例で図９に示す構成のステップ・サイズ・コント
ローラを採用した場合を別の構成で実現する例である。
図１２が図７と図９の組合せと異なる点は、誤差変動の
検出とステップ・サイズの再設定である。図７と図９の
組合せではステップ・サイズの再設定をした後にリミッ
タでステップ・サイズを制限しているが、図１２ではリ
ミッタで制限されたステップ・サイズに対して再設定を
行う。誤差変動検出回路４２は図１０または図１１に示
された構成で、すでに説明したように誤差信号に変動が
あるときには１を、ないときには０を出力する。セレク
タ４１は誤差変動検出回路４２から制御信号として１が
供給されたときにはα_Oを、０が供給されたときにはリ
ミッタ９の出力であるα_k（バー）を選択して乗算器５
に伝達する。従って、誤差信号に変動が検出されたとき
には、再設定されたステップ・サイズはα_Oが乗算器５
に供給される。FIG. 12 shows another embodiment of the present invention, in which the embodiment shown in FIG. 7 employs a step size controller having the configuration shown in FIG. 9 in another configuration.
FIG. 12 differs from the combination of FIG. 7 and FIG. 9 in the detection of error fluctuation and resetting of the step size. In the combination of FIG. 7 and FIG. 9, the step size is limited by the limiter after resetting the step size. In FIG. 12, the step size is reset for the step size limited by the limiter. The error variation detection circuit 42 has the configuration shown in FIG. 10 or FIG. 11, and outputs 1 when there is a variation in the error signal, and outputs 0 when there is no variation as described above. The selector 41 selects α _O when 1 is supplied as a control signal from the error fluctuation detection circuit 42, and selects α _k (bar) which is the output of the limiter 9 when 0 is supplied, and selects the multiplier 5.
To communicate. Therefore, when a fluctuation is detected in the error signal, the reset step size is α _O
Supplied to

【００７３】[0073]

【実施例】次に請求項１８〜３６に記載の発明について
詳細に説明する。図１３は、本発明の一実施例を示すブ
ロック図である。図１３において、図２と同一の参照番
号を付与された機能ブロックは図２と同一の機能を有す
るものとする。図１３と図２の相違点は、乗算器５に供
給されるステップ・サイズを制限するリミッタ９の出力
が遅延素子１０で帰還されていることである。Next, the invention according to claims 18 to 36 will be described in detail. FIG. 13 is a block diagram showing one embodiment of the present invention. In FIG. 13, it is assumed that functional blocks to which the same reference numerals as those in FIG. 2 are assigned have the same functions as those in FIG. The difference between FIG. 13 and FIG. 2 is that the output of the limiter 9 that limits the step size supplied to the multiplier 5 is fed back by the delay element 10.

【００７４】図１４は図１３のリミッタ９の第１の構成
を表したものである。図１３において遅延素子１０には
リミッタ９から制限付ステップ・サイズα_k（バー）が
供給される。遅延素子１０の出力、すなわちα_k-1（バ
ー）は、入力端子２４を経て乗算器２００及び２０１へ
伝達される。α_k-1（バー）は乗算器２０１で正の定数
η倍された後、乗算器２００でα_k-1（バー）と乗算さ
れ、ηα_k-1 ²（α_k-1バー）として最大値回路２７及び
最小値回路２８へ供給される。最小値回路２８には図１
３のステップ・サイズ・コントローラ８から入力端子３
３を経て、ステップ・サイズα_kが供給される。また、
最小値回路２８の別の入力端子には最大値のしきい値で
あるＴｈ_Hが供給されている。これらの３入力、すなわ
ちα_k，Ｔｈ_H，ηα_k-1 ²（α_k-1バー）が比較され
て、そのなかの最小値が最小値回路２８の出力として最
大値回路２７へ伝達される。最大値回路２７の別の入力
端子には最小値のしきい値であるＴｈ_Lと乗算器２５の
出力ηα_k-1 ²（α_k-1バー）が供給されており、これら
のうちの最大値が出力端子２０に供給される。すなわ
ち、入力端子２３に供給されたステップ・サイズα
_kは、最小値Ｔｈ_L及びηα_k-1 ²（α_k-1バー）、最大
値Ｔｈ_H及びηα_k-1 ²（α_k-1バー）で最大値と最小値
を制限されて、以下のα_k（バー）となって出力され
る。FIG. 14 shows a first configuration of the limiter 9 of FIG. In FIG. 13, a limiter 9 supplies a limited step size α _k (bar) to the delay element 10. The output of the delay element 10, that is, α _k-1 (bar) is transmitted to the multipliers 200 and 201 via the input terminal 24. After alpha _k-1 (bars), which is positive constant η times by the multiplier 201 is multiplied by the alpha _k-1 (bars) in a multiplier 200, a maximum as _{^{_{ηα k-1 2 (α k}}} -1 bar) It is supplied to the value circuit 27 and the minimum value circuit 28. FIG.
Step size controller 8 to input terminal 3
After step 3, a step size α _k is provided. Also,
Another input terminal of the minimum value circuit 28 is supplied with the threshold value Th _H of the maximum value. These three inputs, i.e. _{_{_{α k, Th H, ηα k}}} -1 2 (α k-1 bar) are compared and are transmitted minimum value therein is to the maximum value circuit 27 as an output of the minimum value circuit 28 . The other input terminal of the maximum value circuit 27 Th _L and the output _{^{_{ηα k-1 2 (α k}}} -1 bar) is supplied with the multiplier 25 is the threshold of the minimum value, the maximum of these The value is provided to output terminal 20. That is, the step size α supplied to the input terminal 23
_k is the minimum value Th _L and _{^{_{ηα k-1 2 (α k}}} -1 bar), is limited to the maximum value and the minimum value by the maximum value Th _H and _{^{_{ηα k-1 2 (α k}}} -1 bar), the following Is output as α _k (bar).

【００７５】[0075]

【数２１】 (Equation 21)

【００７６】ｓ_kとｖ_k−ｕ_kの振幅分布は一般に独立
である。従って、[0076] amplitude distribution of s _k and v _{_k} -u _k is generally independently. Therefore,

【００７７】[0077]

【数２２】 (Equation 22)

【００７８】が成立し、α_kの代りにα_k（バー）を用
いることにより、ｓ_kがｖ_k−ｕ_kに対して妨害となっ
ても、ｓ_kのｖ_k−ｕ_kに対する瞬間的な影響をリミッ
タ９で抑圧し、安定なステップ・サイズを得ることがで
きる。[0078] is established, by using the alpha instead of _k alpha _k (bar), even if s _k is a interference to v _k -u _k, instantaneous for v _k -u _k of s _k Effect can be suppressed by the limiter 9, and a stable step size can be obtained.

【００７９】図１５は図１３のリミッタ９の第２の構成
を表したものである。遅延素子１０の出力、すなわちα
_k-1（バー）は、入力端子２４を経て乗算器２００へ伝
達される。α_k-1（バー）は乗算器２００で２乗された
後、乗算器２５及び２６でそれぞれ正の定数η倍、正の
定数θ倍される。得られた出力であるηα_k-1 ²（α_k-1
バー），θα_k-1 ²（α_k-1バー）はそれぞれ最大値回路
２７及び最小値回路２８へ供給される。以下、図１４に
示した第１の構成例と同様に動作する。すなわち、入力
端子２３に供給されたステップ・サイズα_kは、最小値
Ｔｈ_L及びηα_k-1 ²（α_k-1バー）、最大値Ｔｈ_H及び
θα_k-1 ²（α_k-1バー）で最大値と最小値を制限され
て、以下のα_k（バー）となって出力される。FIG. 15 shows a second configuration of the limiter 9 in FIG. The output of the delay element 10, that is, α
_k-1 (bar) is transmitted to the multiplier 200 via the input terminal 24. After α _k−1 (bar) is squared by the multiplier 200, it is multiplied by a positive constant η and a positive constant θ by the multipliers 25 and 26, respectively. The obtained output, ηα _k-1 ² (α _k-1
) And θα _k-1 ² (α _k-1 bar) are supplied to a maximum value circuit 27 and a minimum value circuit 28, respectively. Hereinafter, the operation is the same as that of the first configuration example shown in FIG. That is, the step size alpha _k supplied to the input terminal 23, the minimum value Th _L and _{^{_{ηα k-1 2 (α k}}} -1 bar), the maximum value Th _H and _{^{_{θα k-1 2 (α k}}} -1 bar ) Limits the maximum and minimum values and outputs the following α _k (bar).

【００８０】[0080]

【数２３】 (Equation 23)

【００８１】図１５では最小値と最大値の両方の制限で
ステップ・サイズの安定化をはかっているが、最大値、
もしくは最小値のどちらか一方だけでも有効である。In FIG. 15, the step size is stabilized by limiting both the minimum value and the maximum value.
Alternatively, only one of the minimum values is effective.

【００８２】図１４及び図１５を用いて説明したよう
に、ステップ・サイズの最大値と最小値を過去のステッ
プ・サイズの値を用いて制限すると、同定しようとする
未知システムの特性が急変して、誤差信号が急増した場
合などに不都合が生じる。このような場合にはステップ
・サイズを急激に大きくして未知システム特性の変化に
適応フィルタを追随させなければならない。しかし、ス
テップ・サイズの値がその過去の値で制限されていると
緩やかにしか変化することができず、システム変動への
追随特性が劣化する。この点に対処することのできるス
テップ・サイズ・コントローラの構成は、図９に示した
ものと同じである。また、図９中の誤差変動検出回路４
２の構成例は、図１０及び図１１に示したものと同じで
ある。As described with reference to FIGS. 14 and 15, when the maximum value and the minimum value of the step size are limited by using the values of the past step sizes, the characteristics of the unknown system to be identified suddenly change. Inconvenience occurs when the error signal suddenly increases. In such a case, the adaptive filter must follow the change in the unknown system characteristic by rapidly increasing the step size. However, if the value of the step size is limited by its past value, it can only change slowly, and the characteristic of following the system fluctuation deteriorates. The configuration of the step size controller that can deal with this point is the same as that shown in FIG. Further, the error fluctuation detection circuit 4 shown in FIG.
The configuration example 2 is the same as that shown in FIGS. 10 and 11.

【００８３】また図１２に示した実施例は、本発明にも
適用でき、その動作は、図１２に関連して説明したもの
と同じである。The embodiment shown in FIG. 12 can be applied to the present invention, and its operation is the same as that described with reference to FIG.

【００８４】次に請求項３７〜４３に記載の発明につい
て説明する。図１６は、本発明の一実施例を示すブロッ
ク図である。図１６において、図１と同一の参照番号を
付与された機能ブロックは図１と同一の機能を有するも
のとする。図１６と図１の相違点は、乗算器５に供給さ
れるステップ・サイズを制限するリミッタ９の出力がセ
レクタ４１を介して遅延素子１１で帰還されていること
である。セレクタ４１を制御するために、誤差変動検出
回路４２，カウンタ４４，遅延素子４６，セレクタ４５
が具備されている。Next, the invention according to claims 37 to 43 will be described. FIG. 16 is a block diagram showing one embodiment of the present invention. In FIG. 16, it is assumed that functional blocks to which the same reference numerals as those in FIG. 1 are assigned have the same functions as those in FIG. The difference between FIG. 16 and FIG. 1 is that the output of the limiter 9 that limits the step size supplied to the multiplier 5 is fed back by the delay element 11 via the selector 41. In order to control the selector 41, an error fluctuation detection circuit 42, a counter 44, a delay element 46, a selector 45
Is provided.

【００８５】リミッタ回路９の構成は、図１５の構成と
同じである。図１６において、遅延素子１１にはセレク
タ４１を介してリミッタ９から制限付ステップ・サイズ
α_k（バー）、またはα_kが供給される。説明を簡単化
するために、リミッタ９からは制限付ステップ・サイズ
α_k（バー）が供給されていると仮定する。遅延素子１
１の出力、すなわちα_k-1（バー）は、図１５の入力端
子２４を経て乗算器２００へ伝達される。α_k-1（バ
ー）は乗算器２００で２乗された後、乗算器２５及び２
６でそれぞれ正の定数η倍及びθ倍される。得られた出
力であるηα_k-1 ²（α_k-1バー）、θα_k-1 ²（α_k-1バ
ー）はそれぞれ最大値回路２７及び最小値回路２８へ供
給される。最小値回路２８には図１６のステップ・サイ
ズ・コントローラ８から入力端子２３を経て、ステップ
・サイズα_kが供給される。また、最小値回路２８の別
の入力端子には最大値のしきい値であるＴｈ_Hが供給さ
れている。これらの３入力、すなわちα_k，Ｔｈ_H，θ
α_k-1 ²（α_k-1バー）が比較されて、その中の最小値が
最小回路２８の出力として最大値回路２７へ伝達され
る。最大値回路２７の別の入力端子には最小値のしきい
値であるＴｈ_Lと乗算器２５の出力ηα_k-1 ²（α_k-1バ
ー）が供給されており、これらのうちの最大値が出力端
子２０に供給される。すなわち、入力端子２３に供給さ
れたステップ・サイズα_kは、最小値Ｔｈ_L及びηα
_k-1 ²（α_k-1バー）、最小値Ｔｈ_H及びθα_k-1 ²（α
_k-1バー）で最大値と最小値を制限されて、以下のα_k
（バー）となって出力される。The structure of the limiter circuit 9 is the same as the structure shown in FIG. In FIG. 16, a limited step size α _k (bar) or α _k is supplied from a limiter 9 to a delay element 11 via a selector 41. For the sake of simplicity, it is assumed that the limiter 9 has supplied a restricted step size α _k (bar). Delay element 1
The output of 1, that is, α _k-1 (bar), is transmitted to the multiplier 200 via the input terminal 24 of FIG. α _k-1 (bar) is squared by the multiplier 200, and then the multipliers 25 and 2
6 are multiplied by positive constants η and θ, respectively. Is obtained output _{^{_{ηα k-1 2 (α k}}} -1 _{^{bar), θα k-1 2 (}} α k-1 bar) is supplied to the maximum value circuit 27 and minimum value circuit 28, respectively. The minimum value circuit 28 is supplied with the step size α _k via the input terminal 23 from the step size controller 8 in FIG. Further, another input terminal of the minimum value circuit 28 is supplied with the threshold value Th _H of the maximum value. These three inputs, α _k , Th _H , θ
α _k−1 ² (α _k−1 bar) are compared, and the minimum value among them is transmitted to the maximum value circuit 27 as the output of the minimum circuit 28. The other input terminal of the maximum value circuit 27 Th _L and the output _{^{_{ηα k-1 2 (α k}}} -1 bar) is supplied with the multiplier 25 is the threshold of the minimum value, the maximum of these The value is provided to output terminal 20. That is, the step size α _k supplied to the input terminal 23 is the minimum value Th _L and ηα
_k-1 ² (α _k-1 bar), minimum value Th _H and θα _k-1 ² (α
_k-1 bar), the maximum and minimum values are limited by the following α _k
(Bar) and output.

【００８６】[0086]

【数２４】 (Equation 24)

【００８７】ｓ_kとｖ_k−ｕ_kの振幅分布は一般に独立
である。従って、[0087] amplitude distribution of s _k and v _{_k} -u _k is generally independently. Therefore,

【００８８】[0088]

【数２５】 (Equation 25)

【００８９】が成立し、α_kの代りにα_k（バー）を用
いることにより、ｓ_kがｖ_k−ｕ_kに対して妨害となっ
ても、ｓ_kのｖ_k−ｕ_kに対する瞬間的な影響をリミッ
タ９で抑圧し、安定なステップ・サイズを得ることがで
きる。図１５では最小値と最大値の両方の制限でステッ
プ・サイズの安定化をはかっているが、最大値、もしく
は最小値のどちらか一方だけでも有効である。[0089] is established, by using the alpha instead of _k alpha _k (bar), even if s _k is a interference to v _k -u _k, instantaneous for v _k -u _k of s _k Effect can be suppressed by the limiter 9, and a stable step size can be obtained. In FIG. 15, the step size is stabilized by limiting both the minimum value and the maximum value. However, only one of the maximum value and the minimum value is effective.

【００９０】図１５を用いて説明したように、ステップ
・サイズの最大値と最小値を過去のステップ・サイズの
値を用いて制限すると、同定しようとする未知システム
の特性が急変して、誤差信号が急増した場合などに不都
合が生じる。このような場合にはステップ・サイズを急
激に大きくして未知システム特性の変化に適応フィルタ
を追随させなければならない。しかし、ステップ・サイ
ズの値がその過去の値で制限されていると緩やかにしか
変化することができず、システム変動への追随特性が劣
化する。そこで本発明では、同定しようとする未知シス
テムの特性急変を誤差変動検出回路で検出し、ステップ
・サイズに対する制限を除去する。As described with reference to FIG. 15, when the maximum value and the minimum value of the step size are limited by using the values of the past step sizes, the characteristics of the unknown system to be identified suddenly change, and the error Inconvenience occurs when the signal increases rapidly. In such a case, the adaptive filter must follow the change in the unknown system characteristic by rapidly increasing the step size. However, if the value of the step size is limited by its past value, it can only change slowly, and the characteristic of following the system fluctuation deteriorates. Therefore, in the present invention, a sudden change in the characteristic of an unknown system to be identified is detected by an error fluctuation detection circuit, and the restriction on the step size is removed.

【００９１】誤差変動検出回路４２の一構成例は、図１
０に示したものと同じである。入力端子５０には誤差信
号が供給されており、これは乗算器５１で２乗された
後、セレクタ５２と比較回路５７に伝達される。セレク
タ５２の別の入力には０が供給されており、カウンタ５
３の出力によっていずれかが選択され、最大値回路５４
へ供給される。最大値回路５４の出力は遅延素子５５を
介して最大値回路５４の別の入力に帰還されている。カ
ウンタ５３は予め定められた整数Ｎ_Cまでカウントアッ
プを続け、セレクタ５２が乗算器５１から供給された信
号を選択するような制御信号をセレクタ５２へ供給す
る。従って、乗算器５１からセレクタ５２、最大値回路
５４を経て遅延素子５５によって閉じる帰還回路は、一
番目からＮ_C番目のサンプルの最大値を検出して保存す
ることになる。Ｎ_C番目以降のサンプルが入力されると
セレクタ５２は０を選択して最大値回路５４へ伝達する
ので、最大値回路５４の出力は遅延素子５５から供給さ
れる信号、すなわち一番目からＮ_C番目までのサンプル
の最大値となり、この信号が乗算器５６へ伝達される。
乗算器５６では最大値回路５４から供給された最大値に
定数ｅ_thが乗算されて比較器５７へ伝達される。一方、
比較器５７の他方の入力端子には乗算器５１の出力であ
る誤差信号の２乗値が供給されている。比較回路５７
は、誤差信号の２乗値が大きいときは１を、それ以外の
ときは０を出力し、出力端子５８へ伝達する。One example of the configuration of the error fluctuation detection circuit 42 is shown in FIG.
It is the same as that shown in FIG. An error signal is supplied to an input terminal 50, which is squared by a multiplier 51 and then transmitted to a selector 52 and a comparison circuit 57. 0 is supplied to another input of the selector 52 and the counter 5
3 is selected according to the output of the maximum value circuit 54.
Supplied to The output of the maximum value circuit 54 is fed back to another input of the maximum value circuit 54 via the delay element 55. The counter 53 continues counting up to a predetermined integer N _C , and supplies a control signal to the selector 52 so that the selector 52 selects the signal supplied from the multiplier 51. Therefore, a feedback circuit from the multiplier 51 the selector 52, closed by the delay element 55 through the maximum value circuit 54 will be saved by detecting the maximum value of N _C th sample from a second. Since the N _C -th sample is the input selector 52 is transmitted to the maximum value circuit 54 to select the 0, N _C output of maximum value circuit 54 is the signal supplied from the delay element 55, i.e. from a th This signal becomes the maximum value of the samples up to the nth sample, and this signal is transmitted to the multiplier 56.
In the multiplier 56, the maximum value supplied from the maximum value circuit 54 is multiplied by a constant e _th and transmitted to the comparator 57. on the other hand,
The other input terminal of the comparator 57 is supplied with the square value of the error signal output from the multiplier 51. Comparison circuit 57
Outputs 1 when the square value of the error signal is large, and outputs 0 otherwise, and transmits it to the output terminal 58.

【００９２】出力端子５８へ供給された信号は誤差変動
検出回路４２の出力として、図１６のカウンタ４４とセ
レクタ４５に供給される。セレクタ４５には遅延素子４
６からの帰還信号も供給されている。カウンタ４４は誤
差信号検出回路４２の出力が０から１に変化してからカ
ウントアップを開始し、カウントが１のときは誤差変動
検出回路４２の出力を、カウントが２から外部から供給
されるしきい値ｋ_thに達するまでは遅延素子４６から供
給される信号を、セレクタ４５が選択して出力するよう
に制御する。従って、カウンタ４４では誤差信号検出回
路４２の出力が０から１に変化してからｋ_thクロックの
間は、セレクタ４５の出力としては１が得られる。セレ
クタ４５の出力はセレクタ４１を制御する。セレクタ４
１は制御信号として０が供給されたときはリミッタ９か
らの信号を、１が供給されたときはステップ・サイズ・
コントローラ８からの信号を選択して出力する。従っ
て、誤差信号に変動が検出されてからｋ_thクロックの間
は制限無しのステップ・サイズα_kが、それ以外はリミ
ッタ９で得られる制限付ステップ・サイズα_k（バー）
が乗算器５に供給されることになる。The signal supplied to the output terminal 58 is supplied to the counter 44 and the selector 45 in FIG. The selector 45 has a delay element 4
6 is also supplied. The counter 44 starts counting up after the output of the error signal detection circuit 42 changes from 0 to 1, and when the count is 1, the output of the error fluctuation detection circuit 42 is supplied from the count 2 to the outside. Until the threshold value k _th is reached, the selector 45 selects and outputs the signal supplied from the delay element 46. Therefore, in the counter 44, 1 is obtained as the output of the selector 45 during the k _th clock after the output of the error signal detection circuit 42 changes from 0 to 1. The output of the selector 45 controls the selector 41. Selector 4
1 is a signal from the limiter 9 when 0 is supplied as a control signal, and a step size when 1 is supplied.
A signal from the controller 8 is selected and output. Accordingly, an unlimited step size α _k is obtained during the k _th clock after a change is detected in the error signal, and otherwise, a limited step size α _k obtained by the limiter 9 (bar)
Is supplied to the multiplier 5.

【００９３】請求項４４〜５５に記載の発明について詳
細に説明する。図１７は、本発明の一実施例を示すブロ
ック図である。図１７において、図１と同一の参照番号
を付与された機能ブロックは図１と同一の機能を有する
ものとする。図１７と図１の相違点は、リミッタ９で得
られたステップ・サイズが平均化回路４７で平均化され
てから乗算器５に供給されることである。リミッタ９で
得られるステップ・サイズは、減算器４の出力ｓ_k＋ｖ
_k−ｕ_kに雑音ｓ_kが含まれるためにその妨害を受け、
振幅が雑音振幅に依存した大きさで本来のステップ・サ
イズから変動する。The invention according to claims 44 to 55 will be described in detail. FIG. 17 is a block diagram showing one embodiment of the present invention. In FIG. 17, it is assumed that the functional blocks to which the same reference numerals as those in FIG. 1 have the same functions as those in FIG. The difference between FIG. 17 and FIG. 1 is that the step size obtained by the limiter 9 is averaged by the averaging circuit 47 before being supplied to the multiplier 5. The step size obtained by the limiter 9 is the output s _k + v of the subtractor 4
receiving the interference to noise s _k is included in the _k -u _k,
The amplitude varies from the original step size by a magnitude dependent on the noise amplitude.

【００９４】雑音振幅ｓ_kは確率過程で振幅分布が誤差
信号ｖ_k−ｕ_kの振幅分布と相関がない、すなわち[0094] noise amplitude s _k is the amplitude distribution there is no correlation between the amplitude distribution of the error signal v _{_k} -u _k in the stochastic process, ie

【００９５】[0095]

【数２６】 (Equation 26)

【００９６】で、かつＥ［ｓ_k］＝０が成立するので、
リミッタ９の出力を平均化することで雑音の影響による
ステップ・サイズの変動分も平均化される。従って、平
均化回路４７の出力には近似的に本来のステップ・サイ
ズを得ることができ、雑音によるステップ・サイズ変動
の悪影響を抑圧することができる。And E [s _k ] = 0 holds, so that
By averaging the output of the limiter 9, the variation in the step size due to the influence of noise is also averaged. Therefore, the output of the averaging circuit 47 can approximately obtain the original step size, and can suppress the adverse effect of the step size fluctuation due to noise.

【００９７】図１８は図１７の平均化回路４７の構成を
表したものである。入力端子７４には図１７のリミッタ
９からステップ・サイズα_kが供給される。α_kは乗算
器７５でβ倍されてβα_kとなり、加算器７６に伝達さ
れる。加算器７６では乗算器７５の出力と乗算器７９の
出力が加算されて平均化されたステップ・サイズα
_k（バー）となり、出力端子７７へ伝達される。また、
加算器７６の出力は遅延素子７８と乗算器７９を介して
加算器７６に帰還される。遅延素子７８の出力はα_k-1
（バー）乗算器２９で（１−β）倍されて（１−β）α
_k-1（α_k-1バー）となり、加算器７６への帰還信号と
なる。従って、平均化回路４７の出力信号α_k-1（バ
ー）は入力信号α_kを用いてFIG. 18 shows the structure of the averaging circuit 47 shown in FIG. The input terminal 74 is supplied with the step size α _k from the limiter 9 in FIG. α _k is multiplied by β in multiplier 75 to become βα _k and transmitted to adder 76. In the adder 76, the output of the multiplier 75 and the output of the multiplier 79 are added and the averaged step size α
_k (bar) and transmitted to the output terminal 77. Also,
The output of the adder 76 is fed back to the adder 76 via the delay element 78 and the multiplier 79. The output of the delay element 78 is α _k−1
(Bar) Multiplied by (1−β) in the multiplier 29 and (1−β) α
_k−1 (α _k−1 bar), which is a feedback signal to the adder 76. Therefore, the output signal α _k-1 (bar) of the averaging circuit 47 is _obtained by using the input signal α _k

【００９８】[0098]

【数２７】 [Equation 27]

【００９９】で与えられる。Is given by

【０１００】本発明の収束特性と最終誤差は上記のパラ
メータβに依存する。βが大きいと収束は遅いが最終誤
差は小さい。βが小さいと収束は速いが最終誤差が大き
い。この問題を解決するために、パラメータβをリミッ
タ９の出力を用いて可変とすることもできる。The convergence characteristics and final error of the present invention depend on the above parameter β. If β is large, the convergence is slow, but the final error is small. If β is small, convergence is fast, but the final error is large. To solve this problem, the parameter β can be made variable using the output of the limiter 9.

【０１０１】図１９に可変パラメータβを有する本発明
の実施例を示す。図１７と異なる点は、パラメータβが
平均化回路４８の出力である平均化ステップ・サイズに
よって可変となっていること、及び誤差変動検出回路４
２によって未知系の急変動を検出し、ステップ・サイズ
をβ₀に切換えることである。FIG. 19 shows an embodiment of the present invention having a variable parameter β. 17 differs from FIG. 17 in that the parameter β is variable depending on the averaging step size output from the averaging circuit 48, and that the error fluctuation detection circuit 4
2 is to detect a sudden change in the unknown system and switch the step size to β ₀ .

【０１０２】平均化回路４８の出力は乗算器５へ伝達さ
れると同時に乗算器４９へも供給される。乗算器４９で
は平均化回路４８の出力信号を正定数δ倍した後、セレ
クタ４１へ伝達する。セレクタ４１には別の正定数β₀
も供給されており、セレクタ４５からの信号でいずれか
を選択されて平均化回路４８に伝達される。セレクタ４
１が乗算器４９から供給される信号を選択したときに
は、平均化回路４８には平均ステップ・サイズに正定数
δを乗算したものが帰還されることになる。The output of the averaging circuit 48 is transmitted to the multiplier 5 and simultaneously supplied to the multiplier 49. In the multiplier 49, the output signal of the averaging circuit 48 is multiplied by a positive constant δ and then transmitted to the selector 41. The selector 41 has another positive constant β ₀
Are also supplied, and one of them is selected by a signal from the selector 45 and transmitted to the averaging circuit 48. Selector 4
When 1 selects the signal supplied from the multiplier 49, the averaging circuit 48 feeds back the value obtained by multiplying the average step size by a positive constant δ.

【０１０３】図２０は平均化回路４８の具体例である。
基本構成及び動作は図１８で説明した平均化回路４７と
同じである。図２０の平均化回路４８では、平均化の時
定数を決定する乗算器７５及び７９がそれぞれ３０１及
び３０２に置換されている。これによって、乗算器３０
１，３０２の乗数は入力端子３００を経て外部から供給
される値を用いることができる。FIG. 20 shows a specific example of the averaging circuit 48.
The basic configuration and operation are the same as those of the averaging circuit 47 described with reference to FIG. In the averaging circuit 48 of FIG. 20, the multipliers 75 and 79 for determining the averaging time constant are replaced by 301 and 302, respectively. Thereby, the multiplier 30
As the multiplier of 1,302, a value supplied from the outside via the input terminal 300 can be used.

【０１０４】ステップ・サイズを、過去のステップ・サ
イズを時定数とした平均回路を用いて計算すると、同定
しようとする未知システムの特性が急変して、誤差信号
が急増した場合などに不都合が生じる。このような場合
にはステップ・サイズを急激に大きくして未知システム
特性の変化に適応フィルタを追随させなければならな
い。しかし、ステップ・サイズの値が大きな時定数で平
均化されていると緩やかにしか変化することができず、
システム変動への追随特性が劣化する。図１９の実施例
では時定数がステップ・サイズを用いて計算され、ステ
ップ・サイズが小さい、すなわち収束状態において時定
数が大きくなる。そこで本発明では、同定しようとする
未知システムの特性急変を誤差変動検出回路で検出し、
平均化の時定数を小さく設定する。If the step size is calculated by using an averaging circuit using the past step size as a time constant, the characteristics of the unknown system to be identified are suddenly changed, causing an inconvenience when the error signal suddenly increases. . In such a case, the adaptive filter must follow the change in the unknown system characteristic by rapidly increasing the step size. However, if the value of the step size is averaged with a large time constant, it can only change slowly,
The characteristic of following the system fluctuation is deteriorated. In the embodiment of FIG. 19, the time constant is calculated using the step size, and the step size is small, that is, the time constant is large in the convergence state. Therefore, in the present invention, a sudden change in the characteristic of an unknown system to be identified is detected by an error variation detection circuit,
Set a smaller time constant for averaging.

【０１０５】誤差変動検出回路４２の一構成例は、図１
０に示したものと同じである。入力端子５０には誤差信
号が供給されており、これは乗算器５１で２乗された
後、セレクタ５２と比較回路５７に伝達される。セレク
タ５２の別の入力には０が供給されており、カウンタ５
３の出力によっていずれかが選択され、最大値回路５４
へ供給される。最大値回路５４の出力は遅延素子５５を
介して最大値回路５４の別の入力に帰還されている。カ
ウンタ５３は予め定められた整数Ｎ_Cまでカウントアッ
プを続け、セレクタ５２が乗算器５１から供給された信
号を選択するような制御信号をセレクタ５２へ供給す
る。従って、乗算器５１からセレクタ５２、最大値回路
５４を経て遅延素子５５によって閉じる帰還回路は、一
番目からＮ_C番目のサンプルの最大値を検出して保存す
ることになる。Ｎ_C番目以降のサンプルが入力されると
セレクタ５２は０を選択して最大値回路５４へ伝達する
ので、最大値回路５４の出力は遅延素子５５から供給さ
れる信号、すなわち一番目からＮ_C番目までのサンプル
の最大値となり、この信号が乗算器５６へ伝達される。
乗算器５６では最大値回路５４から供給された最大値に
定数ｅ_thが乗算されて比較器５７へ伝達される。一方、
比較器５７の他の入力端子には乗算器５１の出力である
誤差信号の２乗値が供給されている。比較回路５７は、
誤差信号の２乗値が大きいときは１を、それ以外のとき
は０を出力し、出力端子５８へ伝達する。One example of the configuration of the error fluctuation detection circuit 42 is shown in FIG.
It is the same as that shown in FIG. An error signal is supplied to an input terminal 50, which is squared by a multiplier 51 and then transmitted to a selector 52 and a comparison circuit 57. 0 is supplied to another input of the selector 52 and the counter 5
3 is selected according to the output of the maximum value circuit 54.
Supplied to The output of the maximum value circuit 54 is fed back to another input of the maximum value circuit 54 via the delay element 55. The counter 53 continues counting up to a predetermined integer N _C , and supplies a control signal to the selector 52 so that the selector 52 selects the signal supplied from the multiplier 51. Accordingly, the feedback circuit closed by the delay element 55 from the multiplier 51 through the selector 52 and the maximum value circuit 54 detects and stores the maximum value of the first to N _c -th samples. Since the N _C -th sample is the input selector 52 is transmitted to the maximum value circuit 54 to select the 0, N _C output of maximum value circuit 54 is the signal supplied from the delay element 55, i.e. from a th This signal becomes the maximum value of the samples up to the nth sample, and this signal is transmitted to the multiplier 56.
In the multiplier 56, the maximum value supplied from the maximum value circuit 54 is multiplied by a constant e _th and transmitted to the comparator 57. on the other hand,
The other input terminal of the comparator 57 is supplied with the square value of the error signal output from the multiplier 51. The comparison circuit 57
When the square value of the error signal is large, 1 is output, and otherwise, 0 is output and transmitted to the output terminal 58.

【０１０６】出力端子５８へ供給された信号は誤差変動
検出回路４２の出力として、図１９のカウンタ４４とセ
レクタ４５に供給される。セレクタ４５には遅延素子４
６からの帰還信号も供給されている。カウンタ４４は誤
差信号検出回路４２の出力が０から１に変化してからカ
ウントアップを開始し、カウントが１のときは誤差変動
検出回路４２の出力を、カウントが２から外部から供給
されるしきい値ｋ_thに達するまでは遅延素子４６から供
給される信号を、セレクタ４５が選択して出力するよう
に制御する。従って、カウンタ４４では誤差信号検出回
路４２の出力が０から１に変化してからｋ_thクロックの
間は、セレクタ４５の出力としては１が得られる。セレ
クタ４５の出力はセレクタ４１を制御する。セレクタ４
１は制御信号として０が供給されたときは乗算器４９か
らの信号を、１が供給されたときは正の定数β₀を選択
して出力する。従って、誤差信号に変動が検出されてか
らｋ_thクロックの間はβ₀が、それ以外は平均化回路４
８で平均化された後、乗算器４９でδ倍されたステップ
・サイズが平均化回路４８に供給されることになる。The signal supplied to the output terminal 58 is supplied to the counter 44 and the selector 45 shown in FIG. The selector 45 has a delay element 4
6 is also supplied. The counter 44 starts counting up after the output of the error signal detection circuit 42 changes from 0 to 1, and when the count is 1, the output of the error fluctuation detection circuit 42 is supplied from the count 2 to the outside. Until the threshold value k _th is reached, the selector 45 selects and outputs the signal supplied from the delay element 46. Therefore, in the counter 44, 1 is obtained as the output of the selector 45 during the k _th clock after the output of the error signal detection circuit 42 changes from 0 to 1. The output of the selector 45 controls the selector 41. Selector 4
1 is a signal from the multiplier 49 when 0 is supplied as a control signal, and a positive constant β ₀ is selected and output when 1 is supplied. Therefore, β ₀ is provided during the k _th clock after a change is detected in the error signal, and otherwise, the averaging circuit 4
After the averaging in step 8, the step size multiplied by δ in the multiplier 49 is supplied to the averaging circuit 48.

【０１０７】既に説明したように、ＬＩＭとＬＭＳの違
いはステップ・サイズμをアダプティブ・フィルタ３に
入力される平均電力σ_n ²で割ったものをαの代りに使用
することなので、これまで説明してきたステップ・サイ
ズを可変にする方法はそのまま適用することができる。As described above, the difference between LIM and LMS is that the value obtained by dividing the step size μ by the average power σ _n ² input to the adaptive filter 3 is used instead of α, The method of making the step size variable can be applied as it is.

【０１０８】[0108]

【発明の効果】以上詳細に述べたように、本発明によれ
ば、係数更新に用いるステップ・サイズを誤差信号電力
の傾きを用いて計算する際に、得られたステップ・サイ
ズの変化量に過去のステップ・サイズに依存した制限を
設け、雑音等の妨害によってステップ・サイズが正しい
値から著しく離れてしまうことを防止すると同時に、同
定誤差信号のパワーを監視して同定対象の未知システム
の特性が急変動したことを検知し、ステップ・サイズを
リセットすることによって、高速収束と低同定誤差を両
立させた適応フィルタによる未知システム同定の方法及
び装置を提供することができる。As described above in detail, according to the present invention, when the step size used for updating the coefficient is calculated by using the slope of the error signal power, the step size change amount obtained is calculated. Set a limit depending on the past step size to prevent the step size from deviating significantly from the correct value due to interference such as noise, and at the same time, monitor the power of the identification error signal to monitor the characteristics of the unknown system to be identified. By detecting a sudden change in the threshold value and resetting the step size, it is possible to provide a method and apparatus for identifying an unknown system using an adaptive filter that achieves both high-speed convergence and low identification error.

【０１０９】また本発明によれば、同定誤差信号のパワ
ーを監視して同定対象の未知システムの特性が急変動し
たことを検知し、ステップ・サイズの制限を除外するこ
とによって、高速収束と低同定誤差を両立させた適応フ
ィルタによる未知システム同定の方法及び装置を提供す
ることができる。Further, according to the present invention, the power of the identification error signal is monitored to detect a sudden change in the characteristics of the unknown system to be identified. It is possible to provide a method and an apparatus for identifying an unknown system by using an adaptive filter that is compatible with the identification error.

【０１１０】さらに本発明によれば、係数更新に用いる
ステップ・サイズを誤差信号電力の傾きを用いて計算す
る際に、得られたステップ・サイズを平均化してから用
いることで、雑音等の妨害によってステップ・サイズが
正しい値から著しく離れてしまうことを防止することに
よって高速収束と低同定誤差を両立させた適応フィルタ
による未知システム同定の方法及び装置を提供すること
ができる。Further, according to the present invention, when calculating the step size used for updating the coefficient by using the slope of the error signal power, the obtained step size is averaged before use, so that interference such as noise is prevented. Thus, it is possible to provide a method and apparatus for identifying an unknown system using an adaptive filter that achieves both high-speed convergence and low identification error by preventing the step size from remarkably deviating from a correct value.

【０１１１】さらに、得られたステップ・サイズを平均
化する際にその時定数を得られた平均ステップ・サイズ
を用いて制御し、同定誤差信号のパワーを監視して同定
対象の未知システムの特性が急変動したことを検知して
平均化の時定数を小さい値に設定することによって、高
速収束と低同定誤差を両立させた適応フィルタによる未
知システム同定の方法及び装置を提供することができ
る。Further, when averaging the obtained step sizes, the time constant is controlled using the obtained average step size, and the power of the identification error signal is monitored to determine the characteristic of the unknown system to be identified. By detecting a sudden change and setting the time constant of the averaging to a small value, it is possible to provide a method and apparatus for identifying an unknown system using an adaptive filter that achieves both high-speed convergence and low identification error.

[Brief description of the drawings]

【図１】従来例を示すブロック図である。FIG. 1 is a block diagram showing a conventional example.

【図２】他の従来例を示すブロック図である。FIG. 2 is a block diagram showing another conventional example.

【図３】ステップ・サイズ・コントローラの一例を示す
ブロック図である。FIG. 3 is a block diagram illustrating an example of a step size controller.

【図４】相関計算回路の一例を示すブロック図である。FIG. 4 is a block diagram illustrating an example of a correlation calculation circuit.

【図５】リミッタの従来の構成を示すブロック図であ
る。FIG. 5 is a block diagram showing a conventional configuration of a limiter.

【図６】最大値回路及び最小値回路の一例を示すブロッ
ク図である。FIG. 6 is a block diagram illustrating an example of a maximum value circuit and a minimum value circuit.

【図７】本発明の一実施例を示すブロック図である。FIG. 7 is a block diagram showing one embodiment of the present invention.

【図８】リミッタの一例を示すブロック図である。FIG. 8 is a block diagram illustrating an example of a limiter.

【図９】ステップ・サイズ・コントローラの他の例を示
すブロック図である。FIG. 9 is a block diagram showing another example of the step size controller.

【図１０】誤差変動検出回路の一例を示すブロック図で
ある。FIG. 10 is a block diagram illustrating an example of an error fluctuation detection circuit.

【図１１】誤差変動検出回路の他の例を示すブロック図
である。FIG. 11 is a block diagram showing another example of the error fluctuation detection circuit.

【図１２】本発明の他の実施例を示すブロック図であ
る。FIG. 12 is a block diagram showing another embodiment of the present invention.

【図１３】本発明の一実施例を示すブロック図である。FIG. 13 is a block diagram showing one embodiment of the present invention.

【図１４】リミッタの一例を示すブロック図である。FIG. 14 is a block diagram illustrating an example of a limiter.

【図１５】リミッタの他の例を示すブロック図である。FIG. 15 is a block diagram showing another example of the limiter.

【図１６】本発明の一実施例を示すブロック図である。FIG. 16 is a block diagram showing one embodiment of the present invention.

【図１７】本発明の一実施例を示すブロック図である。FIG. 17 is a block diagram showing one embodiment of the present invention.

【図１８】平均化回路の一例を示すブロック図である。FIG. 18 is a block diagram illustrating an example of an averaging circuit.

【図１９】本発明の他の例を示すブロック図である。FIG. 19 is a block diagram showing another example of the present invention.

【図２０】平均化回路の他の例を示すブロック図であ
る。FIG. 20 is a block diagram showing another example of the averaging circuit.

[Explanation of symbols]

１主入力端子２参照入力端子３アダプティブ・フィルタ４減算器５乗算器６出力端子８ステップ・サイズ・コントローラ９リミッタ１０遅延素子４１セレクタ４２誤差変動検出回路４４カウンタ４５セレクタ４６遅延素子４７，４８平均化回路４９乗算器 DESCRIPTION OF SYMBOLS 1 Main input terminal 2 Reference input terminal 3 Adaptive filter 4 Subtractor 5 Multiplier 6 Output terminal 8 Step size controller 9 Limiter 10 Delay element 41 Selector 42 Error fluctuation detection circuit 44 Counter 45 Selector 46 Delay element 47, 48 Average Circuit 49 Multiplier

フロントページの続き (56)参考文献特開平３−71726（ＪＰ，Ａ) 特開平２−298119（ＪＰ，Ａ) 特開平２−288718（ＪＰ，Ａ) 特開平２−65310（ＪＰ，Ａ) 特開平１−212130（ＪＰ，Ａ) 特開平１−212129（ＪＰ，Ａ) 特開昭63−228817（ＪＰ，Ａ) 特開昭63−126330（ＪＰ，Ａ) 特開昭59−22430（ＪＰ，Ａ) (58)調査した分野(Int.Cl.⁶，ＤＢ名) H03H 21/00 H04B 3/04 - 3/23 G05B 13/00 - 13/04 Continuation of the front page (56) References JP-A-3-71726 (JP, A) JP-A-2-298119 (JP, A) JP-A-2-288718 (JP, A) JP-A-2-65310 (JP) JP-A-1-212130 (JP, A) JP-A-1-212129 (JP, A) JP-A-63-228817 (JP, A) JP-A-63-126330 (JP, A) 59-22430 (JP, A) (58) Fields investigated (Int. Cl. ⁶ , DB name) H03H 21/00 H04B 3/04-3/23 G05B 13/00-13/04

Claims

(57) [Claims]

An output of an unknown system is obtained by multiplying a plurality of input signal samples delayed by one sample period by a plurality of multiplicands corresponding to the input signal samples and outputting the sum of the multiplication results as an output. In order to reduce the difference signal subtracted from the signal, a value obtained by multiplying the difference signal by the input signal sample and a predetermined first constant is added to the multiplicand as an update amount per time, and the value is added. When approximating the unknown system by updating, a value proportional to the slope of the difference signal with respect to the first constant is added to the first constant to obtain a sum, and the sum is limited. An unknown system using an adaptive filter, wherein the first constant is changed by using a sum, and a threshold value for applying the limit is obtained by using the past sum of the limits. The method of identification.

2. An output of an unknown system, wherein a plurality of input signal samples delayed by one sample period are multiplied by a plurality of multiplicands corresponding thereto, and an output of an adaptive filter which outputs the sum of the multiplication results is output from an unknown system. In order to reduce the difference signal subtracted from the signal, a value obtained by multiplying the difference signal by the input signal sample and a predetermined first constant is added to the multiplicand as an update amount per time, and the value is added. When approximating the unknown system by updating, add a value proportional to a slope of the difference signal with respect to the first constant to the first constant to obtain a sum, and the difference signal has a fluctuation. Is detected, the sum is replaced with a predetermined second constant, the first constant is changed using a limited sum obtained by adding a limit to the sum, and the limit is added. Threshold the method of the unknown system identification by the adaptive filter, characterized by determining using the restricted sum of the past.

3. The output of an unknown system, wherein a plurality of input signal samples delayed by one sample period are multiplied by a plurality of multiplicands corresponding thereto, and an output of an adaptive filter which outputs the sum of the multiplication results is output from an unknown system. In order to reduce the difference signal subtracted from the signal, a value obtained by multiplying the difference signal by the input signal sample and a predetermined first constant is added to the multiplicand as an update amount per time, and the value is added. When approximating the unknown system by updating, a value proportional to the slope of the difference signal with respect to the first constant is added to the first constant to obtain a sum. The limited sum is obtained, and when it is detected that there is a change in the difference signal, the limited sum is replaced with a predetermined second constant, and the first constant is replaced with the replaced limited sum. Varying the threshold for applying the limit process of the unknown system identification by the adaptive filter, characterized by determining using the restricted sum of the past.

4. A method for detecting a variation of a difference signal, comprising calculating a square value of the difference signal, and calculating a maximum value from all the square values until the number of clocks after the start of system identification reaches a predetermined third constant. 4. A method for identifying an unknown system by an adaptive filter according to claim 2, wherein a value is obtained, and a product obtained by multiplying the maximum value by a predetermined fourth constant is compared with the square value one by one. Method.

5. A method for detecting a change in a difference signal, comprising calculating an absolute value of the difference signal, and calculating a maximum value from all the absolute values until the number of clocks after the start of system identification reaches a predetermined third constant. 4. The method for identifying an unknown system by an adaptive filter according to claim 2, wherein the absolute value is obtained by comparing the absolute value with a product obtained by multiplying the maximum value by a predetermined fourth constant.

6. The restricted sum is obtained by comparing a value obtained by multiplying the past restricted sum by a predetermined fifth constant with a predetermined sixth constant and the sum, and 6. The method for identifying an unknown system using an adaptive filter according to claim 1, wherein the restricted sum is obtained by:

7. The restricted sum is obtained by comparing a value obtained by multiplying a past restricted sum by a predetermined seventh constant with a predetermined eighth constant and the sum, and calculating a maximum value. 6. The method for identifying an unknown system using an adaptive filter according to claim 1, wherein the restricted sum is obtained by:

8. The restricted sum is obtained by comparing a value obtained by multiplying the past restricted sum by a predetermined fifth constant with a predetermined sixth constant and the sum. A value obtained by multiplying the obtained minimum value and the past limited sum by a predetermined seventh constant is compared with a predetermined eighth constant, and the maximum value is used as the limited sum. 6. The method for identifying an unknown system using an adaptive filter according to claim 1, 4 or 5.

9. A subtracter for obtaining a difference signal by subtracting an output of the adaptive filter from an output signal of the unknown system when identifying a characteristic of the unknown system using the adaptive filter; A step size controller for sequentially calculating a step size used for updating the coefficient of the adaptive filter in response to the input signal of the adaptive filter, a limiter for receiving the output of the step size controller to apply a limit, A first delay element for feeding back an output to a limiter; and a first multiplier for multiplying the limiter output and the difference signal, wherein an output of the first multiplier is an output of the adaptive filter. Unknown by adaptive filter characterized by use as step size of coefficient update Apparatus of the stem identification.

10. A subtractor for obtaining a difference signal by subtracting an output of an adaptive filter from an output signal of an unknown system when identifying a characteristic of the unknown system using an adaptive filter. An error variation detection circuit for detecting a variation of a signal, a step size controller for receiving the difference signal and an input signal of the adaptive filter, and sequentially calculating a step size used for updating a coefficient of the adaptive filter, A limiter that receives an output of the step size controller to apply a limit, and receives the output of the limiter and the second constant, and selects and outputs one according to the output of the error variation detection circuit. A selector; a second delay element for feeding back the output of the first selector to the limiter; At least a first multiplier for multiplying an output and the difference signal, wherein an output of the first multiplier is used as a step size for updating a coefficient of the adaptive filter. Equipment for system identification.

11. A step size controller comprising: a third delay element for receiving a difference signal and delaying it by one sample period; and a second multiplier for multiplying the output of the third delay element by the difference signal. , A correlation calculation circuit for receiving the input signal of the adaptive filter and calculating the correlation, a third multiplier for multiplying the output of the correlation calculation circuit by the output of the second multiplier, and the output of the third multiplier. A fourth multiplier for multiplying by a constant, and an adder for adding the output of the fourth multiplier and the output of the fourth delay element, wherein the fourth delay element
11. The apparatus according to claim 9, wherein the output of the adder is delayed before being fed back to the adder.

12. A step size controller, comprising: an error variation detecting circuit for receiving a difference signal and detecting a variation of the difference signal; a third delay element for receiving the difference signal and delaying it by one sample period; A second multiplier that multiplies a third delay element output by the difference signal, a correlation calculation circuit that receives an input signal of the adaptive filter and calculates a correlation,
A third multiplier for multiplying the output of the correlation calculating circuit by the output of the second multiplier, a fourth multiplier for multiplying the output of the third multiplier by a constant, And an adder for adding the delay element outputs of the second and fourth delay elements.
And a second selector for selecting and outputting one according to the output of the error fluctuation detection circuit in response to the constant of the above-mentioned error variation detection circuit, wherein the fourth delay element delays the output of the second selector. 10. The apparatus for identifying an unknown system using an adaptive filter according to claim 9, wherein the apparatus returns to the adder.

13. A fifth multiplier for receiving the difference signal and squaring the difference signal, and receiving the output of the fifth multiplier and 0 to select one of them according to a counter output. , A first maximum value circuit that receives the third selector output and the fifth delay element output and outputs a maximum value, and an output of the first maximum value circuit and a predetermined fourth value
And a comparison circuit that compares the output of the sixth multiplier with the output of the fifth multiplier and outputs information indicating which is larger, 13. The adaptive filter according to claim 10, wherein the delay element receives the output of the first maximum value circuit, delays it by one sample clock, and then feeds back the signal to the first maximum value circuit. For unknown system identification.

14. An error fluctuation detecting circuit comprising: an absolute value circuit for obtaining an absolute value of a difference signal; a third selector which receives an output of the absolute value circuit and 0 and selects one of them according to a counter output; A first maximum value circuit that receives the third selector output and the fifth delay element output and outputs a maximum value, and a first multiplication circuit that multiplies the output of the first maximum value circuit by a predetermined fourth constant. And a comparison circuit that compares the output of the sixth multiplier with the output of the fifth multiplier and outputs information indicating which is larger, and the fifth delay element is 13. The apparatus for identifying an unknown system by an adaptive filter according to claim 10, wherein the output of the first maximum value circuit is delayed by one sample clock and then fed back to the first maximum value circuit.

15. A seventh multiplier for receiving a feedback signal and multiplying by a predetermined fifth constant, receiving a seventh multiplier output, an input signal, and the sixth constant. 13. The apparatus for identifying an unknown system by an adaptive filter according to claim 9, further comprising a minimum value circuit for detecting a minimum value by using an adaptive filter.

16. An eighth multiplier for receiving a feedback signal and multiplying by a predetermined seventh constant, and receiving an output of the eighth multiplier, an input signal, and the eighth constant. 13. An apparatus for identifying an unknown system by an adaptive filter according to claim 9, further comprising a second maximum value circuit for outputting a maximum value.

17. A seventh multiplier for receiving a feedback signal and multiplying by a predetermined fifth constant, receiving a seventh multiplier output, an input signal, and the sixth constant. A minimum value circuit for detecting a minimum value, an eighth multiplier for receiving the feedback signal and multiplying by a predetermined seventh constant,
13. The circuit according to claim 9, further comprising a second maximum value circuit which receives the output of the eighth multiplier and the input signal and the eighth constant and outputs a maximum value. An unknown system identification device using an adaptive filter.

18. An output of an unknown system, wherein a plurality of input signal samples delayed by one sample period are multiplied by a plurality of multiplicands corresponding thereto, and an output of an adaptive filter which outputs the sum of the multiplication results is output from an unknown system. In order to reduce the difference signal subtracted from the signal, a value obtained by multiplying the difference signal by the input signal sample and a predetermined first constant is added to the multiplicand as an update amount per time, and the value is added. When approximating the unknown system by updating, a value proportional to the slope of the difference signal with respect to the first constant is added to the first constant to obtain a sum, and the sum is limited. An adaptive filter, wherein the first constant is changed by using a sum, and a threshold value for applying the limit is obtained by using a square value of the past sum of the limits. The method of knowledge system identification.

19. An unknown system which multiplies a plurality of input signal samples delayed by one sample period by a plurality of multiplicands corresponding thereto and outputs the output of an adaptive filter as a sum of the multiplication results. In order to reduce the difference signal subtracted from the signal, a value obtained by multiplying the difference signal by the input signal sample and a predetermined first constant is added to the multiplicand as an update amount per time, and the value is added. When approximating the unknown system by updating, add a value proportional to a slope of the difference signal with respect to the first constant to the first constant to obtain a sum, and the difference signal has a fluctuation. Is detected, the sum is replaced with a predetermined second constant, the first constant is changed using a limited sum obtained by adding a limit to the sum, and the limit is added. Threshold 2 of the past of the restricted sum
A method for identifying an unknown system using an adaptive filter, characterized in that the unknown system is obtained using a power value.

20. An output of an unknown system which multiplies a plurality of input signal samples delayed by one sample period by a plurality of multiplicands corresponding thereto and outputs the output of an adaptive filter as a sum of the multiplication results. In order to reduce the difference signal subtracted from the signal, a value obtained by multiplying the difference signal by the input signal sample and a predetermined first constant is added to the multiplicand as an update amount per time, and the value is added. When approximating the unknown system by updating, after adding a value proportional to the slope of the difference signal with respect to the first constant to the first constant to obtain a sum,
A restricted sum obtained by adding a restriction to the sum is obtained, and when it is detected that the difference signal has a change, the restricted sum is replaced with a predetermined second constant, and the replaced restricted sum is used. A first threshold value for changing the first constant, and a threshold value for applying the restriction is obtained by using a square value of the past sum with the restriction.

21. A method for detecting a change in a difference signal, comprising obtaining a square value of the difference signal, and calculating a maximum value from all the square values until the number of clocks after the start of system identification reaches a predetermined third constant. 21. A method for identifying an unknown system by an adaptive filter according to claim 19, wherein a value is obtained, and a product obtained by multiplying the maximum value by a predetermined fourth constant is compared with the square value one by one. Method.

22. Detection of fluctuation of a difference signal finds an absolute value of the difference signal, and calculates a maximum value from all the absolute values until the number of clocks after the start of system identification reaches a predetermined third constant. 21. The method for identifying an unknown system by an adaptive filter according to claim 19, wherein the absolute value is obtained by comparing the absolute value with a product obtained by multiplying the maximum value by a predetermined fourth constant.

23. The restricted sum is obtained by comparing a value obtained by squaring the past restricted sum and then multiplying the sum by a predetermined fifth constant with a predetermined sixth constant. 2. The method according to claim 1, wherein the restricted sum is a minimum value.
23. A method for identifying an unknown system using the adaptive filter according to 8, 21, or 22.

24. The restricted sum is obtained by comparing a value obtained by squaring the past restricted sum and then multiplying the sum by a predetermined seventh constant with a predetermined eighth constant. 2. The method according to claim 1, wherein a maximum value is used as the restricted sum.
23. A method for identifying an unknown system using the adaptive filter according to 8, 21, or 22.

25. The restricted sum is obtained by multiplying a value obtained by squaring the past restricted sum and then multiplying the sum by a predetermined fifth constant and the predetermined sixth constant and the sum. After squaring the minimum value obtained by the comparison with the past limited sum and multiplying the result by a predetermined seventh constant, a predetermined eighth constant is compared with a predetermined eighth constant. 23. The method for identifying an unknown system using an adaptive filter according to claim 18, wherein the restricted sum is taken as a value.

26. The thresholded sum is obtained by squaring the past limited sum and then multiplying the squared value by a predetermined constant to obtain a threshold value. The sixth
A minimum value obtained by comparing the constant with the sum and the threshold value and a predetermined eighth constant, and the maximum value is used as the limited sum. 2
23. A method for identifying an unknown system using the adaptive filter according to 1 or 22.

27. A subtracter for obtaining a difference signal by subtracting an output of the adaptive filter from an output signal of the unknown system when identifying a characteristic of the unknown system using the adaptive filter, and the difference signal and the adaptive filter. A step size controller for sequentially calculating a step size used for updating the coefficient of the adaptive filter in response to the input signal of the adaptive filter, a limiter for receiving the output of the step size controller to apply a limit, At least a first delay element for feeding back an output to a limiter; and a first multiplier for multiplying the limiter output by the difference signal, wherein an output of the first multiplier is an output of the adaptive filter. Unknown by adaptive filter characterized by use as step size of coefficient update Equipment for system identification.

28. When identifying the characteristics of an unknown system using an adaptive filter, a subtracter for subtracting an output of the adaptive filter from an output signal of the unknown system to obtain a difference signal; An error variation detection circuit for detecting a variation of a signal, a step size controller for receiving the difference signal and an input signal of the adaptive filter, and sequentially calculating a step size used for updating a coefficient of the adaptive filter, A limiter that receives an output of the step size controller to apply a limit, and receives the output of the limiter and the second constant, and selects and outputs one according to the output of the error variation detection circuit. A selector; a second delay element for feeding back the output of the first selector to the limiter; At least a first multiplier for multiplying an output and the difference signal, wherein an output of the first multiplier is used as a step size for updating a coefficient of the adaptive filter. Equipment for system identification.

29. A step size controller, comprising: a third delay element for receiving a difference signal and delaying it by one sample period; and a second multiplier for multiplying the output of the third delay element by the difference signal. , A correlation calculation circuit for receiving the input signal of the adaptive filter and calculating the correlation, a third multiplier for multiplying the output of the correlation calculation circuit by the output of the second multiplier, and the output of the third multiplier. A fourth multiplier for multiplying by a constant, and an adder for adding the output of the fourth multiplier and the output of the fourth delay element, wherein the fourth delay element
29. The apparatus for identifying an unknown system using an adaptive filter according to claim 27, wherein the output of the adder is delayed before being fed back to the adder.

30. An error fluctuation detecting circuit for receiving a difference signal and detecting a change in the difference signal, a third delay element for receiving the difference signal and delaying it by one sample period. A second multiplier that multiplies a third delay element output by the difference signal, a correlation calculation circuit that receives an input signal of the adaptive filter and calculates a correlation,
A third multiplier for multiplying the output of the correlation calculating circuit by the output of the second multiplier, a fourth multiplier for multiplying the output of the third multiplier by a constant, And an adder for adding the delay element outputs of the second and fourth delay elements.
And a second selector for selecting and outputting one according to the output of the error fluctuation detection circuit in response to the constant of the above-mentioned error variation detection circuit, wherein the fourth delay element delays the output of the second selector. 28. The apparatus for identifying an unknown system using an adaptive filter according to claim 27, wherein the apparatus returns to the adder.

31. A fifth multiplier for receiving the difference signal and squaring the difference signal, and receiving the output of the fifth multiplier and 0 to select one of them according to a counter output. , A first maximum value circuit that receives the third selector output and the fifth delay element output and outputs a maximum value, and an output of the first maximum value circuit and a predetermined fourth value
And a comparison circuit that compares the output of the sixth multiplier with the output of the fifth multiplier and outputs information indicating which is larger, 31. The adaptive filter according to claim 28, wherein the fifth delay element receives the output of the first maximum value circuit, delays it by one sample clock, and then feeds back the signal to the first maximum value circuit. For unknown system identification.

32. An error variation detecting circuit comprising: an absolute value circuit for obtaining an absolute value of a difference signal; a third selector which receives an output of the absolute value circuit and 0 and selects one of them according to a counter output; A first maximum value circuit that receives the third selector output and the fifth delay element output and outputs a maximum value, and a first multiplication circuit that multiplies the output of the first maximum value circuit by a predetermined fourth constant. And a comparison circuit that compares the output of the sixth multiplier with the output of the fifth multiplier and outputs information indicating which is larger, and the fifth delay element is 31. The apparatus for identifying an unknown system by an adaptive filter according to claim 28, wherein the output of the first maximum value circuit is delayed by one sample clock and then fed back to the first maximum value circuit.

33. A seventh multiplier for receiving the feedback signal and squaring the same, an eighth multiplier for multiplying the output of the seventh multiplier by a predetermined fifth constant, This 8th
31. An unknown system using an adaptive filter according to claim 27, further comprising a minimum value circuit for detecting a minimum value by receiving a multiplier output, an input signal, and the sixth constant. Identification device.

34. A seventh multiplier for receiving the feedback signal and squaring the same, a ninth multiplier for multiplying the output of the seventh multiplier by a predetermined seventh constant, This ninth
31. The adaptive filter according to claim 27, further comprising a second maximum value circuit that receives a multiplier output, an input signal, and said eighth constant and outputs a maximum value. An unknown system identification device.

35. A seventh multiplier for receiving the feedback signal and squaring the feedback signal, an eighth multiplier for multiplying the output of the seventh multiplier by a predetermined fifth constant, This 8th
A minimum value circuit for detecting the minimum value by receiving the multiplier output and the input signal and the sixth constant, and a ninth multiplier for multiplying the seventh multiplier output by a predetermined seventh constant And a second maximum value circuit for outputting a maximum value in response to the output of the ninth multiplier, the input signal, and the eighth constant, and outputs the maximum value. An apparatus for identifying an unknown system using the adaptive filter described in the above.

36. A limiter for receiving a feedback signal and multiplying the feedback signal by a fifth constant, and an eleventh multiplier for multiplying the output of the tenth multiplier by the feedback signal.
A minimum value circuit for detecting a minimum value by receiving the output of the eleventh multiplier, the input signal, and the sixth constant, the output of the eleventh multiplier, the input signal, and the eighth constant 31. The apparatus for identifying an unknown system by an adaptive filter according to claim 27, further comprising a second maximum value circuit that outputs a maximum value in response to the received signal.

37. A multiplication of a plurality of input signal samples delayed by one sample period with a plurality of multiplicands corresponding thereto, and an output of an adaptive filter which outputs the sum of the multiplication results as an output of the unknown system The unknown system is updated by adding a value obtained by multiplying the difference signal and the input signal sample by a variable to the multiplicand as an update amount so as to reduce the difference signal subtracted from the signal and updating the value. When approximating, a value proportional to the slope of the difference signal with respect to the variable is added to the variable to obtain a sum, and then a restricted sum obtained by adding a limit to the sum is obtained. When it is detected that there is, the limited sum with the sum by the number of clocks equal to a predetermined first constant, the variable is changed using this limited sum, Unknown system identification method according to the adaptive filter threshold for adding a serial limit, characterized in that obtained by using the restricted sum of the past.

38. Detection of fluctuation of a difference signal finds a square value of the difference signal, and calculates a maximum value from all the square values until the number of clocks after the start of system identification reaches a predetermined second constant. 38. The method of identifying an unknown system by an adaptive filter according to claim 37, wherein a value is obtained, and a product obtained by multiplying the maximum value by a predetermined third constant is compared with the square value one by one.

39. The restricted sum is obtained by multiplying a value obtained by squaring the past restricted sum and then multiplying the sum by a predetermined fourth constant, and a predetermined fifth constant and the sum. After squaring the minimum value obtained by the comparison with the past limited sum and multiplying by a predetermined sixth constant, the value obtained by multiplying by a predetermined seventh constant is compared with a predetermined seventh constant. 38. The method for identifying an unknown system by using an adaptive filter according to claim 37, wherein the value is used as the restricted sum.

40. When identifying characteristics of an unknown system using an adaptive filter, a subtractor for subtracting an output of the adaptive filter from an output signal of the unknown system to obtain a difference signal; An error variation detection circuit for detecting a variation of the difference signal; a counter for counting a clock in response to an output of the error variation detection circuit;
A first selector that receives the output of the delay element and selects and outputs one of them according to the output of the counter; and a step that receives the difference signal and the input signal of the adaptive filter and is used for updating the coefficient of the adaptive filter. A step size controller for sequentially calculating the size; a limiter receiving the output of the step size controller to apply a limit; and receiving the output of the limiter and the output of the step size controller, the first selector. A second selector for selecting and outputting one of them according to an output; a second delay element for feeding back the second selector output to the limiter; A first multiplier for multiplying the output of the first selector, wherein the first delay element delays the output of the first selector. Fed back to the input of said first selector from said first
An apparatus for identifying an unknown system by an adaptive filter, wherein an output of the multiplier is used as a step size for updating a coefficient of the adaptive filter.

41. A step size controller comprising: a third delay element for receiving a difference signal and delaying it by one sample period; and a second multiplier for multiplying the output of the third delay element by the difference signal. , A correlation calculation circuit for receiving the input signal of the adaptive filter and calculating the correlation, a third multiplier for multiplying the output of the correlation calculation circuit by the output of the second multiplier, and the output of the third multiplier. A fourth multiplier for multiplying by a constant, and an adder for adding the output of the fourth multiplier and the output of the fourth delay element, wherein the fourth delay element
41. The apparatus for identifying an unknown system using an adaptive filter according to claim 40, wherein the output of the adder is delayed before being fed back to the adder.

42. A fifth multiplier for receiving the difference signal and squaring the difference signal, and receiving the output of the fifth multiplier and 0 to select one of them according to a counter output. , A first maximum value circuit that receives the third selector output and the fifth delay element output and outputs a maximum value, and an output of the first maximum value circuit and a predetermined third value.
And a comparison circuit that compares the output of the sixth multiplier with the output of the fifth multiplier and outputs information indicating which is larger, 42. The unknown element according to claim 41, wherein the delay element receives the output of the first maximum value circuit, delays it by one sample clock, and then feeds back to the first maximum value circuit. Equipment for system identification.

43. A seventh multiplier for receiving the feedback signal and squaring the same, an eighth multiplier for multiplying the output of the seventh multiplier by a predetermined fourth constant, This 8th
A minimum value circuit for detecting the minimum value by receiving the output of the multiplier and the input signal and the fifth constant, and a ninth multiplier for multiplying the output of the seventh multiplier by a predetermined sixth constant 43. The unknown by the adaptive filter according to claim 42, further comprising a second maximum value circuit that receives the output of the ninth multiplier, the input signal, and the seventh constant and outputs a maximum value. Equipment for system identification.

44. An output of an unknown system in which a plurality of input signal samples delayed by one sample period are multiplied by a plurality of multiplicands corresponding thereto, and an output of an adaptive filter which outputs the sum of the multiplication results is output from an unknown system. The unknown system is updated by adding a value obtained by multiplying the difference signal and the input signal sample by a variable to the multiplicand as an update amount so as to reduce the difference signal subtracted from the signal and updating the value. Is approximated, a value proportional to the slope of the difference signal with respect to the variable is added to the variable to obtain a sum, and then the sum is restricted to obtain a restricted sum, and the average of the restricted sum is calculated. A method of identifying an unknown system by an adaptive filter, which obtains a value and uses the value as an operation variable.

45. The time constant of the averaging operation is obtained by using the average value, and when it is detected that the difference signal fluctuates, the time constant is replaced with an initial value of the variable. A method for identifying an unknown system using the adaptive filter described above.

46. A method for detecting a change in a difference signal, comprising obtaining a square value of the difference signal, and calculating a maximum value from all the square values until the number of clocks after the start of system identification reaches a predetermined first constant. 46. The method for identifying an unknown system by an adaptive filter according to claim 45, wherein a value is obtained, and a product obtained by multiplying the maximum value by a predetermined second constant is compared with the square value one by one.

47. The fluctuation detection of a difference signal calculates an absolute value of the difference signal, and calculates a maximum value from all the absolute values until the number of clocks after the start of system identification reaches a predetermined first constant. The method for identifying an unknown system by an adaptive filter according to claim 45, wherein the absolute value is obtained by comparing the absolute value with a product obtained by multiplying the maximum value by a predetermined second constant.

48. A subtractor for obtaining a difference signal by subtracting an output of the adaptive filter from an output signal of the unknown system when identifying a characteristic of the unknown system using the adaptive filter; A step size controller for sequentially calculating a step size used for updating the coefficient of the adaptive filter in response to the input signal of the adaptive filter, a limiter for receiving the output of the step size controller to apply a limit, At least an averaging circuit for receiving the output and calculating an average value, wherein the output of the averaging circuit is used as a step size for updating the coefficient of the adaptive filter. apparatus.

49. When identifying characteristics of an unknown system using an adaptive filter, a subtracter for subtracting an output of the adaptive filter from an output signal of the unknown system to obtain a difference signal; An error fluctuation detection circuit that detects a fluctuation of the difference signal; a counter that receives an output of the error fluctuation detection circuit and counts a clock; receives the error fluctuation detection circuit output and a first delay element output and outputs the counter output to the counter output. A first selector for selecting and outputting any one of them in accordance with a difference between the difference signal and the input signal of the adaptive filter, and sequentially calculating a step size used for updating the coefficient of the adaptive filter. A controller, a limiter that receives the output of the step size controller to apply a limit, and a An averaging circuit that receives the output of the averaging circuit and calculates an average value; and selects and outputs one of the output of the averaging circuit and a predetermined third constant according to the output of the first selector. An apparatus for identifying an unknown system using an adaptive filter, comprising at least a second selector, wherein an output of the averaging circuit is used as a step size for updating a coefficient of the adaptive filter.

50. A step size controller, comprising: a third delay element that receives a difference signal and delays it by one sample period; and a second multiplier that multiplies the third delay element output by the difference signal. , A correlation calculation circuit for receiving the input signal of the adaptive filter and calculating the correlation, a third multiplier for multiplying the output of the correlation calculation circuit by the output of the second multiplier, and the output of the third multiplier. A fourth multiplier for multiplying by a constant, and an adder for adding the output of the fourth multiplier and the output of the fourth delay element, wherein the fourth delay element
50. The apparatus for identifying an unknown system using an adaptive filter according to claim 48 or 49, wherein the output of the adder is delayed before being fed back to the adder.

51. A fifth multiplier for receiving the difference signal and squaring the difference signal, and receiving the output of the fifth multiplier and 0 to select one of them according to a counter output. Selector, a first maximum value circuit that receives the third selector output and the fifth delay element output and outputs a maximum value, and an output of the first maximum value circuit and a predetermined fifth value.
And a comparison circuit that compares the output of the sixth multiplier with the output of the fifth multiplier and outputs information indicating which is larger, 5 delay elements receive the output of the first maximum value circuit and
50. The apparatus for identifying an unknown system using an adaptive filter according to claim 48, wherein the signal is fed back to the first maximum value circuit after delaying the sample clock.

52. An error variation detecting circuit for receiving an absolute value by receiving a difference signal, and a third selector for selecting one of the absolute value detecting circuit based on an output of the absolute value detecting circuit and a counter output. A first maximum value circuit that receives the third selector output and the fifth delay element output and outputs a maximum value, and outputs the first maximum value circuit and a predetermined fifth constant. A sixth multiplier for multiplying, and a comparing circuit for comparing the output of the sixth multiplier with the output of the absolute value detection circuit and outputting information of which is larger,
50. The device according to claim 48, wherein the fifth delay element receives the output of the first maximum value circuit, delays it by one sample clock, and then feeds back to the first maximum value circuit.
10. An apparatus for identifying an unknown system using the adaptive filter according to 9.

53. A limiter circuit for detecting a minimum value by receiving an input signal and said sixth constant, and a limiter for outputting a maximum value by receiving an output of said minimum value circuit and said seventh constant. 50. The apparatus for identifying an unknown system by an adaptive filter according to claim 48, wherein the apparatus is constituted by two maximum value circuits.

54. An averaging circuit comprising: a first output to a limiter output;
A fifth multiplier for multiplying the output of the fifth multiplier, a second adder for adding the output of the fifth multiplier and the output of the sixth multiplier and outputting the result as an average value, and the output of the second adder. And a sixth delay element for receiving and delaying one clock. The sixth multiplier multiplies the output of the sixth delay element by an eighth constant and feeds it back to the second adder. 49. An apparatus for identifying an unknown system using an adaptive filter according to claim 48.

55. The averaging circuit according to claim 35, wherein a second output is provided to a limiter output.
A seventh multiplier that multiplies the output of the second multiplier, a second adder that adds the seventh multiplier output and the eighth multiplier output and outputs an average value, A sixth delay element for receiving and delaying one clock. The eighth multiplier multiplies the output of the sixth delay element by a third variable and feeds back the signal to the second adder. 50. The apparatus for identifying an unknown system using an adaptive filter according to claim 49, wherein the second and third variables are obtained using a feedback signal from the selector 41.