JP3088395B2 - Switch interrupt processing circuit and switch interrupt processing method - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a processing circuit of a mechanical switch, and more particularly to an interrupt processing circuit of a momentary type mechanical switch and a method of processing the interrupt.

[0002]

BACKGROUND ART Information processing apparatus, control devices, home appliances or in the operation portion or the like of the industrial equipment, etc., to operate the machine switches to a human, to which the apparatus is triggered to perform the desired operation It is widely and generally done. For that purpose, the CPU built into the device from the mechanical switch
It is also a very general method to give an interrupt signal to Conventionally, when an interrupt signal to a CPU is generated using a mechanical switch, chattering occurs due to mechanical vibration of a contact when the mechanical switch is operated, and there has been a problem that normal interrupt processing cannot be performed by the CPU.
Initially, chattering generated from mechanical switches was suppressed by a chattering prevention circuit using a logic circuit or an integrating circuit using a CR.

After that, a switch interrupt processing circuit for preventing such chattering is disclosed in, for example,
No. 83643 is disclosed. A conventional switch interrupt processing circuit will be described. FIG. 5 is a block diagram of a conventional switch interrupt processing circuit. Conventional switch interrupt processing circuitry, mechanical switch (S for interrupt signal generation via the interrupt processing interface 120 to split Ri inclusive signal input terminal INT111 the CPU110
W) 130 is connected. In addition, mechanical switch 1
30 is also connected to the input port IP 112 of the CPU 110. The interrupt interface 120 includes a latch unit 121 and a reset unit 122.
A mechanical switch 130 is connected to the input terminal A of the latch unit 121.
However, the output terminal Q is connected to the interrupt input terminal I of the CPU 110.
NT111 is connected. Also, the reset unit 122
The input terminal I is connected to the interrupt input reset terminal 113 of the CPU 110, and the output terminal O is connected to the reset terminal R of the latch unit 121. Further, the latch unit 12
1, the potential of the input terminal A is always set to a level of +5 V by the resistor 140 (when the mechanical switch 130 is not operated).

A switch interrupt processing circuit having such a configuration is described.
The operation of the road will be described. Operation switch 130 is operated
If not, the contact is open and interrupt handling
Input terminal A of the latch section 121 of the
+ 5V via the anti-140, and the logic of the signal MS is Hi
gh. At this time, the output terminal of the latch unit 121
The logic of the state of Q is Low. In this state, the CPU
Reference numeral 110 denotes a state of waiting for interrupt processing. Mechanical switch
When the switch 130 is turned on, the contact is closed and the signal MS
The logic is Low. MS is interrupt interface 1
20, the logic of the output signal Q of the latch unit 121
Is inverted to High and the CPU 110RSignal input
Split to terminal 111RThe input signal INT is input. CPU
110 reads the signal INT and confirms it, and
Input signal to the reset terminal 113.
(Logic High) is output and the interrupt interface 1
20 is reset by a reset signal RES.
Of the signal output to the output terminal Q of the latch unit 121RIncluding
Clear only the signal INT. The above operation is performed using the mechanical switch.
The chattering that occurs when the
Performed every time the logic of the signal MS is inverted from High to Low
It is. That is, the CPU 110 generates chattering.
The falling edge of the signal MS as an effective signal
Repeated reading from interrupt input terminal 111
You.

Next, the operation of the CPU 110 will be described. FIG. 6 is a state transition diagram of conventional switch interrupt processing. When the power is turned on (S11), the power supply is turned off (S12) for performing processing other than the switch interrupt. When the interrupt signal INT is read, the INT is reset (S
13), the state monitoring operation (S14) of the mechanical switch 130 is started by the input port 112. That is, when the signal INT is read, the timing operation starts, and the logic of the input port 112 is read at a constant cycle. If INT is read again before the elapse of this cycle time, the INT is reset (S13), the timing operation up to that time is temporarily cleared, and the timing operation is started again (S1).
4). The cycle of monitoring the state of the mechanical switch 130 is set to be longer than the intermittent cycle of the mechanical switch 130 caused by chattering. During chattering, the signal MS from the input port 112 is output.
Before reading the timing, the restart of the timing operation is repeated, so that the interrupt process is not started. Further, by performing such processing, it is possible to eliminate not only the chattering but also the influence of transient external noise on the signal line.

When the intermittent operation of the signal MS due to the chattering is stopped, the input port 1 is switched after the elapse of the above-described period.
Twelve logics are read (S14). If Low is detected twice, it is determined that an interrupt processing request has been made, and interrupt processing is started (S15). In other cases, the process returns to the beginning, and becomes an off state (S12) in which processes other than the switch interrupt are performed. It is assumed that the logic low of the input port 112 is read twice.
This is a design matter determined by the chattering characteristics of the CPU 30 and the processing speed of the CPU 110.

When the mechanical switch 130 is turned off to terminate the interrupt processing, the MS output from the mechanical switch 130 becomes a signal that rises from logic low to high. This signal is sent to the interrupt processing interface 12
Although it is input to 0, the logic of the output terminal Q is not normally inverted in the latch unit 121. However, since chattering generally occurs when the contact of the mechanical switch 130 is opened, the logic of the output terminal Q of the latch unit 121 is inverted when the MS signal falls due to the chattering, and the CPU 110 is turned on in the same manner as when the mechanical switch 130 is turned on. Of the signal INT to the interrupt signal input terminal 111 is repeated, and the restart of the interrupt process is apparently repeated.

When the interrupt signal INT is read in the ON state (S15) in which the switch interrupt processing is being performed, I
The NT is reset (S16), and the state monitoring operation (S17) of the mechanical switch 130 is started by the input port 112. That is, when the signal INT is read, the timing operation starts, and the logic of the input port 112 is read at a constant cycle. If INT is read again before the elapse of the cycle time, the INT is reset (S16), the timing operation up to that time is temporarily cleared, and the timing operation is started again (S17). When the signal MS is not interrupted due to chattering, the logic of the input port 112 is read when the above-described period has elapsed from that point (S17). High
Is detected twice, it is determined that an interrupt processing end request has been made, and the interrupt processing is turned off (S12).
The number of times the mechanical switch 130 is monitored by the input port 112 at the end of the interrupt processing is a design matter as in the above-described case of the start of the interrupt processing, but is usually set to the same number as that at the start of the interrupt processing. .

Japanese Patent Laid-Open No. 7-65664 discloses that a dedicated state machine is provided instead of periodically monitoring a state by a program, and processing of a required function is executed only when the logic of a mechanical switch becomes constant for a certain period of time . Such an example is also known.

[0010]

However, in such a conventional switch interrupt processing circuit, first, there is a problem that the number of input ports required is equal to the number of mechanical switches. Usually, a plurality of mechanical switches are often provided on an operation panel of an information processing apparatus or a digital control device. For this reason, the switch interrupt processing circuit that requires input ports as many as the number of switches in the related art requires a large-scale circuit, a large device, and a high cost in a system having many mechanical switches. Considering the influence of external noise, noise is applied to a plurality of signal lines at the same time. Therefore, it is necessary to monitor the states of a plurality of switches at the same time, and the processing performance deteriorates.

Second, since the monitoring operation of the input port is performed for a long time and the interrupt processing is performed after the logic output from the mechanical switch becomes constant, the processing of the CPU is divided into the monitoring operation. However, there is a problem that the processing performance is reduced. Long-term status monitoring is required to eliminate malfunction factors such as accidental pressing of a mechanical switch or collision with something.
The monitoring time cannot be shortened.

Third, there is a problem that the time monitoring parameter cannot be set according to the noise situation at the installation place. This is because there is no means for recording the events removed by the time monitoring condition. The present invention has been made in view of such a point, and an object of the present invention is to provide a switch interrupt processing circuit and a switch interrupt processing method for preventing the influence of chattering of a mechanical switch and external noise. A second object of the present invention is to provide a switch interrupt processing circuit having a small circuit scale.

[0013]

According to a first aspect of the present invention, there is provided an interrupt processing circuit for a mechanical switch in which an interrupt signal level changes when an operation is performed. A starter for detecting an edge of a level to start an interrupt process; a timer for measuring a predetermined time including a time until the edge detection of the next interrupt signal; and an edge of the interrupt signal measured by the timer. Interrupt control means for performing a predetermined interrupt process when the interval is within a predetermined time range, the interrupt control means comprising:
In the interrupt processing at the time of edge detection, the first
Of the predetermined time is started, and the first predetermined time has elapsed.
If no edge is detected, the first edge is
Is valid, and the timing of the second predetermined time is
Start and before the second predetermined time has elapsed, a second edge
If a second edge is detected, the second edge is validated and a predetermined
Is performed. Here, the first predetermined time is a time set for determining whether or not an interrupt signal due to chattering is generated when the mechanical switch is pressed. The first predetermined time is set by the time when the rising edge of the interrupt signal due to chattering occurs. For example, it can be set in advance to 0.2 seconds or the like. However, it is necessary to set it appropriately in relation to the characteristics of the mechanical switch that inputs the interrupt signal.
It is not limited to 0.2 seconds.

Further, claim 2 of the present invention is claim 1
In addition to the invention, in an interrupt processing circuit of a mechanical switch in which an interrupt signal level changes when an operation is performed, an activation means for detecting an edge of the interrupt processing signal level and activating interrupt processing, and an edge of a next interrupt signal A timer for counting a predetermined time including a time until the detection, and an interrupt for performing a predetermined interrupt processing when an interval between edges of the interrupt signal measured by the timer is within a predetermined time range. Control means ,
The activating means may further include an edge of the next interrupt signal.
Not detected and the first predetermined time has passed by the timing means.
Also starts interrupt processing when it detects that
The control means performs the interrupt processing at the time of the first edge detection.
The first predetermined time is started by the clock means,
If no edge is detected after the first predetermined time has elapsed
If the first edge is valid,
Start timing of the second predetermined time, and wait for the second predetermined time.
If the second edge is detected before, the second edge is detected.
Enables and performs predetermined interrupt processing.
You. The invention of claim 3 of the present invention, wherein
In addition to the first or second aspect of the present invention, when the interval between the edges of the interrupt signal is out of a predetermined time range, the interrupt control means records this. . Here, the second predetermined time is a time set for determining whether or not an interrupt signal due to external noise is generated while the mechanical switch is being pressed. The second predetermined time is set by the time when the rising edge of the interrupt signal due to external noise occurs. For example, 3 seconds or the like can be set in advance. However, it is necessary to appropriately set the relationship with the frequency of external noise, and the setting is not limited to 3 seconds. According to the switch interrupt processing circuit, first, since the signal state of the mechanical switch does not need to be detected at the input port, even if the number of mechanical switches increases, the number of input port terminals is unnecessary and the number of circuits can be reduced. The number of input ports required by the number of switches is not required, and even in a system having many mechanical switches, the circuit does not become large and the device can be reduced in size and inexpensive.

According to a fifth aspect of the present invention, in the interrupt processing method for a mechanical switch in which an interrupt signal level changes when an operation is performed, interrupt processing is started at an edge of the interrupt signal level, starts counting between first place scheduled required until the edge detection of the next interrupt signal to the interrupt process ends, the edge of the next interrupt signal level of the edge or the next interrupt signal is detected
It has detected the edge of the next interrupt signal level before being Start <br/> Ri interrupt processing by the fact that elapses between the first place scheduled with no, between said first predetermined scheduled elapses is It investigated whether, in the case of detecting the next interrupt signal level of the edge for a period shorter between the first place scheduled, said next interrupt as the interval of the edge is outside the range of a predetermined prescribed time the signal level of repeat the procedure from the start of counting between said first predetermined fixed time and upon detection of an edge as a starting point, before <br/> SL be passed between the first place time of the next split Ri inclusive signal level when detecting no edge starts counting between scheduled second place and the interrupt process ends, and starts the more interrupt processing edge of the next interrupt signal level, before the elapse of the second predetermined time when detecting the next split Ri inclusive signal level of the edge Performing a predetermined interrupt process assuming that the edge interval is within a predetermined time range. Here, the first predetermined time is defined as
The same as the first predetermined time according to the second aspect of the invention.
is there. That is, the first predetermined time is the time when the mechanical switch is pressed.
An interrupt signal due to chattering has occurred at the time of lowering
It is a time set to determine whether or not. this
The first predetermined time is a time period during which an interrupt signal due to chattering is generated.
It is set by the time when the rising edge occurs.
For example, it can be set in advance to 0.2 seconds or the like. However
And the relationship with the characteristics of the mechanical switch that inputs the interrupt signal.
It is necessary to set appropriately in the section, it is limited to 0.2 seconds
is not. Further, the second predetermined time is defined in claim 3 described above.
This is the same as the second predetermined time in the described invention. Sand
That is, the second predetermined time is when the mechanical switch is pressed.
Whether an interrupt signal due to external noise
This is the time set to determine whether the This second
The predetermined time is the rise of the interrupt signal due to external noise.
It is set by the time at which the edge is generated. For example
For example, 3 seconds can be set. However, outpatient neu
Must be set appropriately in relation to the frequency of the
It is not something that can be done.

According to a sixth aspect of the present invention, in addition to the fifth aspect , the procedure of the interrupt processing method of the mechanical switch further includes an edge of an interrupt signal clocked by the clocking procedure. When the interval is out of a predetermined time range, this is recorded.

[0017]

Embodiments of the present invention will be described with reference to the drawings. Figure 1 is a block diagram showing the configuration of the switch interrupt processing circuit according to an embodiment of the present invention. Switch interrupt processing circuit according to an embodiment of the present invention is Ri included control means spite performs interrupt processing C
It comprises a PU 10, a momentary-type mechanical switch 30, and a pull-up resistor 40. CPU10 is Ri included control means spite performs interrupt processing, the interrupt processing starting means is a CPU10 internal interrupt control unit (not shown), a timer is counting means for counting a time (not shown) have. CPU1
A mechanical switch 30 for inputting an interrupt signal and a pull-up resistor 40 are connected to the 0 interrupt signal input terminal 11. The other end of the mechanical switch 30 is fixed at the ground potential. The mechanical switch 30 is a momentary push switch.
When an external force is applied, the operating tool sinks and the contact closes, and when the hand is released, the operating tool returns due to the restoring force of the spring and the contact opens. The other end of the pull-up resistor 40 is fixed at a potential of + 5V.

[0018] Next, switch interrupt with such a configuration
The operation of the processing circuit will be described with reference to FIG. Figure
2 is a switch interrupt processing according to an embodiment of the present invention.
4 is a time chart illustrating an operation of the circuit. Mechanical switch
Before 30 is pressed, its contacts are open and the CPU 10
The potential of the interrupt signal input terminal is kept High.
You. When the mechanical switch 30 is pressed, the contacts close and the CPU 10
Of the interrupt signal input terminal 11 is low. C
Interrupt control unit built in PU10 (not shown)
Trigger mode is set to double edge trigger.
You. ButTsuCPU 10 is pressed when mechanical switch 30 is pressed.
The same interrupt hand when released and released
Operates to branch to la. Such an interrupt controller
The function of the troll unit is based on the most common technology.
Things. When the operator presses the mechanical switch 30
When releasing both, often the interrupt signal
Chattering 50 due to the mechanical characteristics of the mechanical switch 30
Has occurred. If the mechanical switch 30 is not operated,
Noise, radiated disturbance, noise between AC terminals
Transient signal caused by external noise such as noise
The size 60 may be applied.

[0019] Next, the interrupt signal input terminal11Enter
Interrupt signalTsuInterrupt processing program
Diagram of the operation of the system3This will be described with reference to FIG. Figure 3 is a book
A switch interrupt processing circuit according to an embodiment of the present invention
FIG. 6 is a state transition diagram showing program processing contents. The present invention
Has a switch interrupt processing circuit according to an embodiment of the present invention.
When the power of the device is turned on (S1), the program is executed.
Functions to be turned on by pressing the mechanical switch 30 (eg,
Turn on the lamp, turn on the motor)
(S2) Waiting for an interrupt request, and
The normal processing of the system is continued. Here, mechanical switch 3
0 is pressed and the interrupt signal changes from High to Low
Then, the falling edge of the interrupt signal (INT)
The CPU 10 detects and activates the interrupt processing. Interrupt
Only processing programIsUntil the next interrupt signal becomes valid
Start a timer (not shown) that monitors the time of
(S3), the interrupt processing ends and the processing returns to the normal processing.
You.

In this embodiment, the first predetermined time is set to 0.
2 seconds. Therefore, the mechanical switch 30 is pressed,
If the chattering 50 occurs when the mechanical switch 30 is pressed when the interrupt signal changes from High to Low, a rising edge of the interrupt signal (INT) occurs within 0.2 seconds at the latest. Time that this 0.2 seconds on the characteristics of the mechanical switch 30 used in this embodiment
Are those determined by Tsu, it goes without saying that the application to another should be appreciated optimization can be achieved. When the second interrupt signal (INT) is input, the interrupt processing program refers to the time measurement result of the timer started at the time of the previous interrupt processing, and when the time is less than 0.2 seconds, is executed by the mechanical switch 30. The interrupt processing is terminated with the function to be turned OFF, and the processing returns to the normal processing.
That is, when the interval at which the interrupt signal is generated is less than 0.2 seconds, the function is not changed in the OFF state, and as a result, the change of the mechanical switch 30 is erroneously operated.
Or, it is regarded as being due to the chattering 50 and is ignored.

[0021] Then, chattering of mechanical switch 30
50 converges, but chattering 50 interrupts
The last edge of the signal (INT) is input to the CPU 10
The state changes after 0.2 seconds have elapsed since the next
Time until the embedded signal becomes effective3Less than a second3Seconds or more
Start a timer to monitor whether or not (S4)
Return to processing.That is, in the present embodiment, the second place
The fixed time was set to 3 seconds based on the frequency of extraneous noise. But
WhatIn this state, the mechanical switch 30 is pressed by the operator.
The machine switch is
It is in a state of waiting for the hand to be released from the switch 30.

[0022] Operator releases hand from mechanical switch 30
The interrupt signal changes from low to high.
Error occurs, and the interrupt processing program starts. Interrupt
The processing program only counts less than 3 seconds
TsuIs executed for the first time by pressing the machine switch
Turn on the function to be performed (S5) and return to the normal processing
You. The next interrupt signal is not valid after 3 seconds
TsuThe previous interrupt was caused by extraneous noise 60
And the next interrupt signal becomes valid after 3 seconds.
TsuInterrupt processing program is activated when the
The state transits to the state (S2) and returns to the normal processing.

As described above, only when the time interval between any two edges in the plurality of interrupt signals by the mechanical switch 30 is not less than 0.2 seconds and less than 3 seconds, a human can actually operate (press and release) the mechanical switch 30. )
Control is performed to make a transition from the OFF state (S2) to the ON state (S5). Is usually chattering is for multiple occurrences by the number 10 milliseconds, an interrupt signal in which a plurality of input at intervals of less than 0.2 seconds results in other than the last one edge is ignored. The noise 60 is usually transient, and it is extremely rare that two or more noises 60 are applied to a signal line while maintaining an interval of 3 seconds or less. Also results in most being ignored. The state transition control is performed when the function to be executed by the mechanical switch 30 is turned off (for example, the lamp is turned off or the motor is stopped). The state transition is controlled from OFF (S2) to ON (S5). Since the processing method of the interrupt signal is exactly the same, the description is omitted.

[0024] Next, a specific example of the present invention
This will be described in detail with reference to planes. FIG. 4 shows one embodiment of the present invention.
Commercial use with switch interrupt processing circuit in the form of
4 is an operation history (log) list of the BGM device. This device
Now, according to the switch interrupt processing circuit of the present invention,TsuRun
Function to mute the sound of the music being played (mute
) And music resume (unmute)
Operation to repeat the toggle operation in this state every time the switch is pressed
Designed by specification. In addition, switch interruptTsu
The mute operation / release is performed only when the interrupt signal interval
0.2 seconds to 3 secondsTsuOnly 0.2 secondsNot yet
Full, Or the interrupt signal becomes effective at intervals of 3 seconds or more.
TsuRecord the operation history in the memory even if
It is. Figure4As shown in FIG.
Different methods for L2 between 2 seconds and less than 3 seconds and L3 for 3 seconds and more
You can see that the message has been recorded.

[0025] While operating such functionsLaFor actual operation
Investigate the operation history to generate noise at the installation location
It is possible to know the situation, the situation of erroneous operation, and the like. Also installed
Noise may occur frequently in some places,
In such a case, the interval between interrupt signals is 3 seconds as an example.
Activate / deactivate the mute function only when it is less than 5 seconds
Create a program to perform the
High reliability according to the installation environment by exchanging grams
Can be obtained. In this case, operate the mechanical switch.
Press for more than 3 seconds, then 2 secondsLess thanKeep your hands on
The mute function does not work and the operation feeling deteriorates,
Processing based on the concept of giving priority to the operational reliability of mechanical switches
It is a place. Thus, the operation history information of the mechanical switch is recorded.
Record the operating status of mechanical switches
Not only can be used, but also
The interval parameter can be set to a more optimal value
You.

The above processing functions can be realized by a computer. In this case, the processing contents of the functions that the switch interrupt processing circuit should have are described in a program recorded on a computer-readable recording medium. Then, by executing this program on a computer, the above processing is realized on the computer. Examples of the computer-readable recording medium include a magnetic recording device and a semiconductor memory.

[0027]

As described above, the switch interrupt processing time of the present invention is described.
According to the road, first, the signal state of the mechanical switch is input
The number of mechanical switches is large
Even though the input port terminal is unnecessary, the number of circuits is small,
The number of input ports is not necessary for the number of mechanical switches.
Even in a system with many switches, the circuit is not large and the equipment is small.
It can be modeled and inexpensive. Second, wrong mechanical switchesTsuPush
If you do or bumpTsuMalfunction factors such as
Dedicated circuits and programs for a long timeTsuMonitoring
Since the processing need not be performed, the processing performance does not decrease. Third,
A function to record events that are out of time monitoring conditions
Time monitoring parameters according to the noise situation at the installation location.
Data can be set. Also, according to the switch allocation of the present invention,
Depending on the processing method, the same effect as described above can be obtained.
it can.

[Brief description of the drawings]

FIG. 1 is a block diagram of a switch interrupt processing circuit according to an embodiment of the present invention.

FIG. 2 is a time chart of a switch of a switch interrupt processing circuit according to an embodiment of the present invention.

FIG. 3 is a state transition diagram of switch interrupt processing according to an embodiment of the present invention.

FIG. 4 is an operation history (log) list of the switch interrupt processing circuit according to the embodiment of the present invention;

FIG. 5 is a block diagram of a conventional switch interrupt processing circuit.

FIG. 6 is a state transition diagram of conventional switch interrupt processing.

[Explanation of symbols]  10 CPU (%RControl means)  11 Interrupt signal input terminal  30 Mechanical switch  40 Pull-up resistor  50 chattering  60 noise

Continuation of the front page (58) Field surveyed (Int.Cl. ⁷ , DB name) G06F 9/46 G06F 13/24 G06F 11/30

Claims (5)

(57) [Claims] 1. An interrupt processing circuit of a mechanical switch, wherein an interrupt signal level changes when an operation is performed, a starting means for detecting an edge of the interrupt signal level to start an interrupt process, and detecting an edge of a next interrupt signal. A timer means for counting a predetermined time including a time until: and interrupt control for performing a predetermined interrupt processing when an interval between edges of the interrupt signal measured by the clock means is within a predetermined time range. and means, wherein
The interrupt control means is configured to execute an interrupt processing when the first edge is detected.
Start timing of the first predetermined time by the timing means
However, no edge is detected even after the first predetermined time has elapsed.
The first edge is made valid and the timing means
Starts a second predetermined time by the second predetermined time.
If the second edge is detected before the lapse of time, the second edge is detected.
Enables the edge and performs the specified interrupt processing.
An interrupt processing circuit for a mechanical switch. 2. An interrupt processing circuit of a mechanical switch in which an interrupt signal level changes when an operation is performed, a starting means for detecting an edge of the interrupt processing signal level and starting an interrupt process, and an edge of a next interrupt signal. A timer for measuring a predetermined time including a time until the detection; and an interrupt for performing a predetermined interrupt process when an interval between edges of the interrupt signal measured by the timer is within a predetermined time range. and control means, said activation means further edge of the next interrupt signal
Not detected and the first predetermined time has passed by the timing means.
Also starts interrupt processing when it detects that
The control means performs the interrupt processing at the time of the first edge detection.
The first predetermined time is started by the clock means,
If no edge is detected after the first predetermined time has elapsed
If the first edge is valid,
2 starts counting during a predetermined time, after the second predetermined time
If the second edge is detected before, the second edge is detected.
It is valid and performs predetermined interrupt processing.
The interrupt processing circuit for a mechanical switch according to claim 1 . 3. The method according to claim 2, wherein the interrupt control unit records the interval between edges of the interrupt signal when the interval is out of a predetermined time range.
An interrupt processing circuit for a mechanical switch according to claim 1 or 2 . 4. An interrupt processing method for a mechanical switch in which an interrupt signal level changes when an operation is performed, wherein interrupt processing is started at an edge of the interrupt signal level, and a first time required until an edge of the next interrupt signal is detected. Triggering a predetermined time to end the interrupt processing, starting the interrupt processing by passing the first predetermined time in a state where the edge of the next interrupt signal level or the edge of the next interrupt signal is not detected, It is checked whether or not the edge of the next interrupt signal level is detected before the first predetermined time elapses. If the edge of the next interrupt signal level is detected before the first predetermined time elapses, The edge interval is determined to be out of the range of a predetermined time, and the second interrupt signal level is detected starting from the edge when the edge is detected. Is repeated from the start of timing of the predetermined time. If the edge of the next interrupt signal level is not detected even after the first predetermined time has elapsed, timing of the second predetermined time is started and the interrupt processing is ended. Then, interrupt processing is started by the edge of the next interrupt signal level, and when the edge of the next interrupt signal level is detected before the second predetermined time has elapsed, the edge interval is within a predetermined time range. And performing a predetermined interrupt process. 5. The procedure of the mechanical switch interrupt processing method further records when an interval between edges of the interrupt signal measured by the timing procedure is out of a predetermined time range. 6. The interrupt processing method for a mechanical switch according to claim 5, wherein: