JP3085374B2 - ATM cell insertion method - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an ATM (Asynchro
The present invention relates to a cell insertion method, and more particularly, to an ATM cell insertion method in which a plurality of cell data for which a cell insertion request occurs at random is inserted into an empty cell position on a first-come-first-served basis.

[0002]

2. Description of the Related Art Conventionally, there has been known an ATM cell insertion system in which a plurality of cell data at which a cell insertion request occurs at random is inserted into a vacant cell position on a first-come first-served basis. Such an ATM cell insertion method generally uses a FIFO (first-in first-out) type memory, writes cell data into the memory in the order of cell insertion requests, and reads out data from the memory when there is an empty cell in the transmission path. Data is read out in the order of oldest write and inserted into the transmission path as cells. FIG. 6 shows a conventional ATM cell insertion method using a FIFO memory. The cell insertion method includes an ATM processing unit 11 that performs ATM processing and generates cell data, a control unit 12 that controls writing and reading of a memory and inserts cell data into an empty cell, , A write address pointer 14 indicating a memory write address, and a read address pointer 1 indicating a memory read address.
And 5.

The control unit 12 sequentially writes the cell data generated by the ATM processing unit 11 at a predetermined address of the memory 13 indicated by the write address pointer 14, and reads out the read address pointer 1 when an empty cell is detected on the transmission path.
The cell data is read out from the memory 13 in the order written based on the address indicated by 5 and inserted into the transmission path. Therefore, the cell data once written in the memory 13 can always be read out only in the order in which it was written.

In recent years, international standardization organizations have been
As the detailed discussion of the M (Operation Administration and Maintenance) function progresses, if the specified VP (Virtual Path) waits for more than a certain number of cells after the insertion request, there will be no empty cells. However, there is a demand for forcibly inserting OAM cells. As a result, it becomes necessary to preferentially insert a cell for which an insertion request has been made later depending on VP traffic.

[0005]

However, since the FIFO memory is used for writing and reading cell data, the conventional cell insertion method has a problem that it cannot respond to such a priority insertion request. Therefore,
SUMMARY OF THE INVENTION An object of the present invention is to provide an ATM cell insertion method which can insert cell data in a write order when it is necessary to insert cell data in a memory preferentially.

[0006]

SUMMARY OF THE INVENTION In order to achieve the above object, the present invention provides an AT which inserts a plurality of cell data serving as a transmission unit of communication in an asynchronous transfer mode into an empty cell on a transmission line.
In the M cell insertion method, a random access storage means for storing the plurality of cell data at a predetermined address in a predetermined order, an address holding means for holding an address in the storage means of the plurality of cell data, The plurality of cell data are read out in the predetermined order and inserted into a transmission path, and when there is a priority insertion request that does not follow the predetermined order for specific cell data, the specific cell data is Control means for acquiring an address, reading the specific cell data from the storage means, inserting it into the transmission path, and returning to reading in the predetermined order, skipping the address of the specific cell data. Wherein the storage means stores the predetermined
Address and a data area for storing cell data.
Address area that stores the address before the current address
Area and the address after the corresponding address
And a next address area.
When there is a priority insertion request, the specific cell data
The previous address and the one corresponding to the address
Using the subsequent address, return to the reading in the predetermined order.
The present invention provides an ATM cell insertion method characterized in that

According to the ATM cell insertion method of the present invention, the control unit sequentially writes cell data into the randomly accessible storage unit, sequentially reads out the data in the written order, and inserts it into the transmission line. Is usually a FIFO
, And performs cell insertion with priority given to the start. Further, since a memory capable of random access is used and an address holding means for holding an address at which the cell data is stored is provided, at the time of priority insertion request, an address having the cell data to be preferentially inserted is obtained from this address holding means. However, since the cell data can be read by directly accessing the address of the memory, cells in the memory can be inserted out of the writing order. Then, since the control is performed so that the specific address is skipped at the time of sequential reading, the same cell data is not inserted twice. Also a memory hand
At the same time as reading the cell data from the predetermined address of the stage,
Next address value of the predetermined address from the next address area
Obtain and perform the next read operation based on this next address value
Can be set, the storage means is usually
Functions as a FIFO memory.

[0008]

Further, according to the present invention, in order to achieve the above object, the control means, when receiving the priority insertion request,
Holding means for holding the current value of the read address and the current value of the write address, writing the next address value of the address of the specific cell data in the next address area of the immediately preceding address, and Write the previous address value of the data address to the previous address area of the next address, then return the write position to the write address of the current value held in the holding means, and hold in the holding means 2. The ATM cell insertion system according to claim 1, wherein the read position is controlled to return to the read address of the current value.

According to this ATM cell insertion method, the next address value of the priority inserted address is written in the next address area of the address immediately before the priority inserted address, and based on the next address value. Since the read address is set, the read operation is performed from the address immediately before the priority read address to the address immediately after the priority read address, thereby performing the priority read. Address is skipped, and the same cell data is not inserted into the transmission path twice. Further, after the priority reading, the writing position and the reading position can be returned to the original current values, and the normal operation can be returned.

[0011]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of an ATM cell insertion system according to the present invention will be described below. FIG. 1 shows an ATM according to the present invention.
An embodiment of the cell insertion method will be described, and the ATM cell insertion method of the present invention will be described with reference to FIG. In this cell insertion method, an ATM processing unit 1 that performs ATM processing to generate cell data and requests priority insertion of a cell on a transmission path, controls writing and reading of a memory, and inserts cell data into an empty cell of the transmission path. , A random access memory (hereinafter referred to as RAM) 3 for storing cell data, an address holding unit 4 for holding an address of the RAM 3 in which the cell data is written, and a write indicating the write address of the RAM 3 Address pointer 5 and RAM
And a read address pointer 6 indicating a read address of No. 3.

Each address of the RAM 3 is provided with a previous address area 32 and a next address area 33 in addition to a data area 31 for storing cell data. The control unit 2 also includes holding units 21a and 21 that temporarily hold the current values of the write address pointer 5 and the read address pointer 6.
b is provided inside. First, a normal operation will be described. The control unit 2 writes the cell data A generated by the ATM processing unit 1 to a predetermined address 05h of the RAM 3 indicated by the write address pointer 5, and
A value 04h obtained by subtracting the value of the write address pointer by -1 is written into the address area 32 before h, and a value 06h obtained by adding +1 to the value of the write address pointer 5 is written into the next address area 33 after address 05h. Further, the control unit 2 outputs the address 05h indicated by the address pointer 5 to the address holding unit 4. The address holding unit 4 receives the address 05h of the write address pointer 5 as data and holds it at the address 00h. In the address holding unit 4, the storage location of the address indicated by the write address pointer 5 is determined by the type of cell data to be written in the RAM 3, for example, the VPI (Virtual Path Identifier) value of the header, VCI (V
It is uniquely determined in advance by an irtual Channel Identifier) value or the like.

Next, the value of the write address pointer 5 is incremented by one, and the control unit 2 stores the next cell data B in the data area 31 at the address 06h next to the address 05h.
Is written to the previous address area 32, and a value 05h obtained by subtracting the value of the write address pointer 5 is written to the previous address area 32, and a value 07h obtained by adding +1 to the value of the write address pointer 5 is written to the next address area 33. Thus, RA
The cell data, the previous address value, and the next address value are sequentially written to M3.

In reading the cell data, the control unit 2
Starts reading cell data and the next address from the address 05h of the RAM 3 based on the address indicated by the read address pointer 6 when an empty cell is detected on the transmission path. The read cell data is inserted as a cell on the transmission path. After that, the read next address value is given to the read address pointer 6. Normally, since the next address value is the address value of the read address + 1, the read address pointer 6 is incremented by one, and the next address after the read address is read. Are sequentially read out. Therefore, the RAM 3 stores data on a first-in first-out basis
O) Function as a memory.

Next, the operation in the case where there is a priority insertion request for certain cell data from the ATM processing unit 1 will be described. Upon receiving the priority insertion request signal from the ATM processing unit 1, the control unit 3 extracts the address value of the RAM 3 storing the cell data stored in the address holding unit 4,
The value is given to the read address pointer 6 and the RAM 3
Output the cell data and insert it into the transmission path. As a result, arbitrary cell data can be preferentially inserted into the transmission line by skipping the original order. Here, it is assumed that, after reading the cell data A, a request to read the cell data C with priority occurs.

At this time, the current value 13h of the write address pointer 5 and the current value 0 of the read address pointer 6 are set.
5h is also held in the holding units 21a and 21b in the control unit 2 (FIG. 2). The ATM processing unit 1 sends to the control unit 2 an address holding unit 4 for the cell data C as a priority insertion request signal.
Address value 02h is given. The control unit 2 extracts the address 07h at which the cell data C is written from the address 2h of the address holding unit 4 and records the current value 05h of the read address pointer 6 in the holding unit 21b of the control unit 2, and then reads out the read address pointer 6 Give 07h to RA
The cell data C is read from M3 and inserted on the transmission path (FIG. 3). At this time, the previous address value 06h stored in the previous address area 32 of the address 07h and the next address value 08h stored in the next address area 33 are also read. After outputting the cell data C, the control unit 2 stores the current value 13h of the write address pointer 5 in the holding unit 21 of the control unit 2.
a, the value 06h of the previous address area is temporarily given to the write address pointer 5. Then, the next address value 08h read earlier is written in the next address area of the address 06h of the RAM 3 (FIG. 4). Next, the control unit 2
Gives the next address value 08h read earlier to the write address pointer 5, and writes the previous address value 06h read out simultaneously with the cell data C into the previous address area 32 of the address 08h of the RAM 3 (FIG. 4). Thereby, the contents of the RAM 3 after the priority output as shown in FIG. 5 are obtained. Thereafter, the original current value 13h stored in the holding unit 21a of the control unit 2 is given to the write address pointer 5 (FIG. 4), and the original current value stored in the holding unit 21b of the control unit 2 is provided to the read address pointer 6. The current value 05h is given (FIG. 3), and each is returned to the original state.

When the data is sequentially read, when the cell data B is read from the address 06h of the RAM 3, the next address value of the next address area 33 is 08h, and the address 08h is read after the address 06h. Thus, the address 07h where the cell data C is written is skipped. Therefore, cells are not inserted redundantly. As described above, the ATM cell insertion method according to the present embodiment uses a random access memory as storage means for storing cell data, and stores a previous address in the memory in which a previous address value indicating the address of the immediately preceding cell data is stored. An area and a next address area for storing the next address value indicating the address of the cell data to be inserted next are provided, and the next address is read and accessed based on the next address value stored in the next address area. Cell data can be written and read.

Further, by providing the memory as a RAM and providing an address holding means for holding a write address, even after the cell data is written into the memory, the desired cell data can be skipped in its original order and given priority. Can be read out. Therefore, even if it becomes necessary to increase the cell insertion priority order after the cell insertion request, the desired cell can be immediately taken out and inserted into the transmission path, and then the original position held in the holding unit of the control unit can be obtained. You can go back to
It can return to normal operation.

Further, the previous address value of the address immediately preceding the address read preferentially and the next address of the address immediately following the address are rewritten with the previous address value and the next address value stored in the priority read address, respectively. Therefore, cells inserted once due to preferential insertion of cells are not duplicated. In the above-described embodiment, the method of specifying the storage location in advance by the VPI value or the VCI value for the cell data has been described as the storage method of the address holding unit. However, the address holding unit is configured using the content addressable memory, A part of the cell data may be written so that the data can be determined, and a target address may be accessed from the association of the part of the cell data. Further, the holding unit inside the control unit can be constituted by a buffer or a flip-flop.

[0020]

As described above, according to the cell insertion method of the present invention, cells are normally inserted on the transmission line on a first-in first-out basis, and when priority insertion is requested, desired cell data is transmitted by skipping the order of writing. It can be inserted into roads and can meet recent demands.

[Brief description of the drawings]

FIG. 1 is a block diagram showing an embodiment of an ATM cell insertion system according to the present invention.

FIG. 2 is an explanatory diagram showing a holding unit of a control unit according to the present invention.

FIG. 3 is an explanatory diagram showing an address value of a read address pointer according to the present invention.

FIG. 4 is an explanatory diagram showing an address value of a write address pointer according to the present invention.

FIG. 5 is an explanatory diagram showing a RAM after priority output according to the present invention;

FIG. 6 is a block diagram showing a conventional ATM cell insertion method.

[Explanation of symbols]

DESCRIPTION OF SYMBOLS 1 ... ATM processing part, 2 ... control part, 21a, 21b ... holding part, 3 ... random access memory, 31 ... data area,
32: Previous address area, 33: Next address area, 4: Address holding unit, 5: Write address pointer, 6: Read address pointer

──────────────────────────────────────────────────続 き Continued on front page (58) Field surveyed (Int. Cl. ⁷ , DB name) H04L 12/56 H04L 12/28

Claims (2)

(57) [Claims] 1. A method of inserting a plurality of cell data, which is a transmission unit of communication in an asynchronous transfer mode, into an empty cell on a transmission line.
In the TM cell insertion method, a storage unit capable of random access storing the plurality of cell data at a predetermined address in a predetermined order; an address holding unit holding an address of the plurality of cell data in the storage unit; The plurality of cell data are read out in the predetermined order and inserted into a transmission path, and when there is a priority insertion request that does not follow the predetermined order for specific cell data, the specific cell data is Get the address,
The insert from the storage unit to the transmission path reads out the specified cell data, when returning to the reading of the predetermined sequence, and control means for controlling so as to skip the address of a specific cell data, the storage The means stores cell data in the predetermined address.
The data area to be stored and the address immediately before the corresponding address
Address area before storing the address and the corresponding address
Next address area to store the next address of
And the control unit receives the priority insertion request.
At the time, the address corresponding to the address of the specific cell data is
Using the previous address and the next address
An ATM cell insertion method for returning to the reading in the predetermined order . 2. The control means further comprises: holding means for holding a current value of a read address and a current value of a write address when the priority insertion request is issued, wherein the next address value of the address of the specific cell data is provided. Is written in the next address area of the previous address, the previous address value of the address of the specific cell data is written in the previous address area of the next address, and then held in the holding unit. wherein the write address of the current value to return the writing position, ATM cell insertion method of claim 1 wherein the control so as to return the read position to the read address of the current value held in the holding means are.