JP3078692B2 - Arithmetic encoder - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an arithmetic encoder for image data in a device for handling digital image data such as a facsimile, and more particularly, to an arithmetic encoder for performing multiplication-free arithmetic coding.

[0002]

2. Description of the Related Art As a conventional arithmetic code system for performing multiplication-free arithmetic coding, an international standard draft of a binary natural image (hereinafter, referred to as a "standard").
JBIG).

In JBIG, instead of processing of multiplying the occurrence width of an arithmetic code by the appearance probability of a symbol to obtain a new occurrence width, a constant LS corresponding to the appearance probability of an old register and a recessive symbol LPS is used.
If a pixel to be encoded (encoded pixel of interest) is the dominant symbol MPS, an estimated value LS of the probability of occurrence of a recessive symbol is obtained from the value of the agenda.
Z is subtracted, and in the case of the recessive symbol LPS, a process of using the estimated value LSZ of the occurrence probability of the recessive symbol as the value of the agend is performed.

FIG. 10 is an overall view of a system based on JBIG, in which an LSZ setting unit 101 for obtaining an estimated value LSZ of the occurrence probability of a recessive symbol, and an appearance probability of the recessive symbol output from the LSZ setting unit 101 are shown. And an encoding unit 102 that performs actual encoding based on the estimated value LSZ.

FIG. 11 is a more detailed block diagram of the LSZ setting unit 101.

Here, a specific area around the pixel of interest for encoding is used as a template, and "1" of each pixel in the template is used.
A combination of “0” is defined as a context CX.

Each context has, as a status ST (CX), a probability of occurrence of the recessive symbol LPS of the pixel of interest to be coded, which is estimated from the context.

A status determination unit 111 for obtaining a status from each context determines whether the pixel of interest PIX to be encoded is the superior symbol MPS or the inferior symbol LPS, and according to the result of the determination, the superior symbol MPS
Alternatively, a recessive symbol LPS is output.

[0009] Each time a pixel of interest is read, the status update unit 112 updates the status of each pixel based on the information, and calculates the estimated value LSZ of the probability of appearance of a recessive symbol that is more suitable for the image. Updates the status value to be given.

The LSZ estimating section 113 calculates an estimated value LSZ of the probability of occurrence of a recessive symbol from the status of each context.
Is obtained from the estimated probability table.

In multiplication-free arithmetic coding, the normalization of an agenda is performed by a bit shift operation. Even in JBIG, a left shift operation is performed so that the value of the augment register is always equal to or greater than the minimum value AMIN of the aggressor.

In JBIG, the status and the estimated value LSZ of the occurrence probability of the recessive symbol correspond one-to-one.

[0013]

In the conventional system, a bit shift operation is used in order to avoid multiplication in the normalization of the augment register.

However, the shift operation can only multiply the value of the age register by 2 to the power of n, so that the value A of the age register may be at most twice the value AMIN to be normalized. sell.

Therefore, if the value of the agenda register that varies widely varies with a table for calculating the estimated value LSZ of the probability of occurrence of one recessive symbol, the error increases and the coding efficiency decreases. Would.

[0016]

SUMMARY OF THE INVENTION To solve the above-mentioned problems, an arithmetic encoder according to the present invention responds to status determination means for obtaining a status from each context and status supplied from the status determination means. Status update means for updating the context status by means of a plurality of estimated probability tables connected to the status determination means for obtaining an estimated value LSZ of the occurrence probability of a recessive symbol corresponding to the context status, and a bit shift operation. An augment register for obtaining and outputting a renormalized value, decoding means for decoding a predetermined bit of a value output from the augment register, and a plurality of estimated probability tables respectively connected to the plurality of estimated probability tables Output from the decoding means Answer to that and a switching means for selecting one from said plurality of estimated probability table.

[0017]

The status determining means obtains the status from each of the input contexts. Status update means
The status of the context is updated in response to the status supplied from the status determination means. Here, a plurality of estimated probability tables for obtaining the estimated value LSZ of the occurrence probability of the recessive symbol corresponding to the status of the context are connected to the status determination means. The age register obtains a value renormalized by a shift operation. The decoding means decodes an arbitrary predetermined bit of the renormalized value. In response to the result, the switching means selects one of the plurality of estimated probability tables and outputs an optimal estimated value LSZ of the occurrence probability of the recessive symbol.

[0018]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the arithmetic encoder according to the present invention will be described below in detail with reference to FIGS.

The arithmetic coder according to the present invention also employs the LSZ
It comprises a setting unit and an encoding unit. The present invention is characterized by the LSZ setting unit.

FIG. 1 is a block diagram of an LSZ setting unit according to this embodiment.

The LSZ setting unit in this embodiment includes a status determining unit 1 for obtaining a status from each context, and a status updating unit for updating the status of the context in response to the status supplied from the status determining unit 1. 2, estimated probability tables 3 to 6 connected to the status judging unit 1 for obtaining estimated values LSZ of occurrence probabilities of recessive symbols corresponding to the status of the context, and automatic values for obtaining values renormalized by a bit shift operation. And a predetermined register 2 supplied from the augment register 12.
A decoder 11 that decodes bits, and is connected to each of the estimated probability tables 3 to 6 and is turned on and off by a switching signal G output from the decoder 11.
It comprises switching units 7 to 10 for switching FFs.

In this embodiment, a specific area around the pixel of interest to be coded is used as a template, and a combination of "1" and "0" of each pixel in the template is used as a context CX.

Here, each context is a recessive symbol LP of the pixel of interest to be coded, which is estimated from the context.
It has a status ST (CX) which is a variable representing the S appearance probability.

Hereinafter, the operation of the LSZ setting section having the above configuration will be described in detail.

The status determination unit 1 for determining the status from each context determines whether the pixel of interest PIX to be encoded is the superior symbol MPS or the inferior symbol LPS, and determines the superior symbol MPS and the inferior symbol LS.
One of PS is output.

The status updating unit 2 for updating the status, based on the judgment of the status judging unit 1, changes the status of each context based on the information every time a pixel of interest is read. The status is updated to give a suitable estimated value LSZ of the occurrence probability of the recessive symbol.

The estimated probability tables 3 to 6 for obtaining the estimated value LSZ of the occurrence probability of the recessive symbol corresponding to the status of the context respectively correspond to a certain area of the orgend register.

In the present embodiment, the age register 12
Of the estimated probability table is switched by decoding the second and third bits from the most significant bit (MSB) from the most significant bit (MSB). 2
It decodes the second and third bits, and outputs a switching signal G for switching.

The switching units 7 to 10 are gates that switch between ON and OFF according to a switching signal G output from the decoder 11.

Next, each block will be described in detail.

FIG. 2 shows a method for obtaining a context according to the present embodiment.

Each block shown in FIG. 2A shows each pixel of the image.

First, the surrounding specific region 23 is used as a template for the pixel of interest 2 to be coded. Here, a combination of “1” and “0” of each pixel in the template is called a context, and all the contexts are indexed.

The number assigned to each pixel indicates how many bits from the most significant bit (MSB) the index corresponds to in the index.

FIG. 2B shows a combination of "1" and "0" and the index of the context CX corresponding to the combination. When all bits from the first bit to the tenth bit are zero, the context CX becomes zero. If the first bit is 1 and the second to tenth bits are 0, context C
X is 1, and when the second bit is 1 and the first bit and the third to tenth bits are 0, the context CX
Corresponds to 2, and when all of the first to tenth bits are 1, the context CX corresponds to 1023.

FIG. 3 is a conceptual diagram of a status storage unit for storing the status of each context of the status determination unit 1 shown in FIG.

The status storage section stores the status ST corresponding to each context and the value of the priority symbol MPS.

As shown in FIG. 3, the status storage unit
The values of the status ST and the values “1” and “0” of the dominant symbol MPS are stored as variables corresponding to each context, and when the context CX is 0, ST
(0) and the corresponding MPS are context CX
Is 1, ST (1) and the corresponding MPS are
If the context CX is 1023, ST (102
3) and the corresponding priority symbol MPS are stored.

Here, the status ST is the dominant symbol MPS of the coded pixel of interest estimated from each context,
This shows the state of the recessive symbol LPS appearance probability.

FIG. 4 shows the structure of a table used in the status updating unit 2 for updating the status of each context based on the information as to whether the pixel of interest is the dominant symbol MPS or the recessive symbol LPS. An updated value indicating the updated value of the context status ST (CX) and a value of “1” or “0”, and the appearance probability of the dominant symbol MPS and the recessive symbol LPS is originally the appearance probability of the dominant symbol MPS ≧ the recessive symbol LPS And a switch indicating "1" that the occurrence probability of "?" Has been reversed during the encoding process.

Here, the update value is composed of NLPS indicating that the pixel of interest to be coded is a recessive symbol LPS and NMPS indicating that it is a dominant symbol MPS.

The status is updated to a value corresponding to a more accurate symbol appearance probability by using this table.

FIG. 5 shows the structure of the estimated probability tables 3 to 6 used for obtaining the estimated value LSZ of the occurrence probability of the recessive symbol from each status. And an estimated value LSZ of the probability of appearance of the corresponding recessive symbol.

Here, the value of the estimated value LSZ of the occurrence probability of the recessive symbol is set in advance based on the occurrence probability of the recessive symbol LPS indicated by the status and the value of an later-described register.

FIG. 6 is a conceptual diagram showing a means for selecting a table according to the value of the augment register, which is provided with a plurality of the tables shown in FIG. 5 in advance, and includes the most significant bit (MSB) of the augment register. From the 11th bit value which is the second bit, the 12th bit value which is the third bit, the value of the status ST corresponding thereto, and the estimated value LSZ of the occurrence probability of the recessive symbol corresponding thereto. It is a table.

FIG. 7 shows a flowchart of the processing of the encoding unit 2 that actually performs encoding using the estimated value LSZ of the occurrence probability of a recessive symbol. Step S3 to step S5
Is a portion for updating the augment register and the encoding register, and steps S6 to S8 are portions for performing normalization.

First, in step S1, initialization processing is performed to set the value A of the augment register to 0 × 800 and the value C of the encoding register to 0 × 000, and then proceed to step S2.

In step S2, the context CX and the coded pixel of interest PIX are read from the image data, and the flow advances to step S3.

In step S3, each register is updated. If the value of the pixel PIX is the dominant symbol MPS, the process proceeds to step S4, and if the value of the pixel PIX is the recessive symbol LPS, the process proceeds to step S5.

In step S4, the estimated value LSZ of the occurrence probability of the recessive symbol is
Is set as a new value of the augment register, and the value NMPS indicating that the coded pixel of interest is the dominant symbol MPS is updated as a new status.

In step S5, a value obtained by subtracting the estimated value LSZ of the occurrence probability of a recessive symbol from the augment register is added to the value of the encoding register. Also, the value of the augment register is set as an estimated value LSZ of the probability of occurrence of a recessive symbol. Further, the value NLPS indicating that the pixel of interest for encoding is the recessive symbol LPS is updated as a new status.

In step S6, the value A of the augment register is compared with 0 × 800. If 0 × 800 or more, the process proceeds to step S9, and if smaller, the process proceeds to step S7.

In step S7, the values of A and C are each shifted by one bit to the left, and then the process proceeds to step S8.

In step S8, the value A of the augment register is compared with 0 × 800. If A is greater than 0 × 800, the process proceeds to step S9, where the value A of the augment register is smaller than 0 × 800. If so, step S7
Return to

In step S9, it is checked whether the data processing has been completed. If completed, the processing is completed. If not completed, the processing returns to step S2.

FIG. 8 is a model diagram showing what these register updates specifically indicate.

FIG. 8A shows a state before updating, and FIG. 8B shows a state after updating.

Here, A and C shown in FIG. 8A indicate the value of the augment register and the value of the encoding register before updating, respectively.

When the pixel of interest to be coded is a recessive symbol LPS, the width A of the age becomes the estimated value LSZ of the probability of occurrence of the recessive symbol corresponding to the probability of occurrence of the recessive symbol LPS, and C represents the change of the lower bound of the age. Is added to A-LSZ.

On the other hand, when the pixel of interest for encoding is the dominant symbol MP
In the case of S, the value of A is A-LSZ. Further, the value of C does not change as shown in FIG.

In the normalization, the value of the augment register is set to 0
This is performed by a shift operation so as to be × 800 or more.

The encoding register is shifted in accordance with the shift of the augment register.

FIG. 9 shows a structural diagram of each register.

FIG. 9A shows an augment register, and FIG. 9B shows an encoding register.

In FIG. 9A, normalization is performed so that the value of the MSB of the augment register indicated by “a” becomes 1.

The MS indicated by "b" in FIG.
The second and third bits from B are two bits used for selecting the estimated probability table.

Each of the estimated probability tables 3 is obtained when the value A of the augment register is 0 × 800 ≦ A ≦ 0 × 9FF, and each of the estimated probability tables 4 is obtained when 0 × A00 ≦ A ≦ 0 × BFF. The probability table 5 is 0 × C00 ≦ A ≦ 0 × D
In the case of FF, each estimated probability table 6 has 0 × E00 ≦ A
Each is selected when ≦ 0 × FFF.

In FIG. 9B, “c” indicates the MSB of the encoding register.

A bit sequence overflowing from the MSB of the encoding register due to the left shift of the encoding register and the augment addition becomes a code sequence.

[0070]

In the arithmetic encoder according to the present invention, as described above, the optimum estimation probability table is selected from the plurality of estimation probability tables by the switching means, so as to correspond to the value of the age register. Since the value of the estimated value LSZ of the occurrence probability of the recessive symbol can be obtained with high accuracy, the coding efficiency can be improved while maintaining the high speed of the conventional method.

[Brief description of the drawings]

FIG. 1 shows a block diagram of an LSZ setting unit of an arithmetic encoder according to the present invention.

FIG. 2 shows a method for obtaining a context according to the embodiment.

FIG. 3 is a conceptual diagram of a storage unit that stores the status of each context.

FIG. 4 shows a structure of a table used in status update.

FIG. 5 shows the structure of a table used when obtaining an estimated value LSZ of the occurrence probability of a recessive symbol from the status.

FIG. 6 is a conceptual diagram of a means for selecting an estimated probability table according to the value of an augment register.

FIG. 7 shows a flowchart of a process of performing encoding using an estimated value LSZ of an occurrence probability of a recessive symbol.

FIG. 8 shows a model diagram of register updating.

FIG. 9 shows a structural diagram of each register.

FIG. 10 is an overall view of a conventionally used JBIG.

FIG. 11 shows a block diagram of a conventionally used LSZ setting unit.

Claims (1)

(57) [Claims] 1. An arithmetic encoder for performing a multiplication-free arithmetic coding by handling a context that is a combination of “1” and “0” of each pixel in a specific area around a pixel of interest to be encoded. Status determination means for obtaining a status; status update means for updating a context status in response to the status supplied from the status determination means; and a constant connected to the status determination means and corresponding to the context status. A plurality of estimated probability tables for obtaining, an augment register for obtaining and outputting a value renormalized by a bit shift operation, and decoding of a predetermined arbitrary bit of a value output from the augment register Decoding means; And a switching means for selecting one from the plurality of estimated probability tables in response to an output of the decoding means.