JP3077383B2 - Automatic wiring mechanism for printed circuit board CAD - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an automatic wiring apparatus for a printed circuit board, and more particularly, to an improvement in a function of determining a detailed wiring pattern in a tile area after obtaining a tile unit path in a two-point connection problem. Things.

[0002]

2. Description of the Related Art A computer-aided printed circuit board design support system (CAD) has been well known. Automatic wiring occupies a very important position in the printed circuit board CAD. In recent years, printed wiring boards have made rapid progress in increasing the density and mounting of components, and higher density is also required in automatic wiring design. By the way, maze methods and line segment search methods are well known as algorithms for automatic wiring. These are design basic grids (grids) based on terminal pitch.
This is an algorithm that searches for a route on the data structure. This method was an appropriate measure for components whose terminal pitch was standardized to 2.54 mm.

However, in recent years, surface mount components have become mainstream, and components having various terminal pitches have been often mounted on a single substrate. It has reached its limit. In addition, a review of the wiring strategy is required. Conventionally, the so-called XY technique of distributing the front layer to horizontal wiring and the rear layer to vertical wiring is common.
It was very effective for insertion mounting components where lands exist on both front and back layers. However, this strategy does not work well for surface mount components where the lands are only on one layer. Therefore, it is necessary to rebuild from the basics. As a method for solving this problem, a method has been proposed in which a grid at regular intervals is firstly defined on the entire surface of the substrate, and a grid according to the terminal pitch is defined only around the surface-mounted component.

[0004]

However, this method has a problem that it is not a fundamental solution because an unnatural processing is forced at a connection point. A specific example is as follows. In the process of searching for the wiring pattern P, in order to search in the X direction or the Y direction and perform XY wiring on the standard grid, the wiring P connected to the obstacles B ₁ and B ₂ as shown in FIG.
_1, P ₂ may not found path connected to the obstacle B ₃ but found. If the method according to the present invention is used, a path (wiring P ₃ ) connecting to the obstacle B ₃ can be found as shown in FIG. Even in the conventional method, the 45-degree conversion is performed as a post-processing, but there is a problem that a wiring that should not be a clearance error cannot be drawn as compared with a case where an oblique processing is performed in a search process.

An object of the present invention is to solve such a problem. In the detailed line determination process after the route tile is determined by the area search, the possibility of diagonal wiring is taken into consideration in the conventional process. In addition to enabling wiring at the shortest distance with less bending compared to the method of skew in post-processing, it also enables wiring that was not possible with conventional devices by searching for area patterns independent of grids It is to provide an automatic wiring mechanism that can be used.

[0006]

In order to achieve the above object, according to the present invention, a tile database creating section for creating at least data relating to each tile in an empty area in advance, and a tile database creating section based on the data of the tile database creating section. A tile unit path determination unit that performs a region search to determine a path in tile units, and examines the relationship between adjacent tiles for each of the determined tiles, and determines adjacent tiles in diagonal directions as well as in the horizontal and vertical directions. It is characterized by including a detailed wiring pattern determination unit that checks the common area while chasing it, and selects a shortest distance outline line from the obtained route.

[0007]

In the tile unit path determination unit, an area is searched for each tile based on a database of each tile created in advance, and a path is determined. The tile unit path determination unit performs a region search to determine a path in tile units. The detailed wiring pattern determination unit checks the relationship between each tile on the determined route and the adjacent tile. In this case, the common area is checked while following the adjacent tiles in the diagonal direction in addition to the horizontal direction and the vertical direction. Then, an optimum route (not necessarily the shortest distance) among the obtained routes is adopted as the wiring pattern.

[0008]

DESCRIPTION OF THE PREFERRED EMBODIMENTS The present invention will be described below in detail with reference to the drawings.
FIG. 1 is a functional block diagram of the automatic wiring mechanism according to the present invention. In this automatic wiring mechanism, restrictions on the positions of terminals and routes do not depend on the grid, and are also called gridless routers. In the figure, 1 is a tile database creation unit for creating a tile database, 2 is a tile unit route determination unit that determines a tile unit route by area search processing, and 3 is a detailed wiring pattern determination unit that determines a detailed wiring pattern in a tile route. It is. The data created by the tile database creation unit 1 is as follows.
For example, as described in Japanese Patent Application No. 2-230877 “Automatic wiring path search method” by the present applicant, an empty area on a printed circuit board is represented by being divided into trapezoidal tiles. Each tile has the coordinates of the four vertices and the bottom and top bottom y of the tile
Coordinates, a pointer to the tile adjacent to the left of the lower left vertex of the tile, a pointer to the tile below the lower left vertex of the tile, a pointer to the tile adjacent to the right of the upper right vertex of the tile, A pointer to a tile adjacent above the upper right vertex is represented as an element. The tile database creation unit 1 creates such data of each tile. The created data is appropriately stored in a storage device (not shown), and is read as needed.
By tracing adjacent tiles based on each tile represented in this way, a wiring path can be searched and a wiring pattern can be obtained.

The operation in such a configuration will be described below. (1) First, as preprocessing, the tile database creation unit 1 creates information on each tile. In the partial view of the printed circuit board shown in FIG. 2, only the tile of the attention portion, that is, the path tiles (a to
(k tiles) only. (2) Next, the tile unit path determination unit 2 obtains a path in tile units by an area search process. The description will be made with reference to FIG. 3 for simplicity. FIG. 3 is a diagram illustrating only the path tiles extracted from the search tiles in FIG. Here, a case where wiring is performed from tile S to E is taken as an example. A region search is performed with S as the start tile and E as the end tile. As a result, S and E are tiles a, b, c,
It is found that a connection can be made through each of the tiles d, e, f, g, h, i, j, and k, and the tile unit path is determined. (3) The detailed wiring pattern determination unit 3 examines the relationship between adjacent tiles for each of the tiles for which a route has been determined, and follows the adjacent tiles in the left-right direction, the up-down direction, and the four diagonal directions of 45 degrees, while following the adjacent tile. The common area until the common area with the above is exhausted is examined, and an optimum outline line is selected from the common area. The case where a rough line is generated from the tile S will be described as follows. In this case, since the tile S is the starting point and the connection surface with the adjacent tile is East, a rough line in the East direction is obtained.

In the present invention, the following general line data structure is prepared to hold general path information. Pointer to search tree that started search Pointer to search tree that completed search Progress direction Common area (minimum and maximum values of x (horizontal direction) at a certain reference point y (vertical direction) Number of search trees traced Next Exit point to tile

For the tile S, the fact that there is only a common area with the a-tile in the East direction and the exit point to the next tile in the common area and the next tile is stored in the outline line data. Subsequently, until a via or a target tile is reached, the process of obtaining a new outline line from the next tile having no common area is repeated. In the case of FIG. 3, outline line data is created from the exit point of the tile a. It should be noted that a route running in each tile is not always unique, and therefore, combinations of wirings are attempted in four diagonal directions in addition to the horizontal direction and the vertical direction. Since the connection surfaces of the tiles a and b are in the North direction, NorthEast, North, North
, Northwest direction approximate line data is obtained. FIG.
(A) is the NorthEast direction, FIG. (B) is the North direction,
FIG. 3C shows that there are schematic lines in the NorthWest direction. The detailed wiring pattern determination unit 3 determines an optimum schematic line from these schematic lines. In the case of FIG. 3, as shown in FIG. 4, there is a common area up to the tile E in the NorthEast direction, and up to the tile h in the North direction, up to the tile W in the North direction.
There is a common area up to tile g in the est direction. The outline line data stores an area in which a line can be drawn in a certain direction, path tile data information thereof, and the like. From these outline line data, the NorthEast direction outline line is selected as the optimum outline line. (4) Finally, a pattern as shown in FIG. 3B is determined between the general lines while drawing auxiliary lines for connecting these lines based on the general line data and the path tile. In the example of FIG. 3, a new auxiliary line is not necessary for the connection between the approximate lines. However, if necessary, an auxiliary line with the shortest distance and little bending is drawn.

[0012]

As described above, according to the present invention, since the diagonal wiring is taken into account when determining the detailed wiring, the shortest optimal path can be selected, and a beautiful wiring pattern with few bends can be generated and the post-process can be performed. Obstacles can be minimized. In particular, the automatic wiring according to the present invention exerts its effect more particularly in the vicinity of an analog wiring board or a connector, in a congested portion of a wiring pattern, or the like.

[Brief description of the drawings]

FIG. 1 is a functional block diagram of an automatic wiring mechanism according to the present invention.

FIG. 2 is a partial view of an embodiment of a printed circuit board.

FIG. 3 is a diagram illustrating a route search.

FIG. 4 is a diagram for explaining a schematic line.

FIG. 5 is a diagram for explaining a conventional wiring pattern.

[Explanation of symbols]

 1 tile database creation unit 2 tile unit route determination unit 3 detailed wiring pattern determination unit

──────────────────────────────────────────────────続 き Continued on the front page (58) Field surveyed (Int.Cl. ⁷ , DB name) G06F 17/50 H05K 3/00

Claims (1)

(57) [Claims] 1. A tile database creating unit for creating in advance data representing constituent elements of each tile expressed by dividing an empty area on a printed board into a trapezoid, and a tile database creating unit based on the data of the tile database creating unit. A tile unit path determination unit that determines a path in tile units by an area search process, and examines the relationship between adjacent tiles for each of the determined tiles, while following the adjacent tiles in the horizontal direction, the vertical direction, and the diagonal four directions. An automatic wiring mechanism for a printed circuit board CAD, comprising a detailed wiring pattern determination unit for checking a common area until the common area with the next route tile is exhausted and selecting a shortest distance outline line from the common area. .