JP3077151B2 - Frequency synthesis method and frequency synthesizer - Google Patents

Description

Description: BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a frequency synthesizing method and a frequency synthesizer, and more particularly to a frequency synthesizing method in which adjustment of a reference oscillator and a controlled oscillator is limited to only a frequency and phase adjustment is unnecessary. It relates to a synthesis method and a frequency synthesizer.

[Conventional technology]

As shown in the block diagram of FIG. 2, a conventional frequency synthesizer includes a voltage-controlled oscillator (hereinafter referred to as VCO) 21 for outputting an arbitrary frequency signal to the outside, and an arbitrary frequency divider receiving the output of VCO 21. A variable frequency divider 22 that outputs after dividing by a number, reference oscillators 23 and 24 that output a frequency signal to be a reference, and a switch 25 that selects and outputs only one of the outputs of the reference oscillators 23 and 24 And an output determination circuit that monitors the outputs of the reference oscillators 23 and 24 and, when a failure of the oscillator output from the switch 25 is detected, controls the switch 25 and selectively outputs the output of the standby oscillator. 26, a fixed frequency divider 27 that receives one of the outputs of the reference oscillators 23 and 24 via the switch 25 and outputs the frequency divided by a predetermined frequency division number, a variable frequency divider 22 and a fixed frequency divider 22. Upon receiving the output of the frequency divider 27 and comparing the phases of the two signals and detecting the phase difference, it outputs an error signal 29. A phase comparator 28 which, in the or a changing state receives the error signal 29 slipping VCO2
And a low-pass filter 30 in addition to 1.

Under such a configuration, when the frequency synthesizer is in a stable state, the outputs of the variable frequency divider 22 and the fixed frequency divider 27 have the same frequency and the same phase. Signal 29 is not output. Here, when the frequency division number of the variable frequency divider 22 is changed in order to synthesize a new frequency, the phase comparator 28 detects that the frequency of the output of the And outputs an error signal 29. The error signal 29 is continuously output, the low-frequency component is extracted by the low-pass filter 30, and the VCO 21 is used as a control signal.
To change the oscillation frequency of VCO21. This operation continues until the phase comparator 28 stops outputting the error signal 29.

[Problems to be solved by the invention]

When the oscillation frequency of the VCO 21 is changed, the conventional frequency synthesizer described above
, An error signal 29 is output, control is continued until the frequencies are the same and in phase, and a sufficient time is required until the oscillation frequency is stabilized at a new oscillation frequency. In addition, the phase comparator 28
Is the error signal if the phase is shifted even at the same frequency
Since 29 is output, a synergistic effect between the difference in frequency and the difference in phase works, and there is a problem in that time is required for further stabilization. This means that when using two reference oscillators, if the switch 25 is operated for some reason and the reference oscillator is switched, the phase may be shifted due to noise at the time of switching even though the frequency is the same. Therefore, the error signal 29 is output, and the oscillation frequency of the VCO 21 is changed once, and it takes time until the frequency is stabilized again.The output of the frequency synthesizer is used as a carrier wave of the communication line. In the case of using a bandwidth of about 5 kHz in a frequency band of about 1 GHz, even if the frequency of 2-3 kHz fluctuates, the line may be temporarily stopped. You will be in.

An object of the present invention is to provide a frequency synthesizing method and a frequency synthesizing apparatus which solve the above-mentioned problems and which can quickly adjust an oscillation frequency and do not cause disturbance of the oscillation frequency when switching a reference oscillator. It is in.

[Means for solving the problem]

According to the frequency synthesizing method of the present invention, an output of a voltage controlled oscillator that oscillates an arbitrary frequency signal is input to a first frequency divider, and an output of a reference oscillator that oscillates a frequency signal to be a reference is divided by a second frequency divider. The outputs of the first and second frequency dividers are input to a phase comparator which outputs a difference signal when a phase difference is detected by comparing the phases of the received signals. In the frequency synthesis method of inputting the error signal to a low-pass filter having a function of smoothing and adding the output of the low-pass filter to the voltage-controlled oscillator to control the arbitrary frequency signal, The first and second frequency dividers are frequency dividers with a reset function. The outputs of the first and second frequency dividers are received and the arrival times of the two signals are compared. The reset signal output by the control circuit that outputs a reset signal. The Tsu bets signal is configured to be input to the first and second frequency dividers.

A frequency synthesizer according to the present invention is a reference that includes a voltage-controlled oscillator that outputs an arbitrary frequency signal, a first frequency-divider that receives an output of the voltage-controlled oscillator and divides the frequency by an arbitrary frequency, and outputs the resultant signal. A reference oscillator for outputting a frequency signal to be output, a second divider for receiving an output of the reference oscillator and dividing the frequency by a predetermined frequency, and an output of the first and second dividers A phase comparator that receives the error signal and detects a phase difference comparing the phases of the two signals and outputs the error signal as an error signal, and a low-pass filter that receives the error signal and smoothly changes the state to be added to the voltage-controlled oscillator. A frequency synthesizer having a reset function in the first and second frequency dividers;
And a control circuit that receives the output of the second frequency divider, compares the arrival times of the two signals, and outputs a reset signal to the first and second frequency dividers when the delayed signal arrives. is there.

Further, the reference oscillator, two oscillators of the same standard, a switch that receives and outputs only one of the two oscillators, and a switch that monitors and outputs the outputs of the two oscillators and outputs the same from the switch. An output determination circuit may be configured to control the switching unit to select and output the output of the oscillator on standby when a failure of the oscillator on the standby side is detected.

〔Example〕

Next, embodiments of the present invention will be described with reference to the drawings.

 FIG. 1 is a block diagram of one embodiment of the present invention.

A frequency synthesizer and a frequency synthesizer according to the present invention include a VCO 1 that outputs an arbitrary frequency signal to the outside, and a variable frequency divider having a reset function of receiving the output of the VCO 1 and dividing the output by an arbitrary frequency to output the frequency. 2, a reference oscillator 3, 4 for outputting a frequency signal to be a reference, a switch 5 for receiving and outputting only one of the outputs of the reference oscillators 3, 4, and a reference oscillator 3,
An output determination circuit 6 for monitoring the output of 4 and detecting a failure of the oscillator on the output side of the switch 5 to select and output the output of the oscillator on the standby side by controlling the switch 5; , A fixed frequency divider 7 having a reset function which receives an output of one of the reference oscillators 3 and 4 via a predetermined frequency divider and outputs the divided frequency, and a variable frequency divider 2 and a fixed frequency divider 7, a phase comparator 8 which compares the phases of the two signals and detects a phase difference and outputs an error signal 9; and a low-pass filter which receives the error signal 9 and smoothly changes the state to be added to the VCO 1. 10 and the outputs of the variable frequency divider 2 and the fixed frequency divider 7 are compared, and the arrival times of the two signals are compared. When the delayed signal arrives, the reset signal 12 is sent to the variable frequency divider 2 and the fixed frequency divider 7. And a control circuit 11 for outputting to

 Next, the operation will be described.

When the frequency synthesizer is in a stable state, the outputs of the variable frequency divider 2 and the fixed frequency divider 7 have the same frequency and the same phase, so that no error signal 9 is output from the phase comparator 8. On the other hand, the control circuit 11 sends a reset signal 12 to the variable frequency divider 2 and the fixed frequency divider 7 each time it receives two signals with no advance or delay. Here, when the frequency division number of the variable frequency divider 2 is changed to synthesize a new frequency,
The phase comparator 8 detects that the frequency of the output of the variable frequency divider 2 has changed as a phase difference from the fixed frequency divider 7 and outputs an error signal 9. On the other hand, the control circuit 11 compares the arrival times each time it receives two signals having advanced and delayed, and outputs a reset signal 12 to the variable frequency divider 2 and the fixed frequency divider 7 when the delayed signal arrives. I do. Since the variable frequency divider 2 and the fixed frequency divider 7 are reset each time the reset signal 12 is received, the output frequency changes under the control of the output signal of the low-pass filter 10 and changes. When the frequency becomes the same as that of the output of the frequency divider 7, it is simultaneously input to the phase comparator 8, so that the error signal 9 is not output, and the control is terminated. At this time, the frequency of each unit is about 1 GHz for VCO 1 and 25 kHz for the input of the phase comparator 8. Here, considering the operations of the variable frequency divider 2 and the fixed frequency divider, it is considered that they operate in the same manner as a frequency counter that counts a certain number of waves. Therefore, the output of the phase comparator 8 is
The difference between the two frequencies may be considered to be the result of sampling at regular intervals.If the sampling period is usually 25 kHz, if it is sufficiently slower than this, the oscillation frequency of VCO1 is controlled to Can be made much faster than the conventional speed.

Next, considering the case where the reference oscillators 3 and 4 are switched, the first wave switched may be out of phase or generate noise at the time of switching.
And the phase of the variable frequency divider 2 is generated,
There is a possibility that the phase comparator 8 outputs the error signal 9. However, since the frequency is divided after being reset once from the second time, it is input to the phase comparator 8 at the same time as long as the oscillation frequency after switching does not change. Therefore,
Since the error signal 9 is not output, the oscillation frequency does not need to be disturbed when the reference oscillator is switched. At this time, even if there is a difference between the phases of the original oscillation frequency of the VCO 1 and the reference oscillator, there is no particular problem because the original oscillation frequency is about 1 GHz and the input of the phase comparator 8 is 25 kHz. It is due to going around.

〔The invention's effect〕

As described above, the present invention provides a variable frequency divider having a reset function of receiving an output of a voltage controlled oscillator and dividing the output at an arbitrary frequency, and a predetermined frequency divider receiving an output of a reference oscillator. A fixed divider with a reset function that outputs after dividing by a number, and the outputs of two dividers are compared, the arrival times of the two signals are compared, and the reset signal is divided by two when the delayed signal arrives By providing a control circuit for output to the oscillator, the control signal for the voltage controlled oscillator is used only for controlling the oscillation frequency and not for adjusting the phase, so that the oscillation frequency can be adjusted quickly. Also, there is an effect that the oscillation of the oscillation frequency is not disturbed when the reference oscillator is switched.

[Brief description of the drawings]

FIG. 1 is a block diagram of an embodiment of the present invention, and FIG. 2 is a block diagram of a conventional frequency synthesizer. 1,21… Voltage controlled oscillator (VCO), 2,22… Variable frequency divider, 3,4,23,24 …… Reference oscillator, 5,25… Switch, 6,26
…… Output decision circuit, 7,27 …… Fixed frequency divider, 8,28 …… Phase comparator, 9,29 …… Error signal, 10,30 …… Low-pass filter, 11
…… Control circuit, 12 …… Reset signal.

Claims (3)

(57) [Claims] An output of a voltage controlled oscillator for oscillating an arbitrary frequency signal is input to a first frequency divider, and an output of a reference oscillator for oscillating a frequency signal to be a reference is input to a second frequency divider. The outputs of the first and second frequency dividers are input to a phase comparator that compares the phases of the received signals, detects a phase difference, and outputs an error signal, and smoothly changes the received signal. Input the error signal to a low-pass filter having a function of
In a frequency synthesis method for controlling the arbitrary frequency signal by adding the output of the reduction filter to the voltage-controlled oscillator, the first and second frequency dividers are frequency dividers with a reset function, The reset signals output from a control circuit that receives the outputs of the first and second frequency dividers, compares the arrival times of the two signals, and outputs a reset signal when the signal arrives with a delay are output. A frequency synthesis method characterized in that the frequency is input to a frequency divider. 2. A voltage-controlled oscillator for outputting an arbitrary frequency signal, a first frequency divider for receiving an output of the voltage-controlled oscillator and dividing the frequency by an arbitrary frequency, and a frequency signal to be used as a reference. A second divider that receives the output of the reference oscillator and divides the output by a predetermined number of divisions, and outputs the second divider that receives the outputs of the first and second dividers. A frequency synthesizer having a phase comparator that compares the phases of two signals and outputs an error signal when a phase difference is detected, and a low-pass filter that receives the error signal, smoothes a change state, and adds the smoothed state to the voltage-controlled oscillator. In the above, the first and second frequency dividers have a reset function, receive the outputs of the first and second frequency dividers, compare two arrival times, and reset when a delayed signal arrives. The signal is output to the first and second frequency dividers. Frequency synthesizer, characterized in that it comprises a control circuit for. 3. The reference oscillator comprises two oscillators of the same standard, a switch for receiving and outputting only one of the two oscillators, and a switch for monitoring the outputs of the two oscillators. 3. An output judging circuit according to claim 2, further comprising an output judging circuit for controlling said switching device to select and output the output of said standby oscillator when a failure of said oscillator outputting from said output is detected. Synthesizer.