JP3064702B2 - Active matrix type liquid crystal display - Google Patents

Active matrix type liquid crystal display

Info

Publication number
JP3064702B2
JP3064702B2 JP29410992A JP29410992A JP3064702B2 JP 3064702 B2 JP3064702 B2 JP 3064702B2 JP 29410992 A JP29410992 A JP 29410992A JP 29410992 A JP29410992 A JP 29410992A JP 3064702 B2 JP3064702 B2 JP 3064702B2
Authority
JP
Japan
Prior art keywords
potential
scanning signal
liquid crystal
signal wiring
active matrix
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP29410992A
Other languages
Japanese (ja)
Other versions
JPH06148675A (en
Inventor
睦 木村
米治 田窪
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Corp
Panasonic Holdings Corp
Original Assignee
Panasonic Corp
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Panasonic Corp, Matsushita Electric Industrial Co Ltd filed Critical Panasonic Corp
Priority to JP29410992A priority Critical patent/JP3064702B2/en
Publication of JPH06148675A publication Critical patent/JPH06148675A/en
Application granted granted Critical
Publication of JP3064702B2 publication Critical patent/JP3064702B2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Landscapes

  • Liquid Crystal (AREA)
  • Liquid Crystal Display Device Control (AREA)
  • Thin Film Transistor (AREA)

Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【0001】[0001]

【産業上の利用分野】本発明は、アクティブマトリクス
型液晶表示装置、とりわけ、低駆動電力、高コントラス
ト・多階調等の高画質、高信頼性等の特長を求められる
アクティブマトリクス型液晶表示装置に関するものであ
る。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an active matrix type liquid crystal display device, and more particularly to an active matrix type liquid crystal display device which is required to have features such as low driving power, high image quality such as high contrast and multiple gradations, and high reliability. It is about.

【0002】[0002]

【従来の技術】アクティブマトリクス型液晶表示装置
は、近年、ハンドヘルドコンピュータ、パーソナルワー
ドプロセッサー、ポータブルテレビなどに広く利用され
ており、さらに利用範囲は拡大する傾向にある。アクテ
ィブマトリクス型液晶表示装置に求められる特性とし
て、低電力駆動、高画質、高信頼性などが挙げられる。
これらの特性を実現するために様々な構成や駆動法が、
検討、実用化されている。
2. Description of the Related Art In recent years, active matrix type liquid crystal display devices have been widely used in hand-held computers, personal word processors, portable televisions, and the like, and the range of use has been expanding. Characteristics required for an active matrix type liquid crystal display device include low power driving, high image quality, and high reliability.
Various configurations and driving methods to achieve these characteristics
It has been studied and put into practical use.

【0003】特に、特開平02-000913号公報、特開平02-
157815号公報で提案されているような、絵素電極に容量
的に結合している走査信号配線の電位を変化させること
により、絵素電極の電位を変調する駆動法(以下、容量
結合駆動と記す。)では、液晶の誘電率異方性等に起因
する直流成分を除去することが可能であり、対向電極電
位一定かつ表示信号振幅小、すなわち低消費電力が実現
できる等の特性を有し、上記の要求を満たす駆動法とし
て注目されている。
[0003] In particular, JP-A-02-000913, JP-A-02-000913
A driving method that modulates the potential of a pixel electrode by changing the potential of a scanning signal line that is capacitively coupled to the pixel electrode as proposed in Japanese Patent No. 157815 (hereinafter referred to as capacitive coupling driving). ), It is possible to remove a direct current component caused by the dielectric anisotropy of the liquid crystal, and to have characteristics such that the potential of the counter electrode is constant and the display signal amplitude is small, that is, low power consumption can be realized. , As a driving method satisfying the above requirements.

【0004】しかし、従来の容量結合駆動では、EWS
対応等の超大画面、大容量ディスプレイに対しては、横
クロストークの問題が発生していた。横クロストークと
は、本来同一輝度をもたなければならない画面上の領域
が、それぞれ同時刻にオン状態になる他の絵素のパター
ンに依存して異なる輝度をもつ現象であり、画質上非常
に深刻な問題である。横クロストークの原因は、表示信
号配線と対向電極とが容量的に結合しているために、表
示信号電位変化によって対向電極電位に振動成分が誘起
されることにより、希望する液晶印加電圧が得られない
ことにある。表示信号配線毎に表示信号電位の極性を反
転する駆動法(以下、V反転駆動と記す。)によれば、
隣接する表示信号同士で打ち消し合うために対向電極電
位振動成分は事実上消滅し、横クロストークは観測され
なくなることがよく知られている。従来の構成のアクテ
ィブマトリクス型液晶表示装置では、容量結合V反転駆
動は原理的に不可能であった。
However, in the conventional capacitive coupling drive, the EWS
For an ultra-large screen and a large-capacity display, for example, a horizontal crosstalk problem has occurred. Horizontal crosstalk is a phenomenon in which areas on the screen that must originally have the same luminance have different luminances depending on the pattern of other picture elements that are turned on at the same time. Serious problem. The cause of the horizontal crosstalk is that the display signal wiring and the counter electrode are capacitively coupled, and a change in the display signal potential induces a vibration component in the counter electrode potential to obtain a desired liquid crystal applied voltage. Can not be done. According to the driving method of inverting the polarity of the display signal potential for each display signal wiring (hereinafter, referred to as V inversion driving),
It is well known that the counter electrode potential oscillation component effectively disappears because adjacent display signals cancel each other out, and no horizontal crosstalk is observed. In an active matrix type liquid crystal display device having a conventional structure, capacitively coupled V inversion driving was impossible in principle.

【0005】[0005]

【発明が解決しようとする課題】本発明は、容量結合V
反転駆動を可能とするアクティブマトリクス型液晶表示
装置を提供することを目的とする。これにより、横クロ
ストーク等の現象を解消し、低電力、高画質、高信頼性
などの特性を実現することができる。
SUMMARY OF THE INVENTION The present invention provides a capacitive coupling V
It is an object of the present invention to provide an active matrix type liquid crystal display device capable of inversion driving. Thereby, phenomena such as horizontal crosstalk can be eliminated, and characteristics such as low power, high image quality, and high reliability can be realized.

【0006】[0006]

【課題を解決するための手段】上記の目的を達成するた
めに、本発明に係るアクティブマトリクス型液晶表示装
、走査信号配線と表示信号配線とがマトリクス状に
形成され、前記走査信号配線と前記表示信号配線との交
点に対応して絵素電極およびスイッチング素子が形成さ
れたアクティブマトリクス型液晶表示装置であって、前
記絵素電極が、前記表示信号配線1本あるいは数本毎に
異なる前記走査信号配線との間で蓄積容量を形成するこ
とを特徴とする。上記アクティブマトリクス型液晶表示
装置においては、スイッチング素子のオン期間の前後に
走査信号配線に補償電圧が印加されており、走査信号配
線1本または数本ごとに前記オン期間の前の補償電圧同
士の極性が反転しており、かつ走査信号配線1本または
数本ごとに前記オン期間の後の補償電圧同士の極性が反
転していることが好ましい。
In order to achieve the above object, an active matrix type liquid crystal display device according to the present invention is provided.
The scanning signal wiring and the display signal wiring are arranged in a matrix.
Formed between the scanning signal wiring and the display signal wiring.
Pixel electrodes and switching elements are formed
Active matrix type liquid crystal display device
The picture element electrode is provided every one or several display signal wires.
Forming a storage capacitor between the different scanning signal wirings;
And features . In the above active matrix liquid crystal display device, a compensation voltage is applied to the scanning signal wiring before and after the on-period of the switching element, and the compensation voltage before the on-period before the on-period is changed every one or several scanning signal wirings. It is preferable that the polarity is inverted and the polarity of the compensation voltages after the ON period is inverted every one or several scanning signal wirings.

【0007】[0007]

【作用】上述のように、本発明によれば、絵素電極が、
表示信号配線1本あるいは数本毎に、異なる前記走査信
号配線との間で蓄積容量を形成していることにより、ス
イッチング素子のオフ期間に絵素電極にかける変調の極
性を、表示信号配線1本あるいは数本毎に、反転させる
ことができる。すなわち、容量結合V反転駆動を行なう
ことができる。
As described above, according to the present invention, the picture element electrode
By forming a storage capacitor between one or several display signal lines and the different scanning signal lines, the polarity of the modulation applied to the pixel electrodes during the off period of the switching element can be changed. It can be inverted every book or every few books. That is, capacitive coupling V inversion driving can be performed.

【0008】[0008]

【実施例】(実施例1)本発明の第1の実施例を、(図
1)に示す。ここでは、スイッチング素子として薄膜ト
ランジスタ(TFT)を用いた液晶表示装置を使用し
た。同図(a)において、1は走査信号配線、2は表示信
号配線である。3はTFTで、そのゲート電極は走査信
号配線1と、ソース電極は表示信号配線2と接続してい
る。4は絵素電極で、TFT3のドレイン電極に接続さ
れている。5は対向電極、6は絵素電極4と対向電極5
間に形成される液晶容量(Clc)、7は、液晶層の電荷
保持能力不足分を補償し、走査信号配線電位の変化によ
り絵素電極に変調をかけるために、絵素電極4と走査信
号配線1との間に形成された蓄積容量(Cst)であり、
表示信号配線2の1本毎に異なる走査信号配線1(前段
ゲート、後段ゲート)と接続している。8はTFT3の
ゲート電極とドレイン電極間に発生する寄生容量である
ゲート=ドレイン容量(Cgd)である。同図(b)におけ
る1vは走査信号、同図(c)における2vは表示信号で
ある。
(Embodiment 1) A first embodiment of the present invention is shown in FIG. Here, a liquid crystal display device using a thin film transistor (TFT) as a switching element was used. In FIG. 1A, reference numeral 1 denotes a scanning signal line, and 2 denotes a display signal line. A TFT 3 has a gate electrode connected to the scanning signal wiring 1 and a source electrode connected to the display signal wiring 2. Reference numeral 4 denotes a picture element electrode which is connected to the drain electrode of the TFT 3. 5 is a counter electrode, 6 is a picture element electrode 4 and a counter electrode 5
The liquid crystal capacitance (Clc) 7 formed between the pixel electrode 4 and the scanning signal is used to compensate for the lack of charge holding capacity of the liquid crystal layer and to modulate the pixel electrode by a change in the scanning signal wiring potential. A storage capacitance (Cst) formed between the wiring 1 and the wiring 1;
Each of the display signal wirings 2 is connected to a different scanning signal wiring 1 (front gate, rear gate). Reference numeral 8 denotes a gate = drain capacitance (Cgd) which is a parasitic capacitance generated between the gate electrode and the drain electrode of the TFT 3. 1v in FIG. 2B is a scanning signal, and 2v in FIG. 2C is a display signal.

【0009】駆動電位関係について、(図2)を用いて
説明する。同図(a)は、オン期間直後負側補償電位によ
る変調、同図(b)は、オン期間直前正側補償電位による
変調、同図(c)は、オン期間直後正側補償電位による変
調、同図(d)は、オン期間直後負側補償電位による変調
を表わす。1vaは注目している絵素のTFTゲート電
極に接続する走査信号配線1に印加される電位、1vb
は絵素電極4に蓄積容量を介して接続する走査信号配線
1に印加される電位、1v1はTFTオフ電位レベル、
1v2はTFTオン電位レベル、1v3は補償電位
(+)レベル、1v4は補償電位(−)レベル、4vは
絵素電極4に伝達される電位、5vは対向電極電位(一
定値)である。補償電圧はTFTオン期間の直前直後に
印加されている。表示信号2vの極性は表示信号配線2
の1本毎に反転(空間的に反転)しており(V反転)、
これに対応して、補償電圧はTFTオン期間の前後で極
性が反転している。なお、表示信号2vは、走査信号配
線1の1本毎に反転(時間的に反転)しており(以下、
H反転と記す。)、これに対応して、補償電圧は走査信
号配線1の1本毎に極性が反転している。
The driving potential relationship will be described with reference to FIG. FIG. 2A shows modulation by the negative compensation potential immediately after the ON period, FIG. 2B shows modulation by the positive compensation potential immediately before the ON period, and FIG. 2C shows modulation by the positive compensation potential immediately after the ON period. (D) shows the modulation by the negative compensation potential immediately after the ON period. 1va is the potential applied to the scanning signal wiring 1 connected to the TFT gate electrode of the picture element of interest, 1vb
Is a potential applied to the scanning signal wiring 1 connected to the pixel electrode 4 via a storage capacitor, 1v1 is a TFT off potential level,
1v2 is a TFT ON potential level, 1v3 is a compensation potential (+) level, 1v4 is a compensation potential (-) level, 4v is a potential transmitted to the pixel electrode 4, and 5v is a counter electrode potential (constant value). The compensation voltage is applied immediately before and after the TFT ON period. The polarity of the display signal 2v is
(V inversion)
Correspondingly, the polarity of the compensation voltage is inverted before and after the TFT ON period. The display signal 2v is inverted (temporally inverted) for each of the scanning signal wirings 1 (hereinafter, referred to as the scanning signal wiring 1).
Recorded as H inversion. Correspondingly, the polarity of the compensation voltage is inverted for each scanning signal line 1.

【0010】(図1)に示した構成に(図2)で示した
電位を印加したときの絵素電極電位を、4vに示す。こ
こで、 Ctot=Clc+Cst+Cgd ktg=Cgd/Ctot kzg=Cst/Ctot としたときに、 ktg(V(on)−V(off))+kzg(Vge(+)+Vge(-))/2=0 を満たすように各電位を設定しておいた。これにより、
表示信号振幅中心と絵素電極電位振幅中心および対向電
極電位が一致するため、液晶の誘電率異方性等に起因す
る直流成分は現れず、また、表示信号振幅は小さいまま
で液晶印加電圧を大きくすることができるため、低消費
電力が実現できる。
The potential of the picture element electrode when the potential shown in FIG. 2 is applied to the configuration shown in FIG. Here, when Ctot = Clc + Cst + Cgdktg = Cgd / Ctotkzg = Cst / Ctot, ktg (V (on) -V (off)) + kzg (Vge (+) + Vge (-)) / 2 = 0 is satisfied. Each potential was set as described above. This allows
Since the display signal amplitude center, the pixel electrode potential amplitude center, and the counter electrode potential match, no DC component due to the dielectric anisotropy of the liquid crystal appears, and the liquid crystal applied voltage remains low while the display signal amplitude remains small. Since the size can be increased, low power consumption can be realized.

【0011】実際に、(図1)に示すアレイ構造を持つ
液晶パネルに電位を印加して、特性改善の効果を検証し
た。ウィンドウパターンを表示して対向電極電位の波形
をオシロスコープにより観察したところ、対向電極電位
振動成分は観測されなかった。また、目視にしたところ
では、横クロストークは完全に解消していた。(実施例
2)〜(実施例5)についても同様である。
A potential was actually applied to a liquid crystal panel having the array structure shown in FIG. 1 to verify the effect of improving the characteristics. When the window pattern was displayed and the waveform of the counter electrode potential was observed using an oscilloscope, no counter electrode potential oscillation component was observed. Also, when visually observed, the horizontal crosstalk was completely eliminated. The same applies to (Example 2) to (Example 5).

【0012】(実施例2)本発明の(実施例2)を、
(図3)に示す。同図(a)において、蓄積容量7は、表
示信号配線2の数本毎に異なる走査信号配線1と接続し
ている。同図(b)における走査信号配線電位1vは、1
本毎に補償電圧の極性が反転しており、同図(c)におけ
る表示信号配線電位2vは、補償電圧の極性の反転に対
応して、空間的に数本毎に、時間的には1本毎に極性が
反転している。
(Embodiment 2) According to Embodiment 2 of the present invention,
(FIG. 3). In FIG. 1A, the storage capacitor 7 is connected to different scanning signal lines 1 every several display signal lines 2. The scanning signal wiring potential 1v in FIG.
The polarity of the compensation voltage is inverted for each line, and the display signal wiring potential 2v in FIG. The polarity is inverted for each book.

【0013】(実施例3)本発明の(実施例3)を、
(図4)に示す。同図(a)において、蓄積容量7は、表
示信号配線2の1本毎に異なる走査信号配線1と接続し
ている。同図(b)における走査信号配線電位1vは、数
本毎に補償電圧の極性が反転している(必ずしも、単一
の走査信号配線1に対して、オン期間の前後において補
償電圧の極正が一致している必要はない)。同図(c)に
おける表示信号配線電位2vは、補償電圧の極性の反転
に対応して、空間的に1本毎に、時間的には数本毎に極
性が反転している。なお、蓄積容量7が表示信号配線2
の数本毎に走査信号配線1と接続している場合も実現で
きる。
(Embodiment 3) The (Embodiment 3) of the present invention
(FIG. 4). In FIG. 1A, the storage capacitor 7 is connected to a different scanning signal line 1 for each display signal line 2. In the scanning signal wiring potential 1v in FIG. 3B, the polarity of the compensation voltage is inverted every few lines (the polarity of the compensation voltage is not necessarily different for a single scanning signal wiring 1 before and after the ON period). Do not have to match). The polarity of the display signal wiring potential 2v in FIG. 9C is inverted spatially every one line and temporally every several lines corresponding to the inversion of the polarity of the compensation voltage. The storage capacitor 7 is connected to the display signal wiring 2.
It is also possible to realize a case where every few lines are connected to the scanning signal wiring 1.

【0014】(実施例4)本発明の(実施例4)を、
(図5)に示す。スイッチング素子のオン期間が2カ所
存在している。なお、蓄積容量7が表示信号配線2の数
本毎に異なる走査信号配線1と接続している場合、ある
いは、走査信号配線電位1vが数本毎に補償電圧の極性
が反転している場合も実現できる。
(Embodiment 4) According to (Example 4) of the present invention,
(FIG. 5). There are two ON periods of the switching element. It should be noted that the storage capacitor 7 may be connected to different scanning signal wirings 1 for every several display signal wirings 2 or the polarity of the compensation voltage may be inverted every several scanning signal wiring potentials 1v. realizable.

【0015】なお、以上に述べた本発明の実施例では表
示信号はH反転で供給されたが、1フレーム毎に表示信
号の電圧極性を反転する、いわゆる1F反転駆動の場合
も適用できることは、容易に類推できる。
In the above-described embodiment of the present invention, the display signal is supplied by H inversion. However, the present invention can be applied to a so-called 1F inversion drive in which the voltage polarity of the display signal is inverted every frame. It can be easily analogized.

【0016】[0016]

【発明の効果】以上のように、本発明によれば、絵素電
極が、表示信号配線1本あるいは数本毎に、異なる前記
走査信号配線との間で蓄積容量を形成していることによ
り、スイッチング素子のオフ期間に絵素電極にかける変
調の極性を、表示信号配線1本あるいは数本毎に反転さ
せること、すなわち、容量結合V反転駆動を行なうこと
ができる。これにより対向電極電位振動成分は消滅し、
横クロストークは解消する。つまり、アクティブマトリ
クス型表示素子において、低電力、高信頼性などの特性
は保ちつつ、従来よりも優れた画質を得ることが可能と
なる。
As described above, according to the present invention, the picture element electrode forms a storage capacitor between one or several display signal wirings and the different scanning signal wirings. In addition, the polarity of the modulation applied to the picture element electrode during the off period of the switching element can be inverted every one or several display signal wirings, that is, capacitive coupling V inversion driving can be performed. As a result, the counter electrode potential oscillation component disappears,
Lateral crosstalk is eliminated. That is, in the active matrix display element, it is possible to obtain image quality superior to the conventional one while maintaining characteristics such as low power and high reliability.

【図面の簡単な説明】[Brief description of the drawings]

【図1】本発明の実施例1を説明するアレイ回路図およ
び電位関係図
FIG. 1 is an array circuit diagram and a potential relation diagram illustrating a first embodiment of the present invention.

【図2】本発明の実施例における絵素電極電位の変化を
説明する電位関係図
FIG. 2 is a potential relation diagram for explaining a change in a pixel electrode potential in an embodiment of the present invention.

【図3】本発明の実施例2を説明するアレイ回路図およ
び電位関係図
FIG. 3 is an array circuit diagram and a potential relation diagram illustrating a second embodiment of the present invention.

【図4】本発明の実施例3を説明するアレイ回路図およ
び電位関係図
FIG. 4 is an array circuit diagram and a potential relationship diagram illustrating a third embodiment of the present invention.

【図5】本発明の実施例4を説明するアレイ回路図およ
び電位関係図
FIG. 5 is an array circuit diagram and a potential relation diagram illustrating a fourth embodiment of the present invention.

【符号の説明】[Explanation of symbols]

1 走査信号配線 2 表示信号配線 3 TFT 4 絵素電極 5 対向電極 6 液晶容量(Clc) 7 蓄積容量(Cst) 8 ゲート=ドレイン容量(Cgd) 1v 走査信号配線電位 1va 走査信号配線電位(スイッチング素子オン=オ
フ制御線) 1vb 走査信号配線電位(絵素電極電位変調線) 1v1 走査信号配線電位(オフ電位、V(off)) 1v2 走査信号配線電位(オン電位、V(on)) 1v3 走査信号配線電位(正側補償電圧、Vge(+)) 1v4 走査信号配線電位(負側補償電圧、Vge(-)) 2v 表示信号配線電位 4v 絵素電極電位 5v 対向電極電位
Reference Signs List 1 scanning signal wiring 2 display signal wiring 3 TFT 4 picture element electrode 5 counter electrode 6 liquid crystal capacitance (Clc) 7 storage capacitance (Cst) 8 gate = drain capacitance (Cgd) 1v scanning signal wiring potential 1va scanning signal wiring potential (switching element ON = OFF control line) 1vb Scan signal wiring potential (pixel electrode potential modulation line) 1v1 Scan signal wiring potential (OFF potential, V (off)) 1v2 Scan signal wiring potential (ON potential, V (on)) 1v3 Scan signal Wiring potential (positive compensation voltage, Vge (+)) 1v4 Scan signal wiring potential (negative compensation voltage, Vge (-)) 2v Display signal wiring potential 4v Pixel electrode potential 5v Counter electrode potential

───────────────────────────────────────────────────── フロントページの続き (56)参考文献 特開 平2−157815(JP,A) 特開 平4−360127(JP,A) 特開 平6−35418(JP,A) 特開 平2−913(JP,A) (58)調査した分野(Int.Cl.7,DB名) G02F 1/1368 G02F 1/133 550 G09G 3/36 ────────────────────────────────────────────────── ─── Continuation of the front page (56) References JP-A-2-157815 (JP, A) JP-A-4-360127 (JP, A) JP-A-6-35418 (JP, A) JP-A-2- 913 (JP, A) (58) Field surveyed (Int. Cl. 7 , DB name) G02F 1/1368 G02F 1/133 550 G09G 3/36

Claims (2)

(57)【特許請求の範囲】(57) [Claims] 【請求項1】 走査信号配線と表示信号配線とがマトリ
クス状に形成され、前記走査信号配線と前記表示信号配
線との交点に対応して絵素電極およびスイッチング素子
が形成されたアクティブマトリクス型液晶表示装置にお
いて、前記絵素電極が、前記表示信号配線1本あるいは
数本毎に異なる前記走査信号配線との間で蓄積容量を形
成することを特徴とするアクティブマトリクス型液晶表
示装置。
1. An active matrix type liquid crystal in which scanning signal lines and display signal lines are formed in a matrix, and picture element electrodes and switching elements are formed corresponding to intersections of the scanning signal lines and the display signal lines. In the display device, the picture element electrode forms a storage capacitor between the display signal wiring and the scanning signal wiring which differs every several display signal wirings.
【請求項2】 スイッチング素子のオン期間の前後に走
査信号配線に補償電圧が印加されており、走査信号配線
1本または数本ごとに前記オン期間の前の補償電圧同士
の極性が反転しており、かつ走査信号配線1本または数
本ごとに前記オン期間の後の補償電圧同士の極性が反転
していることを特徴とする、請求項1に記載のアクティ
ブマトリクス型液晶表示装置。
2. A run before and after the ON period of the switching element
The compensation voltage is applied to the scanning signal wiring and the scanning signal wiring
Compensation voltages before the ON period every one or several lines
Is inverted, and one or more scanning signal wires
The polarity of the compensation voltages after the ON period is inverted for each book
Characterized in that it is an active matrix type liquid crystal display device according to claim 1.
JP29410992A 1992-11-02 1992-11-02 Active matrix type liquid crystal display Expired - Lifetime JP3064702B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP29410992A JP3064702B2 (en) 1992-11-02 1992-11-02 Active matrix type liquid crystal display

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP29410992A JP3064702B2 (en) 1992-11-02 1992-11-02 Active matrix type liquid crystal display

Publications (2)

Publication Number Publication Date
JPH06148675A JPH06148675A (en) 1994-05-27
JP3064702B2 true JP3064702B2 (en) 2000-07-12

Family

ID=17803410

Family Applications (1)

Application Number Title Priority Date Filing Date
JP29410992A Expired - Lifetime JP3064702B2 (en) 1992-11-02 1992-11-02 Active matrix type liquid crystal display

Country Status (1)

Country Link
JP (1) JP3064702B2 (en)

Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3069280B2 (en) * 1995-12-12 2000-07-24 松下電器産業株式会社 Active matrix type liquid crystal display device and driving method thereof
KR100431627B1 (en) * 1996-12-31 2004-10-08 삼성전자주식회사 Liquid crystal display device and method for driving the same, especially maintaining a capacitor of a pixel to be charged by scan signal inputted to a gate line of a previous stage
KR100495806B1 (en) * 1998-04-16 2005-09-02 삼성전자주식회사 Bi-directional value added liquid crystal display device
JP2002098997A (en) * 2000-09-25 2002-04-05 Toshiba Corp Liquid crystal display device
JP2002122880A (en) * 2000-10-13 2002-04-26 Advanced Display Inc Liquid crystal display device
KR100710161B1 (en) * 2002-10-31 2007-04-20 엘지.필립스 엘시디 주식회사 In-Plane Switching Mode Liquid Crystal Display Device

Also Published As

Publication number Publication date
JPH06148675A (en) 1994-05-27

Similar Documents

Publication Publication Date Title
US6075505A (en) Active matrix liquid crystal display
JP2743841B2 (en) Liquid crystal display
US7705822B2 (en) Liquid crystal display
JP2001282205A (en) Active matrix type liquid crystal display device and method for driving the same
JPH052208B2 (en)
JPH09134152A (en) Liquid-crystal display device
JP3305931B2 (en) Liquid crystal display
JP3292520B2 (en) Liquid crystal display
JP3069280B2 (en) Active matrix type liquid crystal display device and driving method thereof
JP2629360B2 (en) Driving method of liquid crystal display device
US7528815B2 (en) Driving circuit and method for liquid crystal display panel
JP3064702B2 (en) Active matrix type liquid crystal display
JP3182350B2 (en) Driving method of liquid crystal display
US6803895B2 (en) Active matrix display device
JPH02216121A (en) Liquid crystal display device
US7554515B2 (en) Method of driving liquid crystal display
JP3297334B2 (en) Liquid crystal display
JPH10161084A (en) Liquid crystal display device and driving method therefor
JP2005091781A (en) Display device and method for driving the same
JP3176846B2 (en) Driving method of liquid crystal display device
JP3297335B2 (en) Liquid crystal display
JP3361265B2 (en) Display device
JP3103161B2 (en) Liquid crystal display
JP2809950B2 (en) Driving method of display device
JPH06324305A (en) Active matrix display device and its driving method

Legal Events

Date Code Title Description
S111 Request for change of ownership or part of ownership

Free format text: JAPANESE INTERMEDIATE CODE: R313113

R350 Written notification of registration of transfer

Free format text: JAPANESE INTERMEDIATE CODE: R350

FPAY Renewal fee payment (prs date is renewal date of database)

Free format text: PAYMENT UNTIL: 20090512

Year of fee payment: 9

FPAY Renewal fee payment (prs date is renewal date of database)

Free format text: PAYMENT UNTIL: 20090512

Year of fee payment: 9

FPAY Renewal fee payment (prs date is renewal date of database)

Free format text: PAYMENT UNTIL: 20100512

Year of fee payment: 10

S533 Written request for registration of change of name

Free format text: JAPANESE INTERMEDIATE CODE: R313533

FPAY Renewal fee payment (prs date is renewal date of database)

Free format text: PAYMENT UNTIL: 20100512

Year of fee payment: 10

R350 Written notification of registration of transfer

Free format text: JAPANESE INTERMEDIATE CODE: R350

FPAY Renewal fee payment (prs date is renewal date of database)

Free format text: PAYMENT UNTIL: 20100512

Year of fee payment: 10

FPAY Renewal fee payment (prs date is renewal date of database)

Free format text: PAYMENT UNTIL: 20110512

Year of fee payment: 11

FPAY Renewal fee payment (prs date is renewal date of database)

Free format text: PAYMENT UNTIL: 20110512

Year of fee payment: 11

FPAY Renewal fee payment (prs date is renewal date of database)

Free format text: PAYMENT UNTIL: 20120512

Year of fee payment: 12

S531 Written request for registration of change of domicile

Free format text: JAPANESE INTERMEDIATE CODE: R313531

FPAY Renewal fee payment (prs date is renewal date of database)

Free format text: PAYMENT UNTIL: 20120512

Year of fee payment: 12

R350 Written notification of registration of transfer

Free format text: JAPANESE INTERMEDIATE CODE: R350

FPAY Renewal fee payment (prs date is renewal date of database)

Free format text: PAYMENT UNTIL: 20120512

Year of fee payment: 12

FPAY Renewal fee payment (prs date is renewal date of database)

Free format text: PAYMENT UNTIL: 20130512

Year of fee payment: 13

S533 Written request for registration of change of name

Free format text: JAPANESE INTERMEDIATE CODE: R313533

FPAY Renewal fee payment (prs date is renewal date of database)

Free format text: PAYMENT UNTIL: 20130512

Year of fee payment: 13

R350 Written notification of registration of transfer

Free format text: JAPANESE INTERMEDIATE CODE: R350

EXPY Cancellation because of completion of term
FPAY Renewal fee payment (prs date is renewal date of database)

Free format text: PAYMENT UNTIL: 20130512

Year of fee payment: 13