JP3059305B2 - Transmission error detection method and transmission system using the same - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for detecting a transmission error in serial data transmission and a transmission system using the method . The transmission side detects the transmission error by determining whether the bit pattern added to the transmission data on the transmission side and the reception side is the set bit pattern.

[0002]

2. Description of the Related Art In data communication such as communication between computers in a computer network, a signal from a transmitting side and a signal on a receiving side must be the same in order to correctly transmit and receive information. In a communication line, a transmission waveform may be distorted due to its own characteristics or external noise, and a code error may occur. Receiving this as it is causes a serious trouble, so the receiving side needs to detect the presence or absence of an error that has occurred during transmission.

For this reason, conventionally, in serial data transmission, data for checking (hereinafter, referred to as BCC (Block Check Character)) is added to the end of a transmission data string.
er)) to detect a code error. As a calculation means for BCC generation, a parity check method, a checksum method, a cyclic code method (hereinafter, CRC (Cyclic Redundancy C) is used.
mode) is well known.

The parity check method includes a vertical parity check method and a horizontal parity check method. In the vertical parity check method, the number of “1” bits constituting one character is an even number (or In this method, one character is formed by adding a parity bit so as to be odd, and the number of "1" in one character is counted. Similarly, in the horizontal parity check method, a check bit is added to the end of one block so that the number of "1" s of the same bit of each character of each block becomes an even number (or an odd number). In this method, the number of "1" s of the same bit is counted, and if it is even, it is determined to be good, and if it is odd, it is determined that there is an error.

The checksum method uses a bit unit for each character.
After the block transfer, the addition result is transferred and received.
This is a method for comparing the received bit on the receiving side with the addition result.
You. The CRC method considers transmission data as a polynomial,
Divide by a preset generator polynomial, check the remainder
This is a method of transmitting after block transmission. An example
For example, data “10010101” is transmitted in this order.
I believe. Polynomial based on this binary data
When displayed, P (X) = 1 + X^Two+ X^Four+ X ⁷Becomes
Then, the generator polynomial G (X) arbitrarily determined in advance is represented by G
(X) = 1 + X^Two+ X^Four+ X⁶And P (X) has many generators
Highest order term X of term G (X)⁶And generate this polynomial
The remainder obtained by dividing by the expression G (X) is a check bit.
If X^Five+ X^FourWhich is expressed in binary notation as 110
000. The transmission data F (X) is
X⁶-It is added to P (X), and F (X) =
X⁶・ P (X) + (X^Five+ X^Four). On the receiving side,
Divide received F (X) by generator polynomial G (X)
If it can be cut, it is good.If it is not divisible, the received data is abnormal.
It is determined that there is.

Hereinafter, an operation of data transfer when a transmission error is detected by the CRC method will be described with reference to FIG. 5 and FIG. Now, it is assumed that a block including 8-bit data A, B, C, and D is transmitted from the transmission side as shown in FIG. In the figure, X and Y are data of data blocks before and after the transmission data A to D. After the data X, the data A to D are converted from parallel to serial and sent out on the transmission line. Subsequently, CRC data (r15 to r0) calculated for the data A to D is transmitted, and subsequently, the data Y is transmitted.

[0007] On the receiving side, the received bit string is regarded as data X, data A,..., Data D in the order of reception, and the next 16 bits are CRC data.
Read the bit as data Y. Next, the received data is regarded as a polynomial and divided by a generator polynomial G (X),
When the transmission is performed normally, the transmission data and the reception data are the same, and the reception data is divisible.

On the other hand, as shown in FIG. 6, one bit X? Between data X0 and X1 of data X during transmission. Is inserted, the received data is shifted one bit at a time. Therefore, when the received data is divided by the generator polynomial G (X), it becomes indivisible, and it can be detected that a transmission error has occurred. .

[0009]

However, the conventional transmission error detection method described above does not have sufficient error detection capability when a bit insertion / deletion transmission error occurs in a serial data string on a transmission line, and the vertical parity In the case of the check method, an error occurs in an even number of bits in one character, and in the case of the horizontal parity check method, an even number of errors occur in the same bit in a block. In such a case, an error cannot be detected. Similarly, in the case of the checksum method, there is an unsolved problem that the error cannot be detected when an even number of errors occur in one character.

Further, the CRC system can detect most transmission errors, but cannot detect errors when certain conditions are satisfied, and erroneously recognizes erroneous received data as correct data. Issues.
For example, when transmitting the data shown in FIG. 5, when the MSBs (X7 and D7) of the data X and the data D are both “0”, or when the MSB (X7) of the data X is “0” and the data A to If D is equal to a power of the generator polynomial, no bit error can be detected.

Therefore, the present invention has been made in view of the above-mentioned unsolved problems of the prior art, and a transmission error detection method capable of reliably detecting a transmission error due to insertion or deletion of a bit during transmission. And a transmission system using the same.

[0012]

Means for Solving the Problems] transmission error detection method according to claim 1 of the present invention in order to achieve the above object, the transmitting side
Is set to "0,
Fixed bit that contains only one sequence of "1" or "1,0"
After adding the pattern, add this fixed bit pattern
Transmission error in the serial transmission data
Add check data for detection and send.
Performs transmission error detection by the CRC scheme based on the data for the checking of the received data in the error detection unit of the reception side, the received data in the bit pattern comparator
Wherein the bit pattern in a specific position determined whether said fixed bit pattern, even when the bit pattern in the specific position of the received data is not the fixed bit pattern, and judging a transmission error has occurred in . Further, a transmission system according to claim 2 of the present invention.
Means that the transmitting device transmits the serial transmission data and
Make the receiving device detect the transmission error.
In the transmission system, the transmitting device should
"0,
Fixed bit that contains only one sequence of "1" or "1,0"
Bit pattern adding means for adding a pattern;
C is added to the serial transmission data with the fixed bit pattern added.
For checking to detect transmission error by RC method
Check data adding means for adding data,
The receiving-side device is configured to receive the preceding serial transmission data in the received serial transmission data.
Transmission error by CRC method based on the check data
Error detection means for detecting the serial transmission
Bit pattern at a specific position of transmission data and the fixed
Bit pattern matching means for matching bit patterns
And when the transmission error is detected by the error detection means or before
The bit at the specific position in the bit pattern matching unit
That the pattern does not match the fixed bit pattern
Determining means for determining that a transmission error has occurred when detected
And the following.

[0013]

In the transmission error detecting method according to claim 1 of the present invention ,
The fixed bit pattern and its
Is set, and the transmitting side performs serial transmission.
The fixed bit pattern specified at the specified addition position of the data
Turn, and the fixed bit pattern
Transmission error in CRC for real transmission data
Adds check data for detection and sends
You. On the receiving side, the error detector detects the received data
Based on the check data in the
Transmission error detection, and furthermore, the bit pattern matching unit
And the bit pattern at the preset addition position of the received data.
Whether the pattern is a preset fixed bit pattern
Collate. Then, on the receiving side, bit pattern matching
In the section, the bit pattern of the preset additional position is
Even if it is determined that the bit pattern is not a fixed bit pattern,
It is determined that a transmission error has occurred. Here, as the fixed bit pattern, a bit pattern including only one row of “0, 1” or “1, 0” is set. For example, “0, 1” is set as the fixed bit pattern.
When “1” is set and one bit of data is deleted at a position higher than the fixed bit pattern,
“1” and “0” are set at the predetermined addition positions of the reception data.
Or 1 ”. At this time, since“ 0, 1 ”is set as the fixed bit pattern in this arrangement order, any one of“ 0 ”and“ 1 ”results in an error, and a transmission error is detected. Therefore, when error detection is performed by the CRC method based on the check data, when bit data is inserted or deleted during transmission, an error may not be detected in some cases. However, since a fixed bit pattern is added together with the check data and transmitted and error detection is performed based on this, it is possible to detect a transmission error that cannot be detected by the error detection by the CRC method. , It is possible to more reliably detect a transmission error.
Further, in the transmission system according to claim 2, the transmission side device
Is a bit pattern for serial transmission data to be transmitted.
"0,1" or "0,1"
Fixed bit pattern containing only one row of "1,0"
And the serial with this fixed bit pattern
Check data adding means is CRC method for transmission data
Check data for detecting transmission errors using the formula
Is added. And fixed bit pattern and check
Serial transmission data with data for
You. On the other hand, in the receiving device, the error detecting means
Check data added to serial transmission data
Error detection based on the CRC method based on the
The bit pattern matching means receives the serial transmission
A bit pattern at a specific position of data and the fixed bit
Against the cut pattern. Then, C is detected by the error detection means.
When a transmission error is detected by the RC method or when a bit pattern
To the specific position of the serial transmission data received by the
Bit pattern does not match the fixed bit pattern
Transmission error has occurred in the judgment means
Is determined. Here, as a fixed bit pattern,
Bits containing only one sequence of “0, 1” or “1, 0”
For example, the fixed pattern
Fixed when “0, 1” is set as the bit pattern
At the position higher than the bit pattern,
If the data is deleted, a preset
In addition position, "1" and "0 or 1" are located.
Become. At this time, “0, 1” is used as the fixed bit pattern.
Are set in this order, so what is "0 or 1"
Even if this is an error, transmission errors will be detected.
Become. Therefore, the CRC method is based on the check data.
When error detection is performed by the formula, the bit data
Error when insertion or deletion of data
May not be detected, but may not be
Is transmitted with a fixed bit pattern added to it.
Error detection, the CRC method
Detects transmission errors that cannot be detected by error detection
Transmission errors can be detected more reliably
Becomes

[0014]

Embodiments of the present invention will be described below with reference to the drawings. FIG. 1 is a schematic configuration diagram showing one embodiment of the present invention. In FIG. 1, reference numeral 1 denotes a transmitting device, and 5 denotes a receiving device, and performs error control and communication control between the transmitting device 1 and the receiving device 5 for performing signal conversion of data and detecting an error during transmission. Transfer data.

The transmission apparatus 1 includes a transmission processing unit 2 that performs signal conversion of transmission data P input from, for example, a keyboard, and performs communication control of data exchange with the reception apparatus 5, and adds error detection information for error detection. It comprises a bit pattern setting unit 3 and a CRC generation unit 4 for generating the transmission data R. In the bit pattern setting unit 3, a fixed bit pattern arbitrarily set in advance between the transmitting device 1 and the receiving device 5 is included in the transmitted transmission data P from the transmission processing unit 2 to form the transmission frame P. And outputs it to the CRC generating unit 4.

Here, the fixed bit pattern can be added to an arbitrary bit position in the transmission data P as long as the bit position is related to an operation in the CRC system, and the number of bits to be added is set arbitrarily. be able to. When the number of bits to be added is two, a 1-bit transmission error can be detected. When three fixed bits are added, a two-bit transmission error can be detected. , N bits, N-1 bit errors can be detected. The fixed bit patterns to be added are, for example, as shown in FIG.
1,0,0 "," 1,1,1,0 "," 0,1,1,
"0, 1" or "1, 0" in the bit pattern, such as "1", "0, 0, 1, 1", "0, 0, 0, 1".
Sort it can be arbitrarily set as long as the conditions are met pattern that does not come out only once that.

The CRC generation unit 4 adds a check bit based on the transmission data P to which the bit pattern input from the bit pattern setting unit 3 is added. The check bit regards the input transmission data P as a polynomial,
The remainder obtained by dividing by a generator polynomial arbitrarily set in the transmitting device 1 and the receiving device 5 in advance, and
And transmits it to the receiving device 5 as transmission data R. In addition, the CRC generation unit 4 holds the transmission data R with the check bit added until a transmission normal signal is input from the reception processing device 8, and when a transmission abnormal signal is input from the reception processing device 8, the held transmission data R The data R is transmitted again.

On the other hand, the receiving device 5 receives the transmission data R from the transmission device 1 and detects whether or not the transmission data R has an error. And a reception processing unit 8 that performs the following. The bit pattern matching unit 6 checks the bit pattern of the transmission data R input from the transmitting device 1. Regarding the fixed bit pattern added to the input transmission data R, the additional position, the additional bit number, and the additional bit pattern are the additional position, the additional bit number, and the additional bit pattern arbitrarily set in advance together with the transmitting device 1. It is determined whether or not the bit pattern is a preset bit pattern, and the fact that the fixed bit pattern is normal is transmitted to the reception processing unit 8. When the additional bit pattern of the received transmission data R is not a preset bit pattern, the fact that the fixed bit pattern is abnormal is transmitted to the reception processing unit 8.

The error detector 7 regards the transmission data R as a polynomial based on the transmission data R input from the transmission device 1 and generates a generator polynomial G arbitrarily set in advance by the transmission device 1 and the reception device 5. (X), and as a result, when the polynomial of the transmission data R is divisible, it is assumed that the transmission data R has no error, and the fact that the transmission data R is normal is transmitted to the reception processing unit 8 and the transmission side is transmitted. The added CRC check bit and fixed bit pattern are deleted from the transmission data R, and the deleted data is output to the reception processing unit 8. Transmission data R
Is not divisible by the generator polynomial G (X), it is determined that a transmission error has occurred in the transmission data R, and the fact that the transmission data R is abnormal is transmitted to the reception processing unit 8.

The reception processing unit 8 controls the communication with the transmission processing unit 2 and inputs the error detection results from the bit pattern collation unit 6 and the error detection unit 7, and receives the bit pattern collation unit 6 and the error detection unit 7. If both error detection results are normal, the transmission normal transmission signal is transmitted to the CRC generation unit 4 and the data input from the error detection unit 7 is output to the host computer or the like as the reception data Q. When an abnormal signal is input from one of the bit pattern matching unit 6 and the error detecting unit 7, a transmission abnormal signal is transmitted to the CRC generating unit 4.

Next, the operation of the above embodiment will be described. Now, as shown in FIG. 2, it is assumed that one block of data consisting of 8-bit data X, A, B, C, D, and Y is transmitted from the transmitting device 1 to the receiving device 5. Here, the data X and Y are data of data blocks before and after the data A to D. .., X6, X7 from the lower bits, and the data A
, A6, A7, and the bit string of data B are B0, B1,..., B6, B7,
The bit sequence of the data C is C0, C1,..., C6, C
7. The bit string of the data D is D0, D1,.
6, D7, the bit string of the data Y are Y0, Y1,.
, Y6 and Y7.

The transmission data converted by the transmission processing unit 2 is output to the bit pattern setting unit 3. Here, the data A is previously transmitted between the transmitting device 1 and the receiving device 5.
It is assumed that data 1 and 0 are set as fixed bit patterns in the lower two bits A1 and A0 of. In the bit pattern setting unit 3, the bit A of the data A
Data 1 and 0 are added to 1, A0 and output to the CRC generator 4.

The CRC generator 4 generates check bits for the data A to D among the input data. First, data A (A7 to A0) is converted to a polynomial PA
When expressed as (X), PA (X) = A7 + A6.X + A5
・ X ² + A4 ・ X ³ + A3 ・ X ⁴ + A 2 ・ X ⁵ + A 1 ・
X ⁶ + A0X ⁷ Here, the generator polynomial G (X) arbitrarily set in advance between the transmitting device 1 and the receiving device 5 is represented by G
(X) = X ¹⁶ + X ¹² + X ⁵ +1. Polynomial PA
By multiplying (X) by the highest order term X ¹⁶ of the generator polynomial G (X), X ¹⁶ · PA (X) = X ¹⁶ · (A7 + A6 · X + A5
・ X ² + A4 ・ X ³ + A3 ・ X ⁴ + A 2 ・ X ⁵ + A 1 ・
X ⁶ + A0 · X ⁷ ), which is obtained by generating polynomial G (X)
And obtain the remainder RA (X). RA (X) = RA15 + RA14 × X + RA13
· X ² +, ..., + RA2 · X ¹³ + RA1 · X ¹⁴ · +
And RA0 · X ^15. The sequence of bits R obtained from these
A15, RA14, RA13, RA12, RA11, R
A10, RA9, RA8, RA7, RA6, RA5, R
A4, RA3, RA2, RA1, and RA0 are check bits. The calculation of the polynomial is performed by modulo 2.

Subsequently, data B, data C and data D
Similarly, the remainders RB (X), RC (X) and RD (X) are obtained. Then, the bit strings of these check bits are added, and the addition result is added as a bit string CRC (R0 to R15) of the check bits of the data A to D to be added after the data D to generate transmission data R. Output.

The transmission data R output from the CRC generator 4 is transmitted from the lower bit X0 of the data X, as shown in FIG. 2, and includes X1, X2,..., X7, fixed bit patterns 0, 1,. A2, ..., A7, B0, ..., B
, C7, D0, ..., D7, check bits R15, R14, ..., R1, R0, Y0,
, And Y7 are transmitted in this order.

The receiving device 5 receives these transmission data R, divides the received transmission data R into 8 bits, and reads them as data X, data A, data B, data C, and data D from the first 8 bits. , The next 16 bits are CRC check bits, and the next 8 bits are read as data Y and input to the bit pattern matching unit 6 and the error detection unit 7.

The bit pattern matching section 6 checks whether or not the data at the preset fixed bit pattern adding position of the input transmission data R is the preset data. In this case, since there is no insertion or deletion of bits during transmission, the data of the lower two bits A1, A0 of the data A is 1, 0, and the data at the additional bit position of the received data is equal to the fixed bit pattern. , The reception data is transmitted to the reception processing unit 8.

On the other hand, in the error detecting section 7, the polynomial PA (X) of the data A is PA (X), as in the case of transmitting the bit string of the data A to D and the check bit CRC of the received transmission data R as a polynomial. ) = A7 + A6.X + A5
・ X ² + A4 ・ X ³ + A3 ・ X ⁴ + A 2 ・ X ⁵ + A 1 ・
X ⁶ + A0X ⁷ Similarly, polynomials PB (X), PC (X) and PD (X) are obtained for data BD.

Next, the bit string of the check bit CRC
When a polynomial CRC (X) is obtained from (R0 to R15),
CRC (X) = CRC15 + CRC14.X + CRC1
3.X ^Two+, ..., + CRC2.X¹³+ CRC1 · X
¹⁴・ + CRC0 ・ X¹⁵And this, CRC (X),
Each of the polynomials PA (X) to PD (X)
Generator polynomial G (X) set between device 1 and receiver 5
Highest order X of¹⁶Polynomial obtained by adding
The expression is divided by the generator polynomial G (X). In this case,
The reception processing unit 8 confirms that it is normal.
Bit A of data A from transmitted and received transmission data R
Fixed bit pattern and check added to 1 and A0
It deletes the qubit CRC and outputs it to the reception processing unit 8.

The reception processing section 8 performs data processing such as signal conversion, outputs the data as reception data Q to an external processing device or the like, transmits to the CRC generation section 4 that there is no transmission error, and generates a CRC data. The unit 4 deletes the held transmission data R when the transmission normal signal is input from the reception processing unit 8. Next, when a transmission error occurs when the above-mentioned data exchange is performed, for example, as shown in FIG. 3, the same processing as described above is performed, and the transmission data R is transmitted. One bit X? Between bits X0 and X1 of X When the bits are inserted, the data is shifted by one inserted bit, and the received data recognized by the receiving device 5 has data X (X0, X ?, X1,. ..., X6), data A
(X7, A0, A1,..., A6), data B (A
7, B0, B1,..., B6), and data C, data D, and data Y are similarly shifted by one bit.

Therefore, in the bit pattern collating unit 6,
When the received data is compared with the fixed bit pattern, the bits A1 and A0 of the data A are included in the received data.
Is 0, X? , So insert bit X? Will be different from the fixed bit patterns 1 and 0 set at any value, and will detect that a transmission error has occurred, and transmit to the reception processing unit 8 that a transmission error has occurred.

On the other hand, the error detector 7 generates polynomials for the data A to D and the check bits CRC in the same manner as described above, adds them, and divides them by the generator polynomial G (X). At this time, since each data is shifted one bit at a time, it becomes indivisible and leaves a remainder. Therefore, it is assumed that there is a transmission error in the received data, the reception processing unit 8 is notified that the data is abnormal, and a transmission abnormal signal is transmitted to the CRC generation unit 4.
Then, the held transmission data R is transmitted to the receiving device 5 again.

Therefore, as described above, at the same time as the error detection by the CRC method, the arrangement of "1,0" or "0,1" between the transmitting device 1 and the receiving device 5 is limited to one place in advance.
The fixed bit pattern including
The transmission is performed with the fixed bit pattern added,
For in the received data, by collating whether the is a fixed bit pattern, in <br/> of X7-bit data X Ru can detect transmission errors any value, detected by the CRC scheme Even transmission errors that could not be detected can be detected, and transmission errors can be reliably detected.

[0034] In this embodiment, the lower bits A1 and A0 of the data A, it has dealt with the case of adding a fixed bit pattern "1, 0", the fixed bit pattern of the combination shown in FIG. 4, Any bit position within the CRC calculation range can be added to any position. Ma
In the present embodiment, the bit pattern setting unit 3
CRC generation unit 4 corresponds to the
The bit pattern matching unit 6 corresponds to the
Corresponds to bit pattern matching means, error detector 7
The reception processing unit 8 corresponds to the detection unit, and the reception processing unit 8 corresponds to the determination unit.
I have.

[0035]

As described above , according to claim 1 of the present invention ,
According to the transmission error detection method , the transmitting side and the receiving side
Between the position where the fixed bit pattern is added and “1,
Fixed bit that contains only one location of "0" or "0,1"
Pattern and set it on the transmitting side
Constant bit pattern set in advance for serial transmission data
Position, and then add this fixed bit pattern
For checking serial transmission data with CRC method
At the receiving end, the error detector
In addition to detecting transmission errors by the CRC method,
In the packet pattern matching unit,
A fixed bit pattern at a preset position is preset
Whether to check whether it is a bit pattern
Thus, a transmission error can be reliably detected. In addition,
According to the transmission system of claim 2, the bit of the transmitting device is
"1,0" or
Fixed bit pattern containing only one location of "0,1"
Is added to the preset position of the serial transmission data,
Serial transmission data with a fixed bit pattern
On the other hand, check data adding means
Data for the receiving side and send it.
When error detection means performs transmission error detection by the CRC method
Both bits at a specific position by bit pattern matching means
The pattern is compared with the fixed bit pattern,
When an error is detected in the stage or by bit pattern matching means
Bit pattern and fixed bit pattern at specific position
Is a transmission error when it detects that
Since the decision is made, transmission errors can be reliably detected.
Can be.

[Brief description of the drawings]

FIG. 1 is a schematic configuration diagram illustrating an example of a transmission system to which an error detection method according to the present invention is applied.

FIG. 2 is an explanatory diagram showing how data is exchanged according to the present invention.

FIG. 3 is an explanatory diagram showing how data is exchanged according to the present invention.

FIG. 4 is a list showing fixed bit patterns that can be set.

FIG. 5 is an explanatory diagram showing how data is exchanged by a conventional error detection method .

FIG. 6 is an explanatory diagram showing how data is exchanged by a conventional error detection method .

[Explanation of symbols]

 REFERENCE SIGNS LIST 1 transmission device 2 transmission processing unit 3 bit pattern setting unit 4 CRC generation unit 5 reception device 6 bit pattern matching unit 7 error detection unit 8 reception processing unit P transmission data Q reception data R transmission data

──────────────────────────────────────────────────続 き Continued on the front page (58) Field surveyed (Int. Cl. ⁷ , DB name) H04L 1/00 G06F 11/10 330 H03M 13/00

Claims (2)

(57) [Claims] 1. A transmission side in which serial transmission data is set in advance.
One or more “0, 1” or “1, 0” at the specified position
After adding a fixed bit pattern that includes only
CRC for serial transmission data with bit pattern added
Check data to detect transmission errors by the method
Is added to transmit data, performs transmission error detection by the CRC scheme based on the data for the checking of the received data in the error detection unit of the reception side, the received data in the bit pattern comparator
Wherein the bit pattern in a specific position determined whether said fixed bit pattern, even when the bit pattern in the specific position of the received data is not the fixed bit pattern, and judging a transmission error has occurred in Transmission error detection method . 2. A transmitting device transmits serial transmission data.
The receiving device that has received this detects the transmission error.
In the transmission system, The transmitting device reserves serial transmission data to be transmitted.
"0,1" or "1,0" at the specified position
To add a fixed bit pattern containing only one place
Pattern adding means; Serial transmission data to which the fixed bit pattern is added
Check for transmission errors using the CRC method.
Check data adding means for adding data for
Have The receiving-side device is configured to receive the preceding serial transmission data in the received serial transmission data.
Transmission error by CRC method based on the check data
Error detection means for performing error detection; The video at the specific position of the received serial transmission data
Bit for collating the bit pattern with the fixed bit pattern.
Bit pattern matching means; When a transmission error is detected by the error detection means or
The bit pattern at the specific position by the packet pattern matching unit.
Detected that the pattern does not match the fixed bit pattern
And determining means for determining that a transmission error has occurred.
A transmission system comprising: