JP3039584B2 - Assembly method of semiconductor integrated circuit module - Google Patents

Assembly method of semiconductor integrated circuit module

Info

Publication number
JP3039584B2
JP3039584B2 JP17648392A JP17648392A JP3039584B2 JP 3039584 B2 JP3039584 B2 JP 3039584B2 JP 17648392 A JP17648392 A JP 17648392A JP 17648392 A JP17648392 A JP 17648392A JP 3039584 B2 JP3039584 B2 JP 3039584B2
Authority
JP
Japan
Prior art keywords
integrated circuit
semiconductor integrated
melting point
heat conductive
point metal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
JP17648392A
Other languages
Japanese (ja)
Other versions
JPH0621278A (en
Inventor
収 山田
了平 佐藤
清 松井
通文 河合
憲一 笠井
貢 白井
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP17648392A priority Critical patent/JP3039584B2/en
Publication of JPH0621278A publication Critical patent/JPH0621278A/en
Application granted granted Critical
Publication of JP3039584B2 publication Critical patent/JP3039584B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/15Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161Disposition
    • H01L2224/16151Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16225Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732Location after the connecting process
    • H01L2224/73251Location after the connecting process on different surfaces
    • H01L2224/73253Bump and layer connectors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151Die mounting substrate
    • H01L2924/153Connection portion
    • H01L2924/1531Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
    • H01L2924/15312Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a pin array, e.g. PGA

Landscapes

  • Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)

Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【0001】[0001]

【産業上の利用分野】本発明は、情報処理装置等の電子
機器を構成する半導体集積回路素子の冷却構造に関し、
特に液体冷媒を集積回路近傍に循環させ半導体集積回路
素子で発生した熱を液体冷媒へ伝播させて半導体集積回
路素子を冷却するモジュール構造に関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a cooling structure for a semiconductor integrated circuit device constituting an electronic apparatus such as an information processing apparatus.
In particular, the present invention relates to a module structure for cooling a semiconductor integrated circuit element by circulating a liquid refrigerant near an integrated circuit and transmitting heat generated in the semiconductor integrated circuit element to the liquid refrigerant.

【0002】[0002]

【従来の技術】従来、半導体集積回路モジュールの冷却
構造として例えば特開平2−256263号公報に示される配
線基板上に集積回路を設置し、集積回路の上面に熱伝導
性コンパウンドを設置し集積回路と流体冷媒が流れる冷
却板を接触させて集積回路を冷却する構造がある。
2. Description of the Related Art Conventionally, as a cooling structure for a semiconductor integrated circuit module, an integrated circuit is installed on a wiring board disclosed in Japanese Patent Application Laid-Open No. 2-256263, for example, and a heat conductive compound is installed on the upper surface of the integrated circuit. There is a structure for cooling an integrated circuit by contacting a cooling plate through which a fluid refrigerant flows.

【0003】また、従来の他の例としてロバート・ダー
ビアックス(Rovert Darveaux)、イウォナ・ターリッ
ク(Iwona Turlix)、アイ、イー、イー、イー、トラン
ザクションズ、オン、コンポネンツ、ハイブリッズ、ア
ンド、マニュファクチャリング テクノロジー、13巻4
号、1990年12月(IEEE Transacstions on Components、
Hybirds、and Manufacturing Technology、vol.13、N
o.4、December 1990)に示される例がある。この例で
は、多層基板上に設置した半導体集積回路素子と冷却板
との間の接合にインジウムはんだを用いて冷却性を高め
ている。インジウムはんだを熱伝導体として用いる場合
には、通常、リボン状のはんだを接合に必要な長さに切
断し、それを半導体集積回路素子上に載せてリフローに
より冷却板と接合するものである。
As another conventional example, Robert Darveaux, Iwona Turlix, Eye, E, E, E, Transactions, On, Components, Hybrids, and Manufacturing Technology, Volume 13 4
Issue, December 1990 (IEEE Transacstions on Components,
Hybirds, and Manufacturing Technology, vol. 13, N
o. 4, December 1990). In this example, the cooling performance is enhanced by using indium solder for joining between the semiconductor integrated circuit element and the cooling plate provided on the multilayer substrate. When using indium solder as a heat conductor, usually, a ribbon-shaped solder is cut to a length necessary for joining, and the cut solder is mounted on a semiconductor integrated circuit element and joined to a cooling plate by reflow.

【0004】[0004]

【発明が解決しようとする課題】上述した従来のモジュ
ール構造のうち、前者の特開平2−256263号公報の例で
は、複数個設置した集積回路の上面高さのばらつきを、
熱伝導性コンパウンドの追従性により対応しているが、
熱伝導性の向上の点から熱伝導コンパウンドと集積回路
及び冷却板の密着性が必要であり、また、密着性を長期
間(例えば10年間)確保する点から熱伝導コンパウンド
はきわめて高粘度となる。一般に、半導体集積回路モジ
ュールはきわめて高額であるため、製作中及び実稼働中
に半導体集積回路素子の不良が発生するとその不良半導
体回路素子を取り換える必要がある。この時、前記冷却
板を取りはずす必要があるが、その際に発生する大きな
力により良品半導体回路素子と多層基板との間の電気的
接合を機械的な外力により切断し、良品が不良品となる
ことが多発する。このため、当初の不良品半導体集積回
路素子のみを取り換えることが困難である。
Among the above-mentioned conventional module structures, in the former example of Japanese Patent Application Laid-Open No. 2-256263, variation in the upper surface height of a plurality of integrated circuits is reduced.
This is supported by the ability to follow the heat conductive compound,
In order to improve the heat conductivity, the heat conductive compound must be in close contact with the integrated circuit and the cooling plate. In addition, the heat conductive compound has an extremely high viscosity in order to secure the close contact for a long time (for example, 10 years). . Generally, since a semiconductor integrated circuit module is extremely expensive, when a defect occurs in a semiconductor integrated circuit element during manufacture and during actual operation, it is necessary to replace the defective semiconductor circuit element. At this time, it is necessary to remove the cooling plate, but the electrical connection between the non-defective semiconductor circuit element and the multilayer substrate is cut off by a mechanical external force due to a large force generated at that time, and the non-defective product becomes a defective product. Things happen frequently. Therefore, it is difficult to replace only the initially defective semiconductor integrated circuit device.

【0005】また、後者の場合は半導体集積回路素子と
冷却板との間の接合にインジウムはんだを用いている
が、インジウムはんだの剪断歪特性等について検討して
いるものの、インジウムはんだを熱伝導体として用いる
場合の実用上の問題については充分な配慮がなされてい
ない。すなわち、従来はリボン状のはんだを接合に必要
な長さだけ切り取り、それを半導体集積回路素子上に載
せてリフローにより冷却板と接合するため、はんだ量の
調整が難しく過不足が生じるのが常である。過剰であれ
ば半導体集積回路素子の側面を流出して配線基板に流れ
込み、半導体集積回路素子の電極を短絡させる恐れがあ
り電気的接続の信頼性を著しく低下させる。また、不足
の場合には、半導体集積回路素子と冷却板の接合が不十
分で良好な熱伝導特性が得られない。
[0005] In the latter case, indium solder is used for bonding between the semiconductor integrated circuit element and the cooling plate. However, although the shear strain characteristics of the indium solder are examined, the indium solder is used as a heat conductor. However, sufficient consideration has not been given to the practical problem in the case of using as a device. That is, conventionally, a ribbon-shaped solder is cut out to the length necessary for bonding, and the cut-out is placed on a semiconductor integrated circuit element and bonded to a cooling plate by reflow. It is. If it is excessive, it flows out of the side surface of the semiconductor integrated circuit element and flows into the wiring board, and there is a possibility that the electrodes of the semiconductor integrated circuit element may be short-circuited, so that the reliability of electrical connection is significantly reduced. On the other hand, if it is insufficient, the bonding between the semiconductor integrated circuit element and the cooling plate is insufficient, and good heat conduction characteristics cannot be obtained.

【0006】したがって本発明の目的は、上記従来の問
題点を解消することにあり、第1の目的は余分な外力を
加えずに不良となった半導体集積回路素子のリペアを簡
便に行なうことのできる半導体集積回路モジュールを、
第2の目的はモジュールの組立方法を、そして第3の目
的はリペア方法を、それぞれ提供することにある。
SUMMARY OF THE INVENTION Accordingly, an object of the present invention is to solve the above-mentioned conventional problems, and a first object of the present invention is to easily repair a defective semiconductor integrated circuit device without applying an extra external force. Semiconductor integrated circuit module
A second object is to provide a method for assembling a module, and a third object is to provide a method for repair.

【0007】[0007]

【課題を解決するための手段】上記本発明の第1の目的
は、多層配線基板上に電気的に接続、搭載された半導体
集積回路素子と、半導体集積回路素子の電気的接続部の
背面に低融点金属を介して接合された熱伝導板と、熱伝
導板に直接、または低粘着性の熱伝導材料により接触す
る冷却構造体と、半導体集積回路素子を外気から密封す
る封止構造部とを有して成る半導体集積回路モジュール
において、低融点金属と接合する熱伝導板の一部に低融
点金属を導入もしくは溶融排出除去する穴を配設すると
共に、低融点金属が接合する部分に低融点金属の接合領
域を規制するメタライズ層を配設して成る半導体集積回
路モジュールにより、達成される。
SUMMARY OF THE INVENTION A first object of the present invention is to provide a semiconductor integrated circuit device electrically connected and mounted on a multilayer wiring board and a back surface of an electrical connection portion of the semiconductor integrated circuit device. A heat conducting plate joined through a low melting point metal, a cooling structure directly in contact with the heat conducting plate or by a low-adhesion heat conducting material, and a sealing structure for sealing the semiconductor integrated circuit element from the outside air. In a semiconductor integrated circuit module having a low melting point metal, a hole for introducing or melting and removing the low melting point metal is provided in a part of the heat conductive plate to be joined to the low melting point metal, and a low melting point metal is joined to a portion where the low melting point metal is joined. This is achieved by a semiconductor integrated circuit module having a metallized layer for regulating a bonding region of a melting point metal.

【0008】低融点金属としては、一般に半導体集積回
路モジュールに用いる接合及び構造材料のうち一番融点
の低い金属で構成され、In単体もしくは例えばIn25
Cd(127.7℃)、In48Sn(117℃)、In42Sn14
Cd(93℃)等のIn系合金が望ましい。なお、括弧内
は何れも融点を示す。
The low melting point metal is generally composed of a metal having the lowest melting point among bonding and structural materials used for a semiconductor integrated circuit module.
Cd (127.7 ° C), In48Sn (117 ° C), In42Sn14
An In-based alloy such as Cd (93 ° C.) is desirable. In addition, the values in parentheses indicate the melting points.

【0009】低粘着性の熱伝導材料としては、金属粉を
混入したグリースで構成することが望ましく、例えば銅
もしくはアルミ等の熱伝導率の高い金属粉を混入した炭
化水素系グリース、もしくはシリコーン系グリースが好
ましい。
The low-adhesive heat conductive material is preferably composed of grease mixed with metal powder, such as hydrocarbon grease mixed with metal powder having high thermal conductivity such as copper or aluminum, or silicone-based grease. Grease is preferred.

【0010】熱伝導板としては、例えば銅、アルミ、銅
−タングステン合金、Al34、その他の銅系合金、ア
ルミ系合金等が挙げられ
[0010] As the heat conductive plate, such as copper, aluminum, copper - tungsten alloy, Al 3 N 4, other copper-based alloys, Ru include aluminum-based alloy.

【0011】上記本発明の第2の目的は、低融点金属
の接合領域となる半導体集積回路素子の背面と熱伝導板
に、それぞれ予め接合領域を規制するメタライズ層を形
成する段階と、多層配線基板上に半導体集積回路素子
を接続、搭載する段階と、半導体集積回路素子のほぼ
中心位置に開口穴を有する熱伝導板の側壁端面を多層配
線基板に接続、気密封止する段階と、開口穴に低融点
金属はんだ棒を挿入し加熱溶融することにより半導体集
積回路素子と熱伝導板との隙間を低融点金属で接合する
段階と、熱伝導材料を介して冷却構造体を接続する段
階とを有して成る半導体集積回路モジュールの組立方法
により、達成される。
A second object of the present invention is to form a metallized layer for regulating the bonding region in advance on the back surface of the semiconductor integrated circuit element and the heat conductive plate, which are the bonding region of the low melting point metal, Connecting and mounting the semiconductor integrated circuit element on the substrate, connecting the end face of the side wall of the heat conductive plate having an opening at a substantially central position of the semiconductor integrated circuit element to the multilayer wiring board, and sealing hermetically; A step of joining the gap between the semiconductor integrated circuit element and the heat conducting plate with a low melting point metal by inserting a low melting point metal solder rod into the heat melting plate, and a step of connecting a cooling structure via a heat conducting material. This is achieved by a method for assembling a semiconductor integrated circuit module having the above.

【0012】好ましくは、の半導体集積回路素子のほ
ぼ中心位置に開口穴を有する熱伝導板の側壁端面を多層
配線基板に接続、気密封止する段階において、さらに開
口穴を半導体集積回路素子の四隅に相当する位置に配設
することが望ましい。これらの開口穴を通して低融点金
属の過不足を計測し、適正量に調整することができる。
上記本発明の第3の目的は、上記第1の目的を達成す
ることのできる半導体集積回路モジュールを分解し、不
良品となった半導体集積回路素子を良品と交換する半導
体集積回路モジュールのリペア方法であって、熱伝導
材料を介して接続された冷却構造体を取り外す段階と、
半導体集積回路素子と熱伝導板との隙間を接合した低
融点金属を、加熱溶融しながら開口穴から真空吸引によ
り排出、除去する段階と、低融点金属が除去された
後、熱伝導板を多層配線基板から分離する段階と、半
導体集積回路素子をリペアする段階とを有して成る半導
体集積回路モジュールのリペア方法により、達成され
る。
Preferably, in the step of connecting the end surface of the side wall of the heat conductive plate having an opening at a substantially central position of the semiconductor integrated circuit device to the multilayer wiring board and hermetically sealing it, further opening holes are formed at the four corners of the semiconductor integrated circuit device. It is desirable to dispose at a position corresponding to. The excess or deficiency of the low melting point metal can be measured through these opening holes and adjusted to an appropriate amount.
A third object of the present invention is to provide a semiconductor integrated circuit module repair method for disassembling a semiconductor integrated circuit module capable of achieving the first object and replacing defective semiconductor integrated circuit elements with non-defective ones. Removing the cooling structure connected via the thermally conductive material;
Heating and melting the low-melting-point metal joining the gap between the semiconductor integrated circuit element and the heat-conducting plate from the opening hole by vacuum suction and removing, and after the low-melting-point metal is removed, the heat-conducting plate is multilayered. This is achieved by a method for repairing a semiconductor integrated circuit module, comprising a step of separating from a wiring board and a step of repairing a semiconductor integrated circuit element.

【0013】[0013]

【作用】モジュール組立時には、熱伝導板に設けた開口
穴により多層配線基板と熱伝導板とを機械的もしくはは
んだにより接合した後に、この開口穴から低融点金属を
流し込むことにより半導体集積回路素子と熱伝導板とを
接合する。さらに、低粘弾性熱伝導材料を介して熱伝導
板に液体冷媒を内蔵した冷却用構造体を設置することに
より、半導体集積回路素子と液体冷媒との間の熱抵抗を
大幅に低下させることができる。
When the module is assembled, the multi-layer wiring board and the heat conductive plate are mechanically or soldered to each other by means of an opening provided in the heat conductive plate, and then a low-melting point metal is poured through the opening to form a semiconductor integrated circuit device. Bond with the heat conductive plate. Further, by installing a cooling structure having a built-in liquid refrigerant in the heat conductive plate via a low viscoelastic heat conductive material, the thermal resistance between the semiconductor integrated circuit element and the liquid refrigerant can be significantly reduced. it can.

【0014】また、モジュール分解時には、冷却構造体
をまず機械的な力を加えて熱伝導板から分離する。この
分離時に作用する力は、熱伝導板に直接伝わり、熱伝導
板を機械的に支持することにより直接半導体集積回路素
子には機械的外力が加わらないので、半導体集積回路素
子及び電気的接続部には何ら害を及ぼさない。
When disassembling the module, the cooling structure is first separated from the heat conducting plate by applying a mechanical force. The force acting during this separation is directly transmitted to the heat conductive plate, and no mechanical external force is directly applied to the semiconductor integrated circuit device by mechanically supporting the heat conductive plate. Does no harm.

【0015】さらに、熱伝導板と半導体集積回路素子間
の低融点金属による接合を取り外す際には、モジュール
全体を低融点金属の融点以上に加熱し、熱伝導板に設け
た開口穴から溶融した金属を吸い出すことにより、半導
体集積回路素子に機械的外力を加えずに熱伝導板と半導
体集積回路とを分離することができる。
Further, when removing the junction of the low-melting metal between the heat conductive plate and the semiconductor integrated circuit element, the entire module was heated to a temperature equal to or higher than the melting point of the low-melting metal and was melted through the opening provided in the heat conductive plate. By extracting the metal, the heat conductive plate and the semiconductor integrated circuit can be separated without applying a mechanical external force to the semiconductor integrated circuit element.

【0016】半導体集積回路素子と熱伝導板とを低融点
金属で接合するに際しては、接合領域を規制するため
に、それぞれの接合予定領域に予めメタライズ層を形成
しておくことが重要で、これにより確実に所定パターン
のメタライズ層上に選択的に低融点金属を接合すること
が可能となる。
In joining a semiconductor integrated circuit element and a heat conductive plate with a metal having a low melting point, it is important to form a metallized layer in advance in each of the joining regions in order to regulate the joining region. Thereby, it is possible to reliably bond the low melting point metal onto the metallized layer of the predetermined pattern.

【0017】[0017]

【実施例】以下、本発明の代表的な実施例を図面にした
がって説明する。 〈実施例1〉 (1)半導体集積回路モジュールの構造例:図1は、本
発明の一実施例を示す半導体集積回路モジュールの断面
図であり、図2はその組立過程を示す要部斜視図であ
る。図1において、3は半導体集積回路素子、1は半導体
集積回路素子3を複数個搭載した多層配線基板である。
半導体集積回路素子3は、はんだボール2を介して多層配
線基板1に電気的に接続してあり、また、電気的接続の
無い背面(多層配線基板1の上面)が低融点金属4を介し
て熱伝導板5に接合してある。熱伝導板5は、その側壁5
aの端面が多層配線基板1に封止はんだ11を介して接合
することにより、半導体集積回路素子3が搭載された多
層配線基板1上の空間20を封止る。さらに熱伝導板5の上
面は低粘着性の熱伝導材料6を介して冷却構造体7に接続
してある。さらに、熱伝導板5には、図2に示したよう
に低融点金属4を溶融供給及び吸い出しするための穴10
が半導体集積回路素子3のほぼ中央位置に対応する位置
とその四隅(符号13で表示した)に設けてある。なお、
低融点金属4を接合する半導体集積回路素子3及び熱伝導
板5の接合領域には、予めメタライズ層21を形成してお
き、このメタライズ層で接合領域を規制し、不必要な領
域に低融点金属4が流出しない構成としている。
DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS A typical embodiment of the present invention will be described below with reference to the drawings. Example 1 (1) Structural Example of Semiconductor Integrated Circuit Module: FIG. 1 is a cross-sectional view of a semiconductor integrated circuit module according to an embodiment of the present invention, and FIG. It is. In FIG. 1, reference numeral 3 denotes a semiconductor integrated circuit element, and 1 denotes a multilayer wiring board on which a plurality of semiconductor integrated circuit elements 3 are mounted.
The semiconductor integrated circuit element 3 is electrically connected to the multilayer wiring board 1 via the solder balls 2, and the back side (the upper surface of the multilayer wiring board 1) having no electrical connection is connected via the low melting point metal 4. It is joined to the heat conducting plate 5. The heat conducting plate 5 has a side wall 5
The end face a is joined to the multilayer wiring board 1 via the sealing solder 11, thereby sealing the space 20 on the multilayer wiring board 1 on which the semiconductor integrated circuit element 3 is mounted. Further, the upper surface of the heat conductive plate 5 is connected to the cooling structure 7 via the heat conductive material 6 having low adhesiveness. Further, as shown in FIG. 2, a hole 10 for melting and supplying the low melting point metal 4 is provided in the heat conducting plate 5.
Are provided at positions substantially corresponding to the center position of the semiconductor integrated circuit element 3 and at the four corners (indicated by reference numeral 13). In addition,
A metallization layer 21 is formed in advance in a bonding region of the semiconductor integrated circuit element 3 and the heat conductive plate 5 for bonding the low melting point metal 4, and the bonding region is regulated by the metallization layer, and a low melting point is formed in an unnecessary region. Metal 4 does not flow out.

【0018】半導体集積回路素子3から発生した熱は、
主に低融点金属4、熱伝導板5、低粘着性熱伝導材料6、
冷却構造体7を通過して冷媒通路9を流れる冷媒12に伝導
することにより半導体集積回路素子3の冷却が行われ
る。半導体集積回路モジュールは、大気中の水分等の作
用による信頼性低下を避けるため、Heガス等をその空間
20に封入して外気を遮断する密封構造を有する。一方、
半導体集積回路素子3は素子の故障が発生すると故障し
た素子のみを取りはずし正常素子を付け直す(これをリ
ペアと呼ぶ)ことが通常行われる。従って、半導体集積
回路モジュールは、半導体集積回路素子3のリペアが可
能な構造である必要がある。このため、半導体集積回路
モジュールの接合部分には、リペアに対応した着脱性が
必要である。このため、本実施例では、低融点金属4に
インジウムはんだIn48Sn(融点117℃)を用い、封止は
んだ11にはSn37Pb(融点183℃)、はんだボール2にはSn
3Ag(221℃)を用い、低融点金属4の融点を半導体集積
回路モジュール構成素材のうちで一番低融点とした。ま
た、熱伝導板5としては窒化アルミ(Al34)を、低
粘着性熱伝導材料6としてはアルミ粉を混入した炭化水
素系グリースを、冷却構造体7としては窒化アルミに冷
媒通路9を設け、冷媒12として水を使用した。
The heat generated from the semiconductor integrated circuit device 3 is
Mainly low melting point metal 4, heat conductive plate 5, low adhesive heat conductive material 6,
The semiconductor integrated circuit element 3 is cooled by conducting the refrigerant 12 flowing through the cooling passage 7 through the cooling structure 7. The semiconductor integrated circuit module uses He gas, etc. in its space to avoid reliability degradation due to the action of moisture in the atmosphere.
It has a sealed structure that is sealed in 20 to block outside air. on the other hand,
When an element failure occurs in the semiconductor integrated circuit element 3, it is common practice to remove only the failed element and reattach a normal element (this is called repair). Therefore, the semiconductor integrated circuit module needs to have a structure capable of repairing the semiconductor integrated circuit element 3. For this reason, the joint portion of the semiconductor integrated circuit module needs to have detachability corresponding to repair. For this reason, in this embodiment, indium solder In48Sn (melting point 117 ° C.) is used for the low melting point metal 4, Sn37Pb (melting point 183 ° C.) is used for the sealing solder 11, and Sn is used for the solder ball 2.
3Ag (221 ° C.) was used, and the melting point of the low melting point metal 4 was the lowest among the constituent materials of the semiconductor integrated circuit module. Aluminum nitride (Al 3 N 4 ) is used as the heat conducting plate 5, hydrocarbon-based grease mixed with aluminum powder is used as the low-adhesion heat conducting material 6, and the cooling passage 7 is made of a coolant passage 9 through the aluminum nitride. And water was used as the refrigerant 12.

【0019】なお、熱伝導材料6としてはグリース以外
に低融点はんだで構成することも可能であり、この場合
には低融点金属4の融点よりも低い融点のはんだを使用
することとなる。したがって、この場合に半導体集積回
路モジュール構成素材のうちで一番低融点のはんだは熱
伝導材料6であり、次いで低融点金属4となる。
The heat conductive material 6 can be made of a low melting point solder other than grease. In this case, a solder having a melting point lower than the melting point of the low melting point metal 4 is used. Accordingly, in this case, the solder having the lowest melting point among the constituent materials of the semiconductor integrated circuit module is the heat conductive material 6 and then the low melting point metal 4.

【0020】また、低融点金属4を接合する領域に形成
したメタライズ層として、この例ではCr層を用いた。
メタライズ層はCrをスパッタ成膜し、このスパッタ膜
を所定の形状にパターン化して形成した。すなわち、半
導体集積回路素子3上に形成する場合には、インジウム
はんだ4を側面に流出させないないように周縁にリング
状にメタライズ層を形成しない領域を残し、熱伝導板5
に形成する場合には半導体集積回路素子3の投影面を超
えないようにその内側の領域に形成した。
In this example, a Cr layer was used as a metallized layer formed in a region where the low melting point metal 4 was bonded.
The metallized layer was formed by forming a film by sputtering Cr and patterning the sputtered film into a predetermined shape. That is, when formed on the semiconductor integrated circuit element 3, a region where a ring-shaped metallized layer is not formed is left around the periphery so that the indium solder 4 does not flow out to the side surface, and the heat conductive plate 5 is not formed.
In the case of forming the semiconductor integrated circuit element 3, it was formed in a region inside the semiconductor integrated circuit element 3 so as not to exceed the projection plane.

【0021】(2)半導体集積回路素子モジュールの組
立方法:まず、図1、図2に示すように多層配線基板1
上に半導体集積回路素子3をはんだボール2を用いて接続
する。次いで、多層配線基板1上に熱伝導板5の側壁端面
5aを封止はんだ11を用いて接合する。
(2) Method of assembling semiconductor integrated circuit device module: First, as shown in FIGS.
The semiconductor integrated circuit device 3 is connected thereon using the solder balls 2. Next, on the multilayer wiring board 1, the side end face of the heat conductive plate 5
5a is joined using the sealing solder 11.

【0022】次に、低融点金属4を半導体集積回路素子3
と熱伝導板5との隙間に注入、形成し、これら両者を低
融点金属4で接合する。この接合方法は、図2の低融点
金属流し込み概略図に示すように、全体を一様に加熱し
た(例えば125℃)半導体集積回路モジュールの熱伝導
板5に設けた穴10から低融点金属(インジウムはんだ)
棒14を挿入して溶融させ、溶融した低融点金属4の表面
張力を利用して、溶融低融点金属を半導体集積回路素子
3と熱伝導板5との間の隙間に流し込み所定量流し込んだ
後に冷却凝固させて半導体集積回路素子3と熱伝導板5を
固着する。その際、多層配線基板1のそりと半導体集積
回路素子3の上面の傾きとにより個々の半導体集積回路
素子3と熱伝導板5との間の隙間間隔が異なるので、接合
に必要な低融点金属量は場所によって異なる。半導体集
積回路素子3の上面及び熱伝導板5の内面に低融点金属4
を接合する領域の決定は、あらかじめ接合予定領域にメ
タライズ層21a、21bを形成(この例ではスパッタにより
Cr層パターンを形成)しておき、溶融金属が半導体集
積回路素子3のはんだボール2の箇所に流れ出すのを防止
してある。低融点金属4が凝固した後、熱伝導板5の上面
に突出しているはんだ棒14は切断する。
Next, the low melting point metal 4 is
Is injected into the gap between the heat conduction plate 5 and the heat conduction plate 5, and these are joined with the low melting point metal 4. As shown in the schematic drawing of the low-melting-point metal pouring in FIG. 2, this joining method is performed by uniformly heating the whole (for example, 125 ° C.) through a hole 10 provided in the heat conductive plate 5 of the semiconductor integrated circuit module. Indium solder)
The rod 14 is inserted and melted, and the molten low-melting point metal is used as a semiconductor integrated circuit element by utilizing the surface tension of the molten low-melting point metal 4.
The semiconductor integrated circuit element 3 and the heat conductive plate 5 are fixed by cooling and solidifying after pouring into a gap between the heat conductive plate 3 and the heat conductive plate 5 for a predetermined amount. At this time, the gap between the individual semiconductor integrated circuit elements 3 and the heat conductive plate 5 varies depending on the warp of the multilayer wiring board 1 and the inclination of the upper surface of the semiconductor integrated circuit element 3, so that the low melting point metal necessary for bonding is required. The amount depends on the location. A low melting point metal 4 is provided on the upper surface of the semiconductor integrated circuit
The metallized layers 21a and 21b are formed in advance in the region to be bonded (in this example, a Cr layer pattern is formed by sputtering), and the molten metal is placed on the solder ball 2 of the semiconductor integrated circuit element 3 in advance. To prevent it from flowing out. After the low-melting-point metal 4 solidifies, the solder bar 14 projecting from the upper surface of the heat conductive plate 5 is cut.

【0023】なお、図2に示した穴13は、組立途中で半
導体集積回路素子3と熱伝導板5との隙間間隔を測定する
ためのものであり、必要なはんだ量をあらかじめ求める
のに好便である。また、はんだの流動状態を確認するの
にも好都合であり、はんだが不足の場合は、その不足が
観察された穴13からはんだ棒14を挿入してはんだを追加
し、半導体集積回路素子3と熱伝導板5の接触面積を増加
させるのに好都合である。
The hole 13 shown in FIG. 2 is used for measuring the gap between the semiconductor integrated circuit element 3 and the heat conductive plate 5 during assembly, and is suitable for obtaining the necessary amount of solder in advance. It is a stool. It is also convenient to check the flow state of the solder, and if the solder is insufficient, insert the solder rod 14 from the hole 13 where the lack was observed, add solder, and connect with the semiconductor integrated circuit element 3. This is convenient for increasing the contact area of the heat conduction plate 5.

【0024】以上のようにして低融点金属4を形成した
後、最終工程として熱伝導板5の上面に熱伝導材料6とし
てアルミ粉を混入した炭化水素系グリース(熱伝導コン
パウンド)を塗り、その上から冷却構造体7を所定の加
圧力で押し付け、冷却構造体7と熱伝導コンパウンド6と
の接触面積を確保する。以上の組立手順により図1に示
した構造の半導体集積回路モジュールの組立が終了し
た。
After forming the low-melting-point metal 4 as described above, as a final step, a hydrocarbon-based grease (a heat-conductive compound) mixed with aluminum powder is coated on the upper surface of the heat-conductive plate 5 as a heat-conductive material 6. The cooling structure 7 is pressed from above with a predetermined pressure to secure a contact area between the cooling structure 7 and the heat conduction compound 6. With the above assembly procedure, the assembly of the semiconductor integrated circuit module having the structure shown in FIG. 1 is completed.

【0025】(3)半導体集積回路素子のリペア方法:
半導体集積回路素子のリペアに際してモジュールを分解
する手順は、ほぼ上記(2)の逆の工程を行う。まず、
冷却構造体7を取りはずし、熱伝導コンパウンド6を除去
して熱伝導板5の上面を露出させる。次いで全体を125℃
に加熱し低融点金属4を溶融させ、穴10から溶融はんだ
を真空吸引により吸い出す。その後、全体の温度を190
℃まで上昇させ、封止はんだ11を溶融させて熱伝導板5
を多層配線基板1からとりはずし、半導体集積回路素子3
を露出させる。
(3) Method of repairing semiconductor integrated circuit device:
The procedure of disassembling the module when repairing the semiconductor integrated circuit element is substantially the reverse of the above (2). First,
The cooling structure 7 is removed, the heat conduction compound 6 is removed, and the upper surface of the heat conduction plate 5 is exposed. Then the whole is 125 ℃
To melt the low melting point metal 4 and suck out the molten solder from the hole 10 by vacuum suction. Then raise the total temperature to 190
° C to melt the sealing solder 11
Is removed from the multilayer wiring board 1, and the semiconductor integrated circuit element 3 is removed.
To expose.

【0026】以上の操作によって半導体集積回路素子
3、及びはんだボール2に熱応力以外の外力を付加しない
でリペアを可能にできる。
By the above operation, the semiconductor integrated circuit device
3, and repair can be performed without applying external force other than thermal stress to the solder ball 2.

【0027】〈実施例2〉図3は、半導体集積回路モジ
ュールの他の実施例を示す断面図である。この例は、図
2の封止はんだ11の代わりに、半導体集積回路素子3の
封止部にCリング状のシール材15を用い、ボルト16とナ
ット17の機械的締結力により封止を行った例である。図
3において、半導体集積回路モジュールの組立手順は実
施例1と変わることが無く、熱伝導板5を多層配線基板1
に取り付けた後に熱伝導板5の穴10から所定量の低融点
金属4を溶融させて流し込み接合する。また、この実施
例では、熱伝導性を高めるために熱伝導板5の一部5bを
半導体集積回路素子3の側面近くまで延ばした構造と
し、側面部は低融点金属4を流し込まずに輻射冷却する
構造としてあり、図1の構成よりも半導体集積回路素子
3の冷却効果をさらに向上させたものである。
<Embodiment 2> FIG. 3 is a sectional view showing another embodiment of a semiconductor integrated circuit module. In this example, instead of the sealing solder 11 in FIG. 2, a sealing member 15 in the form of a C-ring is used for the sealing portion of the semiconductor integrated circuit element 3 and sealing is performed by a mechanical fastening force between a bolt 16 and a nut 17. This is an example. In FIG. 3, the assembly procedure of the semiconductor integrated circuit module is the same as that of the first embodiment, and the heat conductive plate 5 is connected to the multilayer wiring board 1.
After a predetermined amount of the low-melting metal 4 is melted from the hole 10 of the heat conductive plate 5 and then poured and joined. In this embodiment, a part 5b of the heat conductive plate 5 is extended to near the side surface of the semiconductor integrated circuit element 3 in order to enhance the thermal conductivity. Semiconductor integrated circuit device compared to the configuration of FIG.
The cooling effect of 3 is further improved.

【0028】なお、低融点金属4と半導体集積回路素子3
及び熱伝導板5との接合面積及び領域は、実施例1の場
合と同様に半導体集積回路3及び熱伝導板5の表面に設け
るメタライズ層の面積及びパターンにより調整する。
The low melting point metal 4 and the semiconductor integrated circuit element 3
The area and the region to be joined to the heat conductive plate 5 are adjusted by the area and pattern of the metallized layer provided on the surfaces of the semiconductor integrated circuit 3 and the heat conductive plate 5 as in the first embodiment.

【0029】〈実施例3〉図4の実施例は、熱伝導板5
の表面のメタライズ領域21aを半導体集積回路素子3の投
影面よりも小さくし、低融点金属4が半導体集積回路素
子3の側面に流出するのを防いでいる。
<Embodiment 3> The embodiment of FIG.
The metallized region 21a on the surface of the semiconductor integrated circuit device 3 is made smaller than the projection surface of the semiconductor integrated circuit device 3 to prevent the low melting point metal 4 from flowing out to the side surface of the semiconductor integrated circuit device 3.

【0030】〈実施例4〉また、図5の実施例では、熱
伝導板5の表面に、半導体集積回路素子3がほぼ入る大き
さの窪み18をつけ、窪み18内のみにメタライズ層11aを
設けることによりさらに低融点金属4の流出を防止して
ある。また、この実施例では、穴10にテーパ10aを設け
溶融した低融点金属4の流動性を高めてある。
<Embodiment 4> In the embodiment shown in FIG. 5, a depression 18 having a size enough to receive the semiconductor integrated circuit element 3 is formed on the surface of the heat conductive plate 5, and the metallization layer 11a is provided only in the depression 18. By providing this, the outflow of the low melting point metal 4 is further prevented. Further, in this embodiment, the taper 10a is provided in the hole 10 to enhance the fluidity of the molten low melting point metal 4.

【0031】[0031]

【発明の効果】以上、詳述したように本発明により、何
れも所期の目的を達成することができた。すなわち、半
導体集積回路素子のリペアに際しては、余分な外力を付
加せずにモジュールを分解し、リペアすることが可能と
なった。この結果、半導体集積回路モジュールの製造及
び修理が容易となり、また、正常な半導体集積回路素子
に余分な外力を付加して素子や電気的接続部を破壊する
ことも無いので製品の信頼性も向上しさらにコストの低
減が計れるようになった。
As described in detail above, the desired objects can be achieved by the present invention. That is, when repairing a semiconductor integrated circuit device, it has become possible to disassemble and repair the module without applying an extra external force. As a result, the manufacture and repair of the semiconductor integrated circuit module are facilitated, and the reliability of the product is also improved because no extra external force is applied to the normal semiconductor integrated circuit element to destroy the element and the electrical connection. Further, the cost can be further reduced.

【図面の簡単な説明】[Brief description of the drawings]

【図1】本発明の一実施例となる半導体集積回路モジュ
ールの断面図。
FIG. 1 is a sectional view of a semiconductor integrated circuit module according to one embodiment of the present invention.

【図2】同じくモジュール組立時に低融点金属を流し込
む過程を示す要部斜視図。
FIG. 2 is an essential part perspective view showing a process of pouring a low-melting-point metal at the time of assembling the module.

【図3】同じく他の実施例となる半導体集積回路モジュ
ールの部分断面図。
FIG. 3 is a partial cross-sectional view of a semiconductor integrated circuit module according to another embodiment.

【図4】同じく他の実施例となる半導体集積回路モジュ
ールの部分断面図。
FIG. 4 is a partial sectional view of a semiconductor integrated circuit module according to another embodiment.

【図5】同じく他の実施例となる半導体集積回路モジュ
ールの部分断面図。
FIG. 5 is a partial sectional view of a semiconductor integrated circuit module according to another embodiment.

【符号の説明】[Explanation of symbols]

1…多層配線基板、 2…はんだボー
ル、3…半導体集積回路素子、 4…低融点
金属、5…熱伝導板、 7…冷却
構造体、8…接続ピン、 9…冷
媒通路、10、13…穴、 11…封
止はんだ、12…冷媒、 14…
低融点金属のはんだ棒、15…Cリング、
16…ボルト、17…ナット、
18…窪み、18a…テーパ、
20…モジュール内の空間、21…メタライズ層。
DESCRIPTION OF SYMBOLS 1 ... Multilayer wiring board, 2 ... Solder ball, 3 ... Semiconductor integrated circuit element, 4 ... Low melting point metal, 5 ... Heat conductive plate, 7 ... Cooling structure, 8 ... Connection pin, 9 ... Refrigerant passage, 10, 13 ... Holes, 11: sealing solder, 12: refrigerant, 14 ...
Low melting point metal solder rod, 15 ... C ring,
16 ... bolt, 17 ... nut,
18: recess, 18a: taper,
20: space in the module, 21: metallization layer.

───────────────────────────────────────────────────── フロントページの続き (72)発明者 河合 通文 神奈川県横浜市戸塚区吉田町292番地株 式会社日立製作所 生産技術研究所内 (72)発明者 笠井 憲一 神奈川県秦野市堀山下1番地株式会社日 立製作所 神奈川工場内 (72)発明者 白井 貢 神奈川県秦野市堀山下1番地株式会社日 立製作所 神奈川工場内 (56)参考文献 特開 昭60−253248(JP,A) 特開 昭54−78982(JP,A) 実開 昭59−182940(JP,U) (58)調査した分野(Int.Cl.7,DB名) H01L 23/36 H01L 23/40 ──────────────────────────────────────────────────続 き Continuing on the front page (72) Inventor Tsubun Kawai 292, Yoshida-cho, Totsuka-ku, Yokohama-shi, Kanagawa Prefecture Inside Production Research Laboratory, Hitachi, Ltd. (72) Inventor: Mitsuru Shirai 1-Horiyamashita, Hadano-shi, Kanagawa Prefecture, Hitachi, Ltd. Kanagawa Factory (56) References JP-A-60-253248 (JP, A) JP-A Sho54 −78982 (JP, A) Fully open sho 59-182940 (JP, U) (58) Fields investigated (Int. Cl. 7 , DB name) H01L 23/36 H01L 23/40

Claims (2)

(57)【特許請求の範囲】(57) [Claims] 【請求項1】低融点金属の接合領域となる半導体集積
回路素子の背面と熱伝導板に、それぞれ予め接合領域を
規制するメタライズ層を形成する段階と、多層配線基
板上に半導体集積回路素子を接続、搭載する段階と、
半導体集積回路素子のほぼ中心位置及び四隅に相当する
位置に開口穴を有する熱伝導板の側壁端面を多層配線基
板に接続、気密封止する段階と、少なくとも前記ほぼ
中心位置の開口穴に低融点金属はんだ棒を挿入し加熱溶
融することにより半導体集積回路素子と熱伝導板との隙
間を低融点金属で接合する段階と、熱伝導材料を介し
て冷却構造体を接続する段階とを有して成る半導体集積
回路モジュールの組立方法。
A step of forming a metallization layer for regulating a bonding region on the back surface of the semiconductor integrated circuit device and a heat conductive plate which are to be bonding regions of the low melting point metal; and forming the semiconductor integrated circuit device on a multilayer wiring board. Connection, mounting stage,
Equivalent to the center and four corners of a semiconductor integrated circuit device
Connect the side wall end face of the heat conduction plate having an opening hole at a position in the multilayer wiring board, comprising the steps of hermetically sealing at least said generally
A step of joining a gap between the semiconductor integrated circuit element and the heat conductive plate with a low melting point metal by inserting a low melting point metal solder rod into an opening hole at the center position and melting by heating, and forming a cooling structure through a heat conductive material. Connecting the semiconductor integrated circuit module.
【請求項2】半導体集積回路素子の四隅に相当する位置
に配設された熱伝導板の開口穴を通して低融点金属の過
不足を計測し、適正量に調整する段階を有して成る請求
項1記載の半導体集積回路モジュールの組立方法。
2. The method according to claim 1, further comprising the step of measuring the excess or deficiency of the low melting point metal through an opening of a heat conductive plate disposed at positions corresponding to the four corners of the semiconductor integrated circuit element, and adjusting the amount to an appropriate amount. 2. The method for assembling a semiconductor integrated circuit module according to claim 1.
JP17648392A 1992-07-03 1992-07-03 Assembly method of semiconductor integrated circuit module Expired - Fee Related JP3039584B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP17648392A JP3039584B2 (en) 1992-07-03 1992-07-03 Assembly method of semiconductor integrated circuit module

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP17648392A JP3039584B2 (en) 1992-07-03 1992-07-03 Assembly method of semiconductor integrated circuit module

Publications (2)

Publication Number Publication Date
JPH0621278A JPH0621278A (en) 1994-01-28
JP3039584B2 true JP3039584B2 (en) 2000-05-08

Family

ID=16014458

Family Applications (1)

Application Number Title Priority Date Filing Date
JP17648392A Expired - Fee Related JP3039584B2 (en) 1992-07-03 1992-07-03 Assembly method of semiconductor integrated circuit module

Country Status (1)

Country Link
JP (1) JP3039584B2 (en)

Families Citing this family (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
IT1285396B1 (en) * 1996-06-04 1998-06-03 Magneti Marelli Spa DISSIPATOR DEVICE FOR INTEGRATED CIRCUITS.
US6461891B1 (en) * 1999-09-13 2002-10-08 Intel Corporation Method of constructing an electronic assembly having an indium thermal couple and an electronic assembly having an indium thermal couple
JP4673949B2 (en) * 1999-11-12 2011-04-20 富士通株式会社 Semiconductor unit and manufacturing method thereof
JP2007005670A (en) * 2005-06-27 2007-01-11 Fujitsu Ltd Electronic part package and bonding assembly
JP5211457B2 (en) 2006-09-19 2013-06-12 富士通セミコンダクター株式会社 Semiconductor device and manufacturing method thereof
JP4796653B2 (en) * 2010-04-07 2011-10-19 富士通株式会社 Cooling system
JP2020077808A (en) * 2018-11-09 2020-05-21 株式会社デンソー Heat dissipation structure of semiconductor component
JP7358857B2 (en) * 2019-09-04 2023-10-11 富士通株式会社 Electronic unit, electronic unit manufacturing method, and electronic device

Also Published As

Publication number Publication date
JPH0621278A (en) 1994-01-28

Similar Documents

Publication Publication Date Title
US7384863B2 (en) Semiconductor device and method for manufacturing the same
US6846700B2 (en) Method of fabricating microelectronic connections using masses of fusible material
US5307240A (en) Chiplid, multichip semiconductor package design concept
US6326241B1 (en) Solderless flip-chip assembly and method and material for same
US6600224B1 (en) Thin film attachment to laminate using a dendritic interconnection
US4360142A (en) Method of forming a solder interconnection capable of sustained high power levels between a semiconductor device and a supporting substrate
US6977346B2 (en) Vented circuit board for cooling power components
JPH10256315A (en) Semiconductor chip bonding pad and its formation
US5367765A (en) Method of fabricating integrated circuit chip package
JPH10308465A (en) Cast metal seal for semiconductor substrate
JP3527229B2 (en) Semiconductor device, method of mounting semiconductor device, and method of repairing semiconductor device
CA1139008A (en) Method of forming an improved solder interconnection between a semiconductor device and a supporting substrate
JP3039584B2 (en) Assembly method of semiconductor integrated circuit module
JPH10173006A (en) Semiconductor device and its manufacturing method
JP2002158509A (en) High-frequency circuit module and production method therefor
JPH0724294B2 (en) Semiconductor mounted cooling structure
US20010013655A1 (en) Methods of making microelectronic connections with liquid conductive elements
EP0475223A2 (en) Method of fabricating integrated circuit chip package
JPH0582688A (en) Semiconductor integrated circuit device
JP3456576B2 (en) Semiconductor device and manufacturing method thereof
JPH07321258A (en) Semiconductor device
RU2134466C1 (en) Carrier of crystal of integrated circuit
JP2806362B2 (en) Method for manufacturing semiconductor device
JPH0677631A (en) Mounting method of chip component onto aluminum board
JP2748771B2 (en) Film carrier semiconductor device and method of manufacturing the same

Legal Events

Date Code Title Description
FPAY Renewal fee payment (prs date is renewal date of database)

Free format text: PAYMENT UNTIL: 20080303

Year of fee payment: 8

FPAY Renewal fee payment (prs date is renewal date of database)

Free format text: PAYMENT UNTIL: 20090303

Year of fee payment: 9

LAPS Cancellation because of no payment of annual fees