JP3032745B2 - Insulated gate type semiconductor device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an insulated gate semiconductor device used as a switching element in a power conversion device such as an inverter device, and more particularly to an improvement in a function of preventing the destruction of the insulated gate device when a load is short-circuited. .

[0002]

2. Description of the Related Art MOS type field effect transistor elements (M
An insulated gate element such as an OSFET) or an insulated gate bipolar transistor element (IGBT) has two current electrodes and a control electrode insulated between these electrodes, and the control electrode and one current electrode The magnitude of the current flowing between the two current electrodes is adjusted according to the magnitude of the voltage applied between them. The current increases as the applied voltage increases, and when the voltage is 0, the current is interrupted. The insulated gate semiconductor device provided with these insulated gate elements is used as a switching element in a power conversion device such as an inverter device that switches a current (main current) flowing to a load, for example. When a load is short-circuited in this power converter, an excessive main current (short-circuit current) flows through the insulated gate element, and if left unattended, the insulated gate element will be destroyed. Therefore, in the insulated gate semiconductor device, a drive circuit of the insulated gate element, which is a circuit part for driving the insulated gate element, is provided with a short-circuit current cutoff function for preventing destruction due to a short-circuit current.

FIG. 15 is a block diagram showing an example of a conventional insulated gate semiconductor device having a short-circuit current interrupting function. A load (not shown) is connected to the collector C of the IGBT 1 as an insulated gate element, and a collector current I _C flowing from the collector C to the emitter E is supplied to the load as a main current. The collector current I _C is controlled by the magnitude of the voltage (gate voltage) between the gate G and the emitter E. The larger the gate voltage is, the larger the collector current I _C flows. The gate voltage is adjusted and supplied by the gate drive circuit 42.

[0004] current transformer 43 is provided in the insulated gate semiconductor device, the collector current I _C is detected by the current transformer 43. The value of the detected collector current I _C is compared in the comparison circuit 44 with a predetermined reference value. Comparator circuit 44, sends a predetermined signal to the gate drive circuit 42 when the collector current I _C exceeds a reference value. The gate drive circuit 42 responds to this signal,
A predetermined gate voltage is output to the gate G to shut off the GBT 1. As a result, the excessive collector current I _C due to the load short circuit is cut off, and the IGBT 1 is protected from destruction.

Another example of a conventional insulated gate semiconductor device having a short-circuit current interrupting function is disclosed in Japanese Patent Application Laid-Open No. 63-3187.
There are techniques disclosed in JP-A-81-81, JP-A-64-68005, and JP-A-2-309714. The former two of these are the first MOSFETs controlling the main current.
A second MOSFET is provided in parallel with T, a main current is divided into the second MOSFET, and a transistor that is turned on when the divided current exceeds a predetermined magnitude is set to a first transistor.
And between the gate electrode and the source electrode of the second MOSFET. Therefore, when the main current exceeds a predetermined value due to a load short circuit or the like, the transistor is turned on and the gate voltages of these MOSFETs are reduced, whereby the main current is limited to a predetermined value or less.

[0006] The last of the above-mentioned prior arts is the former two.
A thyristor is provided in place of the transistor in the technique of the third party. Once the current shunted to the second MOSFET exceeds a predetermined magnitude and a predetermined voltage or more is applied between the gate and cathode of the thyristor, the thyristor continues to conduct thereafter and the gate voltage of the two MOSFETs decreases. It is pulled down to near zero and the main current is interrupted continuously.

[0007]

However, these conventional techniques have the following problems.
In particular, when the voltage supplied to the load is high, it is necessary to immediately cut off the short-circuit current. For this purpose, in the prior art shown in FIG. 15, the operation of the gate drive circuit 42 and the comparison circuit 44 is speeded up. There is a need. When the speed of these circuits is increased, there is a problem that these circuits easily cause malfunctions due to electric noise, and stable operations cannot be obtained. Also, there is a problem that circuit loss increases as the speed increases.

In the prior art in which the gate voltage of a MOSFET is limited by using a transistor, it is difficult for the transistor to sufficiently reduce the gate voltage to near zero, so that the short-circuit current is sufficiently reduced when the load is short-circuited. There was a problem that it could not be shut off. On the other hand, in the conventional technology using a thyristor, the response time of the thyristor is slower than that of the transistor, so that the time required for the thyristor to conduct after an excessively large main current is detected is longer than that of the transistor. For this reason, when the load is short-circuited, an excessive short-circuit current flows for a certain period.
There is a problem that the OSFET is destroyed. Also,
Since the current is interrupted after an excessive short-circuit current flows, an excessive surge voltage is generated due to the inductance of the load, which also causes a problem that the MOSFET is destroyed.

In the prior art, the magnitude of the ON voltage of the transistor, that is, the magnitude of the voltage signal supplied to the transistor, which is necessary to turn on the transistor, changes with the temperature of the transistor. For this reason, there is a problem that the magnitude of the limited main current varies depending on the temperature. The prior art further has a problem that the transistor is erroneously turned on due to the electric noise superimposed on the voltage signal described above. The effect of the electrical noise increases as the switching operation of the MOSFET increases.

SUMMARY OF THE INVENTION The present invention has been made to solve the above problems, and it is intended to limit an excessive main current at a high speed.
It is another object of the present invention to provide an insulated gate semiconductor device that cuts off to near zero. Another object of the present invention is to provide an insulated gate semiconductor device that does not cause a malfunction due to electric noise and does not vary in characteristics due to temperature.

[0011]

The device according to claim 1 of the present invention is an insulated gate semiconductor device,
(A) a first insulated gate element having a first current electrode, a second current electrode, and a first control electrode insulated from the first and second current electrodes, wherein the first control electrode is A first insulated gate element, in which the larger the first voltage applied between the second current electrodes is, the more the state between the first and second current electrodes becomes conductive in response to the first voltage; (B) a third current electrode, a fourth current electrode, and the third current electrode;
And a second control electrode insulated from the fourth current electrode, wherein the second voltage applied between the second control electrode and the fourth current electrode is larger. A second insulated gate element in which the third and fourth current electrodes become more conductive in response to the second voltage, wherein the third current electrode is connected to the first current electrode. A second insulated gate element in which the second control electrode is connected to the first control electrode, the fourth current electrode is coupled to the second current electrode, and (c) a voltage output terminal. A current detecting means interposed between the second current electrode and the fourth current electrode, wherein the current detecting means passes between the third current electrode and the fourth current electrode through the second insulated gate element Current detecting means for detecting a current flowing through the (D) a gate drive unit having an output terminal, the output terminal being coupled to the first and second control electrodes, and A gate drive means for outputting a voltage to the output terminal; and (e) a MOS field effect transistor element having a fifth current electrode, a sixth current electrode, and a third control electrode, wherein the fifth current electrode is First
A MOS field effect transistor element coupled to the second control electrode, the third control electrode coupled to the voltage output terminal, and the sixth current electrode coupled to the second current electrode; A Zener diode interposed between a sixth current electrode and the second current electrode,
A zener diode interposed in a direction in which a current flowing in the forward direction between the fifth current electrode and the sixth current electrode through the S-type field effect transistor element becomes a reverse current.

A device according to a second aspect of the present invention is the insulated gate semiconductor device according to the first aspect, wherein the Zener voltage in the Zener diode is:
The MOS field effect transistor element has a temperature characteristic complementary to the temperature characteristic of the gate threshold voltage.

According to a third aspect of the present invention, there is provided the insulated gate semiconductor device according to the first aspect, wherein the current detecting means comprises: (c-1) the second current electrode and the second current electrode. A first resistor interposed between the fourth current electrode and an end of the first resistor coupled to the fourth current electrode, the first resistor functioning as the voltage output terminal;

According to a fourth aspect of the present invention, there is provided the insulated gate semiconductor device according to the first aspect, wherein the MOS field effect transistor element comprises (e-
1) A plurality of unit MOS field effect transistor elements having a seventh current electrode, an eighth current electrode, and a fourth control electrode are provided, and the seventh current electrodes of the plurality of unit MOS field effect transistor elements are connected to each other. The current electrodes and the fourth control electrodes are connected to each other, and the seventh current electrode, the eighth current electrode, and the fourth control electrode are
Each functions as the fifth current electrode, the sixth current electrode, and the third control electrode.

According to a fifth aspect of the present invention, there is provided the insulated gate semiconductor device according to the first aspect, wherein (g) a light emitting diode coupled to the MOS field effect transistor element. A light emitting diode interposed in a direction in which a current flowing in the forward direction between the fifth current electrode and the sixth current electrode through the MOS field effect transistor element becomes a forward current. Prepare.

According to a sixth aspect of the present invention, there is provided the insulated gate semiconductor device according to the first aspect, wherein the gate driving means is configured to: (d-1) output the adjusted third voltage. A gate drive unit capable of outputting a voltage corresponding to a potential lower than the potential of the second current electrode,
(G) a first diode interposed between the first and second control electrodes and the fifth current electrode, wherein the first diode is
A current flowing in a forward direction between the fifth current electrode and the sixth current electrode through the S-type field effect transistor element;
A first diode inserted in a direction to be a forward current,
Is further provided.

A device according to a seventh aspect of the present invention is the insulated gate semiconductor device according to the sixth aspect, wherein the first diode is a light emitting diode.

The device according to claim 8 of the present invention is the insulated gate semiconductor device according to claim 3, wherein (h) an interposed device is provided between the third control electrode and the voltage output terminal. A second resistor.

According to a ninth aspect of the present invention, there is provided the insulated gate semiconductor device according to the eighth aspect, wherein (i) a second diode connected in parallel to the second resistor. A second diode interposed between the third control electrode and the voltage output terminal;
The voltage output from the voltage output terminal is transferred to the third control electrode in a state where the second diode is short-circuited so that the OS-type field effect transistor element shifts from the cut-off state to the conductive state. A second diode to be inserted.

According to a tenth aspect of the present invention, there is provided the insulated gate semiconductor device according to the ninth aspect, wherein at least the MOS field effect transistor element, the zener diode, the second resistor, And the second diode is integrated on one semiconductor chip.

The device according to claim 11 of the present invention is an insulated gate semiconductor device, comprising: (a) insulating a first current electrode, a second current electrode, and the first and second current electrodes. A first insulated gate element having a first control electrode provided therein, wherein the larger the first voltage applied between the first control electrode and the second current electrode, the greater the response to the first voltage. (B) a third current electrode, a fourth current electrode, and the third and fourth current electrodes, the first insulated gate element being in a more conductive state between the first and second current electrodes. A second insulated gate element having an insulated second control electrode, wherein the larger the second voltage applied between the second control electrode and the fourth current electrode is, the more responsive the second voltage is. And the third and fourth current electrodes become more conductive. A second insulated gate element, and the third current electrode and the first current electrode is connected with the second control electrode and the first control electrode is connected, the fourth
A second insulated gate element having a current electrode coupled to the second current electrode; and (c) a first junction field effect transistor element interposed between the second current electrode and the fourth current electrode. A first junction field-effect transistor element having a fifth current electrode, a sixth current electrode, and a third control electrode, wherein the fifth current electrode is connected to a fourth current electrode, A first junction field-effect transistor element having a sixth current electrode coupled to the second current electrode and a third control electrode coupled to the fourth current electrode; and (d) the sixth current electrode and the second current electrode. A first resistor interposed between the first and second current electrodes; and (e) an output terminal, the output terminal being coupled to the first and second control electrodes, and a third voltage adjusted to the output terminal. Gate driving means for outputting
A second junction field-effect transistor device having a seventh current electrode, an eighth current electrode, and a fourth control electrode,
The seventh current electrode is coupled to the first and second control electrodes, the fourth control electrode is coupled to the third control electrode, and the eighth current electrode is coupled to the second current electrode. (G) a second resistor interposed between the eighth current electrode and the second current electrode.

[0022]

BEST MODE FOR CARRYING OUT THE INVENTION

<1. First Embodiment <1-1. Configuration of Device> FIG. 1 is a circuit diagram showing a configuration of a semiconductor device of a first embodiment. A load (not shown) is connected to the collector C (first current electrode) of the IGBT 1 (first insulated gate element), and a collector current I _C flowing mainly from the collector C to the emitter E (second current electrode) is
It is supplied to the load as main current. This collector current I _C
Is controlled by the magnitude of the gate voltage, which is the voltage between the gate G (control electrode) and the emitter E. The larger the gate voltage is, the larger the collector current I _C flows. The gate voltage is supplied after being adjusted by the gate drive circuit 9 (gate drive means). Between the output terminal G _O and gate G of the gate driving circuit 9 resistor 4 is inserted. A power supply 10 connected to the gate drive circuit 9 supplies a power supply voltage to the gate drive circuit 9.

IGBT having a lower current capacity than IGBT1
2 (second insulated gate element) is provided in parallel with the IGBT 1. IGBT1 and IGBT2 have collector C
And the gates G are connected to each other. A part of the main current supplied to the load is shunted to the IGBT 2 as the collector current I _C of the IGBT 2. IGBT2
Between the emitter E of the IGBT 1 and the emitter E of the IGBT 1
Is connected. The current shunted to the IGBT2 is a resistor 3
Pass through. Therefore, a voltage proportional to the divided current is generated at both ends of the resistor 3. Therefore, a higher voltage is generated across the resistor 3 as the main current increases.

A transistor 5 and a thyristor 7 are interposed between the gate G and the emitter E of the IGBT 1. The collector G of the transistor 5 and the anode of the thyristor 7 are connected to the gate G, and the base B of the transistor 5 is connected between the emitter E of the IGBT 2 and the resistor 3. The emitter E of the transistor 5 is connected via a Schottky barrier diode 6 (first diode)
It is connected to the emitter E of the IGBT1. The Schottky barrier diode 6 is connected to the collector C of the transistor 5.
Are connected in a direction in which a current flowing from the gate to the emitter E is a forward current. The cathode of the thyristor 7 is connected to the emitter E of the IGBT 1, and the gate of the thyristor 7 is connected to the resistor 8
Is connected between the emitter E of the IGBT 2 and the resistor 3.

<1-2. Operation of Apparatus> While the main current is at a low value within the range of normal operation, the voltage generated across the resistor 3 is sufficiently low. voltage (V _bE) between the not high enough to turn on (conducting) transistor 5, also the voltage between the gate and cathode of the thyristor 7, not high enough to turn on the thyristor 7. Therefore, both the transistor 5 and the thyristor 7 are off (cut off). At this time, the potential of the gate G matches the potential output from the gate drive circuit 9. That is, IGBT1 and IGBT2 operate in response to the output potential of gate drive circuit 9.

On the other hand, when the main current rises beyond the normal operation range due to a short circuit in the load or the like, the voltage across the resistor 3 increases accordingly. As a result, transistor 5
The base-emitter voltage V _BE is increased enough to turn on the transistor 5, also increases enough to turn on the gate-cathode voltage thyristor 7 of the thyristor 7. Therefore, the transistor 5 is immediately turned on, and the potential of the gate G is reduced to a certain value. The thyristor 7 is turned on somewhat later than this, and the gate G is pulled down to a potential substantially equal to the potential of the emitter E of the IGBT 1.
BT1 and IGBT2 are cut off, and the main current eventually becomes zero. These protect the IGBT 1 from destruction. The resistance value of the resistor 3 is appropriately selected according to the setting of the upper limit of the normal operating range of the main current.

The Schottky barrier diode 6
Is provided for the purpose of preventing oscillation of the semiconductor device. That is, since the reverse recovery time of the Schottky barrier diode 6 is shorter than that at the junction between the base B and the emitter E of the transistor 5, by installing the Schottky barrier diode 6 as shown in FIG.
Circuit oscillation can be prevented.

<1-3. Actual Measurement Data> FIG. 2 is a graph showing actual measurement results of the insulated gate semiconductor device of this embodiment. Keep graph, the voltage V between the vertical axis and the emitter E of the output terminal G _O and IGBT1 gate drive circuit 9
_GO, and corresponds to a main current (substantially matching the collector current I _C of the IGBT 1), the horizontal axis corresponds to time. The rated value of the voltage V _CE between the collector C and the emitter E of the IGBT 1 in this semiconductor device is 600 V, and half of the rated value is applied at 300 V in the actual measurement. The output terminal voltage V _GO is increased from zero to about 1 which is a value sufficient to make the IGBT 1 conductive.
When the voltage rapidly rises to 0 V, the collector current I _C increases first. However, the collector current I _C does not rise endlessly, but is limited to a value near 100 A by turning on the transistor 5. After that, the thyristor 7 is turned on with some delay, so that the voltage V _G between the gate G and the emitter E of the IGBT 1 is changed.
Is reduced to approximately zero. Output terminal voltage V _GO is about 9
This is why the voltage is reduced to 8 V near μsec. The width of the decrease in the output terminal voltage V _GO reflects the ratio between the resistance 4 and the output resistance of the gate drive circuit 9. When thyristor 7 is turned on, IGBT 1 and IGBT
Since 2 shuts off, the main current goes to zero as shown in the graph. When the time reaches 14 μsec, the output terminal voltage V _GO is returned to zero and the measurement is completed.

FIG. 3 shows a circuit having a configuration in which the thyristor 7 is removed from the semiconductor device of this embodiment.
9 is a graph showing the result of the same measurement as in FIG. In this case, after the output terminal voltage V _GO rises, the main current is limited to a value of about 100 A by the operation of the transistor 5 in the same manner as the result in FIG. However, the main current continues to maintain a value of about 100 A until the time when the output terminal voltage V _GO returns to zero at 7 μsec. That is, even if the load becomes abnormal as the main current exceeds the normal operation range, the main current keeps maintaining a considerably high value.
For this reason, in this circuit configuration, there is a risk that the IGBT 1 may be destroyed at the time of an abnormality such as a load short circuit.

Although not shown, a circuit having a configuration in which the thyristor 7 is left and the transistor 5 is removed from the semiconductor device of this embodiment shown in FIG. 1 is easily predicted from the measurement results shown in FIG. As described above, after a certain period of time from the rise of the output terminal voltage V _GO , the thyristor 7 turns on and the main current is reduced to zero. However, there is no mechanism for limiting the main current until the thyristor 7 is turned on, so that the main current runs away to a value much higher than about 100 A shown in FIG.
The runaway abnormally high main current may cause the IGBT 1 to be destroyed. When the thyristor 7 is turned on after a certain period of time, the main current rapidly drops from an abnormally high runaway current level to zero. As a result, a high surge voltage is generated between the collectors and the emitters of the IGBT1 and the IGBT2 due to the inductance of the load or the parasitic inductance of the load line. This surge voltage further increases the IGBT1 and I
It causes the destruction of GBT2.

Since the semiconductor device of this embodiment shown in FIG. 1 includes both the transistor 5 and the thyristor 7, it may be used when the main current exceeds the normal operating range and becomes abnormally high, such as when the load is short-circuited. , quickly suppressed to a certain limit an increase in the main current, and since pulled down to zero after a certain period of time, due to the excessive collector current I _C I
Destruction of GBT1 is prevented. In addition, since the endless increase of the main current is suppressed, the surge voltage generated when the thyristor 7 is turned on can be suppressed low. Therefore, the IGBT 1 and the IGBT 2 are applied with an excessively high collector-emitter voltage V _CE , causing the IGBT 1
1 is also prevented.

<2. Second Preferred Embodiment> FIG. 4 is a circuit diagram showing a configuration of a semiconductor device according to a second preferred embodiment. In this embodiment, a Zener diode 13 is connected to the emitter E of the transistor 5 in series with the Schottky barrier diode 6. The Zener diode 13 is provided in such a direction that the current flowing from the collector C to the emitter E of the transistor 5 becomes a reverse current. The base of transistor 5
The emitter-to-emitter voltage V _BE varies with a change in temperature. Therefore, in the semiconductor device of the first embodiment, the transistor 5
The voltage between both ends of the resistor 3 for turning on the transistor 5 fluctuates, and as a result, the magnitude of the main current that turns on the transistor 5 fluctuates. The reverse voltage (Zener voltage) of the Zener diode 13 increases as the temperature rises, the base-emitter voltage V
It has the property of increasing contrary to _BE . Therefore, as shown in FIG. 4, by selecting and installing an appropriate Zener diode 13, the voltage between both ends of the resistor 3 in which the transistor 5 is turned on does not depend on a change in temperature.
It can be kept constant.

<3. Third Preferred Embodiment> FIG. 5 is a circuit diagram showing a configuration of a semiconductor device according to a third preferred embodiment. In this embodiment, when the IGBT 1 is turned off, a reverse voltage is applied between the gate G and the emitter E of the IGBT 1 in order to speed up the response. for that reason,
The gate drive circuit 9 has a reverse bias power supply 1 in addition to the power supply 10.
1 is connected. The resistor 3 and the potential at the emitter E of the via transistor 5 IGBT 1 is pulled up the potential of the gate G, so that the gate-emitter voltage V _G does not prevent to become a value near zero, the diode 12 ( A second diode). The diode 12 is interposed between the gate G, the collector C of the transistor 5 and the anode of the thyristor 7, and has an IGBT
A reverse current flowing from the emitter E of 1 to the gate G via the resistor 3 and the transistor 5 is blocked.

<4. Fourth Preferred Embodiment> FIG. 6 is a circuit diagram showing a configuration of a semiconductor device according to a fourth preferred embodiment. In this embodiment, a light emitting diode 14 (notifying means) is interposed between the emitter E of the transistor 5 and the emitter E of the IGBT 1. The light emitting diode 14 is a transistor 5
The current flowing from the collector C to the emitter E of the light emitting diode 14 is set in a direction that becomes a forward current of the light emitting diode 14. When the transistor 5 is turned on, the light emitting diode 14 emits light. For this reason, it can be recognized by light emission that the transistor 5 has been activated because the main current has increased abnormally due to a load short circuit or the like. In other words, it is possible to easily recognize whether the main current has stopped normally or stopped due to the occurrence of an abnormality.

<5. Fifth Embodiment> In each of the above embodiments, the transistor 5, the thyristor 7, and the resistor 3
It may be configured in one semiconductor chip. Furthermore, the structure including the resistor 8, the Schottky barrier diode 6, the Zener diode 13 and the like may be included in one semiconductor chip.

<6. Sixth Preferred Embodiment <6-1. Device Configuration> FIG. 7 is a circuit diagram showing a configuration of a semiconductor device according to a sixth preferred embodiment. A load (not shown) is connected to the collector C (first current electrode) of the IGBT 101 (first insulated gate element), and a collector current I _C mainly flowing from the collector C to the emitter E (second current electrode).
Is supplied to the load as a main current. The collector current I _C is controlled by the size of the gate G (control electrode) and a voltage between the emitter E gate-emitter voltage V _G. As the gate-emitter voltage V _G is greater flows large collector current I _C is. Gate-emitter voltage V _G is supplied by adjusting the gate drive circuit 210 (gate driving means). Resistor 109 between the output terminal G _O and gate G of the gate driving circuit 210 is interposed. The power supply 103 connected to the gate drive circuit 210
The power supply voltage is supplied to the gate drive circuit 210.

IG having a lower current capacity than IGBT 101
BT102 (second insulated gate element) is IGBT10
1 are provided in parallel. IGBT101 and IGBT
In 102, collectors C and gates G are connected to each other. A small part of the main current supplied to the load
The collector current I _C of the IGBT 102 is IGBT 1
Divide to 02. Emitter E of IGBT102 and IGB
A resistor 104 is connected between the emitters E of T101. The current shunted to the IGBT 102 passes through the resistor 104. For this reason, a voltage V _R proportional to the divided current is generated at both ends of the resistor 104. Thus, a high voltage V _R is generated across the higher primary current is large resistor 104.

A series circuit of a MOS field effect transistor element (hereinafter abbreviated as MOSFET) 105 and a Zener diode 106 is interposed between the gate G and the emitter E of the IGBT 101 in parallel. The gate G is connected to the drain D of the MOSFET 105 via the resistor 110. The drain D is also connected to one end of the resistor 109. Source S of MOSFET 105
Is connected to the cathode of the Zener diode 106. The anode of the Zener diode 106 is IGB
It is connected to the emitter E of T101. That is, the Zener diode 106 is installed in a direction in which a current flowing from the drain D to the source S of the MOSFET 105 becomes a reverse current of the Zener diode 106.

The gate G1 of the MOSFET 105 is coupled to the emitter E of the IGBT 102 via the resistor 111, the resistor 112, and the diode 113. The resistor 111 and the resistor 112 are connected in series, and a diode 113 is connected to the resistor 112 in parallel. Diode 113 is inserted in the direction in which the anode is connected to emitter E of IGBT 102.

In the IGBT 101, a freewheel diode 301 for preventing breakdown due to generation of a reverse voltage between the collector C and the emitter E when the element shifts from the conductive state to the cutoff state is connected in parallel. It is connected. Similarly, the MOSFET 105 has a MOSF
A freewheel diode 302 for protecting the ET 105 is connected in parallel.

<6-2. Schematic Operation of Device> MOSFET 10
5 is the gate voltage between the gate G1 and the source S
Source voltage V _G1 is turned off when lower than the intrinsic gate threshold voltage V _{GS (th)} to MOSFET 105, is turned on when higher than the gate threshold voltage V _{GS (th).} Therefore, the voltage V _R generated across the resistor 104 is equal to the Zener voltage Vz inherent to the Zener diode 106 and M
When it is lower than the sum of the gate threshold voltage V _{GS (th)} of the OSFET 105, the MOSFET 105 turns off, and when it is higher, it turns on. Main current, while a low value of the range of normal operation, the voltage V _R is sufficiently lower than the sum of the Zener voltage Vz and the gate threshold voltage V _{GS (th).} Therefore, M
OSFET 105 is off. At this time, the potential of the gate G matches the potential output from the gate drive circuit 210. That is, the IGBT 101 and the IGBT 102
Operate in response to the output potential of gate drive circuit 210.

On the other hand, due to the load is shorted, the main current is increased beyond the range of normal operation, the voltage V _R increases accordingly. When the voltage V _R becomes high enough to the main current exceeds the sum of the Zener voltage Vz and the gate threshold voltage V _{GS (th),} MOSFET105 is turned on. as a result,
The potential of the gate G is reduced. Thereby, IGB
When T101 and IGBT102 are close to the blocking state,
The rise of the main current is prevented. That is, this semiconductor device, the voltage V _R is the Zener voltage Vz and the gate threshold voltage V
_The main current is prevented from rising beyond the upper limit of the main current corresponding to the sum of _{GS (th)} . As a result, I
Destruction of the GBT 101 due to overcurrent is prevented. Resistance 1
The resistance value of 04 is appropriately selected according to the upper limit value of the main current set in the normal operation range.

<6-3. Characteristic Operation of Apparatus> Instead of the resistor 104, another current detection circuit for detecting the collector current I _{C of the} IGBT 102 and outputting a voltage corresponding to the collector current I _C is provided. You may. However, the resistance 104
In this embodiment, the semiconductor device can be configured with the simplest and lowest cost. Resistor 104, the rate for converting the collector current I _C to the voltage V _R is earlier. In addition, by selecting a high-precision resistor for the resistor 104, the accuracy of conversion from the collector current I _C to the voltage V _R can be easily set high. That is, this embodiment has advantages that the current detection circuit is excellent in accuracy and high-speed response, and has a simple configuration.

In this semiconductor device, the MOSFET 105
, A zener diode 106 is provided in series.
Therefore, in this semiconductor device, the Zener diode 1
06 compared to the conventional semiconductor device without 06.
05 is the voltage V _R required to be on high by the amount of the Zener voltage Vz. As a result, the electrical noise superimposed on the voltage signal input to the gate G1 causes the MOSFET 105
It is unlikely that a malfunction will occur when the device is turned on by mistake. That is, this semiconductor device has a higher noise margin than the conventional device.

[0045] In this embodiment, the voltage V _R gate G
A resistor 112 and a resistor 111 are interposed in a line transmitting to 1. Thus, oscillation of the semiconductor device is prevented.

In this embodiment, a diode 113 is further provided in parallel with the resistor 112. Diode 1
13 is installed in a direction in which the direction of transmitting the voltage V _R to the gate G1 becomes forward direction of the diode 113. Therefore, in order to convert from OFF to ON operation of the MOSFET 105, when the resistor 104 sends out voltage V _R, the voltage V
_R is transmitted to the gate G1 in a short time. That is, the diode 113 has a function of accelerating the change of the MOSFET 105 from off to on. Thereby, the delay time until the main current is limited to the upper limit or less after the load is short-circuited is reduced.

<7. Seventh Preferred Embodiment> In the semiconductor device of the sixth preferred embodiment, the gate threshold voltage V
_{GS (th)} fluctuates with a change in temperature. This means
This means that the upper limit of the main current can vary with temperature. By the way, commercially available Zener diodes having various temperature characteristics with a Zener voltage Vz are available. Therefore, it is possible to select a Zener diode in which the temperature dependence of the Zener voltage Vz and the temperature dependence of the gate threshold voltage V _{GS (th)} compensate each other, and use this for the Zener diode 106. . In the semiconductor device in which the zener diode 106 is selected as described above, the MOS
The height of the voltage V _R necessary to turn on the FET105 is constant without depending on temperature. That is, in this semiconductor device, the upper limit value of the main current is constant without depending on the temperature.

<8. Eighth Preferred Embodiment> FIG. 8 is a circuit diagram showing a configuration of a semiconductor device according to an eighth preferred embodiment. In this embodiment, when the IGBT 101 is turned off,
The IGBT 101 is configured so that a reverse voltage is applied between the gate G and the emitter E. Therefore, the gate drive circuit 210 has a reverse bias power supply 107 in addition to the power supply 103.
Is connected. Therefore, there is an advantage that the response when the IGBT 101 is turned from the on state to the off state is faster than that of the device according to the sixth or seventh embodiment. Further, the off state is sufficiently stabilized.

In this embodiment, since a reverse voltage is applied between gate G and emitter E, I
The potential at the emitter E of the GBT 101 passes through the Zener diode 106 and the MOSFET 105,
By raising the potential of the gate G, the gate-emitter voltage V _G may become a value near zero. In order to prevent this, a diode 108 (first diode) is provided. The diode 108 is interposed between the gate G and the drain D of the MOSFET 105. The diode 108 is connected to the MOSFET 10
5 is inserted in the direction in which the forward current flowing through the diode 5 becomes the forward current of the diode 108.

The diode 108 includes the emitter E of the IGBT 101, the Zener diode 106, the MOSFET
105, the current going to the gate G, ie, M
The reverse current of the OSFET 105 is blocked. Thus, the negative potential output from the gate drive circuit 210 is transmitted to the gate G correctly. The diode 108 has a function of preventing the MOSFET 105 from being broken by a reverse current.

The diode 108 is connected to the MOSFET 105
Does not prevent the current from flowing through the MOSFET 105 in the forward direction. Therefore, the diode 108
Does not hinder the function of this semiconductor device for preventing an excessive main current.

<9. Ninth Preferred Embodiment> FIG. 9 is a circuit diagram showing a configuration of a semiconductor device according to a ninth preferred embodiment. In this embodiment, a light emitting diode 303 is used as the diode 108 in the semiconductor device of the eighth embodiment.
When the MOSFET 105 is turned on, the MOSFET 105
Current also flows through the light emitting diode 303,
The light emitting diode 303 emits light.

Therefore, it is possible to recognize from the light emission of the light emitting diode 303 that the function of limiting the main current has been activated due to the abnormal increase of the main current due to a load short circuit or the like. That is, it is possible to easily recognize whether the semiconductor device is in a normal operation state or an abnormal operation state.

Light emitting diode 303 also has the function of diode 108 in the eighth embodiment. That is, in the semiconductor device of this embodiment, by using the light emitting diode 303, both the function of blocking the reverse current of the MOSFET 105 and the function of notifying an abnormality in the operation state of the device are realized.

<10. Tenth Preferred Embodiment> FIG. 10 is a circuit diagram showing a configuration of a semiconductor device according to a tenth preferred embodiment. In this embodiment, the MOSFET 105 in the semiconductor device of the ninth embodiment includes two MOSFETs 105a and 105b connected in parallel to each other. For each of the MOSFETs 105a and 105b, freewheel diodes 302a and 302b are individually connected instead of the freewheel diodes 302. Also, instead of the resistor 111, the resistors 111a, 11a
1b is connected to respective gates of the MOSFETs 105a and 105b. Freewheel diode 3
The function of 02a, 302b is a freewheel diode 3
02, and the functions of the resistors 111a and 111b are the same as the functions of the resistor 111.

In the semiconductor device of this embodiment, since two MOSFETs 105a and 105b are provided in parallel, when these elements are turned on, as compared with a semiconductor device provided with only one MOSFET 105. Have a low on-resistance and a large current capacity. In an insulated gate semiconductor device used as a switching element such as an inverter, the IGBT 101 needs to be turned on and off at a high speed, so that the output resistance of the gate drive circuit 210 and the resistance value of the resistor 109 are set low. Particularly, in a large-sized insulated gate semiconductor device for supplying a large main current, their resistance values are set lower. For this reason,
In a large-sized insulated gate semiconductor device that performs switching operation at high speed, the on-resistance of the MOSFET 105
It must be sufficiently low in accordance with the resistance value such as 09. This is because, if there is no on-resistance is sufficiently lower than the resistance value of such resistors 109, when MOSFET105 is turned on, the gate-emitter voltage V _G pull down sufficiently, the main current below a predetermined upper limit value restriction Because they can no longer do it. In a large-sized insulated gate semiconductor device, when the MOSFET 105 is turned on, the MOSF
Since the current flowing through the ET105 is large, the MOSFET 1
05 must be set large.

The semiconductor device of this embodiment is a MOSF
ET105 is connected to two MOSFETs 1 connected in parallel.
These requirements are met by the configuration of the components 05a and 105b. The MOSFET 105 is not limited to two, and may be configured by two or more MOSFETs connected in parallel as needed. Same MOSF
When the ET is used, naturally, the larger the number of MOSFETs connected in parallel, the more the MOSFET 105
Has a low on-resistance and a large current capacity.

<11. Eleventh Preferred Embodiment> FIG. 11 is a circuit diagram showing a configuration of a semiconductor device according to a eleventh preferred embodiment. In this embodiment, in the semiconductor device of the sixth embodiment,
A light emitting diode 304 is connected to the MOSFET 105 in series. The light emitting diode 304 is a MOSFET
Current flowing in the forward direction 105, ie, MOSFET1
A current flowing from the drain D to the source S of the light-emitting diode 05 is connected in a direction to be a forward current of the light-emitting diode 304.

When the MOSFET 105 conducts,
A current also flows through the light emitting diode 304 at the same time. That is, when the MOSFET 105 conducts, light is emitted from the light emitting diode 304. Therefore, it is possible to recognize from the light emission of the light emitting diode 304 that the function of limiting the main current has been activated due to the abnormal increase of the main current due to a load short circuit or the like. That is, in this semiconductor device, it is possible to easily recognize whether the device is in a normal operation state or an abnormal operation state with a simple configuration.

<12. Twelfth Embodiment In each of the above embodiments, the circuit portion including the MOSFET 105 and the Zener diode 106 can be integrated on one semiconductor chip. Since a part of the circuit is integrated, assembly of the semiconductor device is facilitated. In addition, MOSFET 10
5 and the Zener diode 106 are integrated on one semiconductor chip, so that the device can be configured with good reproducibility so that the temperature characteristics of both are complementary to each other. Moreover, since both are formed on the same semiconductor substrate, the temperatures of both are more uniform. For this reason, the voltage V _R required to turn on the MOSFET 105
Can be kept more invariant with temperature changes.

FIG. 12 is a circuit diagram of a device in which a part of the device shown in FIG. 7 is integrated. In this device, a circuit portion 401 including a freewheel diode 302, a resistor 111, a resistor 112, and a diode 113 is integrated. On the other hand, the resistors 104, 109 and 110
Are removed from the object of integration and are installed around the integrated circuit portion 401. Each circuit component included in the integrated circuit portion 401 is a circuit component that can relatively widely correspond to various ratings of the semiconductor device. On the other hand, the resistors 104, 109, and 110 excluded from the integration target
For example, it is necessary to select the resistance value, the heat resistance and the like according to the rating of the main current to be controlled. In this embodiment, these resistors are individually arranged outside the integrated circuit portion 401, and the circuit components that are relatively independent of the device rating are integrated. It can be commonly used for semiconductor devices. That is, the device of this embodiment has an advantage that the manufacturing cost can be reduced.

<13. Embodiment 13> FIG.
2 is a circuit diagram of a device in which a part of the device shown in FIG.
In this device, MOSFETs 105a and 105b, a Zener diode 106, resistors 111a and 111b, a resistor 112, and a diode 113 are integrated to form an integrated circuit portion 402. On the other hand, the resistors 104, 109, and 110 are excluded from integration targets and are installed around the integrated circuit portion 402. Also in the device of this embodiment, the circuit components depending on the rating of the device are individually arranged outside the integrated circuit portion 402 similarly to the twelfth embodiment, and the circuit components relatively independent of the rating of the device are integrated. Therefore, there is an advantage that the manufacturing cost can be reduced.

<14. Fourteenth Embodiment><14-1. Configuration of Device> FIG. 14 is a circuit diagram showing a configuration of a semiconductor device of a fourteenth embodiment. In this embodiment, two junction field effect transistor elements (JFE
A current mirror circuit having T) is used. I
A series circuit of a JFET 114 (first junction field effect transistor element) and a resistor 116 (first resistor) is interposed between the emitter E of the GBT 102 and the emitter E of the IGBT 101. The drain D of JFET 114 is IG
The source S is connected to the emitter E of the BT102,
16 is connected to one end. The other end of the resistor 116 is connected to the emitter E of the IGBT 101. J
The current I1 flowing through the FET 114 and the resistor 116 is I
It matches the collector current I _{C of the} GBT 102. JFET
The gate G of 114 is short-circuited with the drain D.

On the other hand, the JFET 115 (second junction field effect transistor element) forms a series circuit of the light emitting diode 303 and the resistor 117 (second resistor). The anode of the light emitting diode 303 is connected via the resistor 110 to
It is coupled to the gate G of IGBT101 and IGBT102. The cathode of the light emitting diode 303 is JFET1
15 is connected to the drain D. The source S of the JFET 115 is connected to one end of the resistor 117. The other end of the resistor 117 is connected to the emitter E of the IGBT 101. Gate G of JFET115 and JFET1
The fourteen gates G are connected to each other. In this embodiment, the gate drive circuit 21 is similar to the ninth embodiment.
0 is connected to a reverse bias power supply 107 in addition to the power supply 103.

<14-2. Characteristic Operation of Device> As described above, the JFET 114 and the JFET 115 constitute a current mirror circuit. Moreover, the resistance 116 and the resistance 11
7, negative feedback is applied to these JFETs 114 and 115. Therefore, the magnitude of current I2 flowing through JFET 115 is
Of the resistance 116 and the resistance 11
7 and the current I1. That is, the current I2
Always corresponds to the product of the ratio of resistor 116 to resistor 117 and current I1. Therefore, JFET11
5 always carries a current proportional to the main current supplied to the load. The magnitude of the current I2 includes two resistors 11
High accuracy according to the accuracy of the resistance values of 6, 117 is guaranteed. Further, since the fluctuation of the resistance values of the resistors 116 and 117 with the temperature change is small, the relationship between the main current and the current I2 does not depend much on the temperature. Therefore, the semiconductor device of this embodiment has an advantage that the function of suppressing overcurrent is realized with high accuracy, and that the function does not depend much on temperature.

Further, similarly to the semiconductor device according to the ninth embodiment, since the reverse bias power supply 107 is connected to the gate drive circuit 210 in addition to the power supply 103, the IGBT 1
The response when the 01 is changed from the on state to the off state is fast, and the off state is sufficiently stabilized. Also,
The light emitting diode 303 realizes both a function of preventing a reverse current of the JFET 115 and a function of notifying an abnormality in an operation state of the device.

<Other Embodiments> (1) In the semiconductor device of the above embodiments, the IGBT 1
Although an n-channel IGBT is used for 01 and 102, a p-channel IGBT can be used in the present invention.

(2) In the semiconductor device of the above embodiment, IGB is used as an element for controlling and detecting the main current.
T101 and 102 are used. However, the present invention
Not only the GBT but also generally an insulated gate element such as a MOS
The present invention can also be applied to a semiconductor device using a type field effect transistor element or the like.

[0069]

When using the semiconductor device of the present invention, a load is connected to the first insulated gate element. The main current is adjusted by the first insulated gate element. Part of this main current is diverted to the second insulated gate element. The shunted current is converted by the current detection means into a voltage having a height corresponding to the magnitude of the current. If the main current rises excessively due to a load short circuit or the like, the converted voltage exceeds a predetermined on-voltage, and as a result, the MOS field effect transistor element becomes conductive.

Then, in the first and second insulated gate elements, the respective voltages between the first control electrode and the second current electrode and between the second control electrode and the fourth current electrode are reduced. The insulated gate element approaches a cutoff state, and an increase in the main current exceeding a predetermined limit is suppressed. MO
Since the zener diode is connected in series to the sixth current electrode of the S-type field effect transistor element, the ON voltage of the MOS type field effect transistor element is higher by an amount corresponding to the zener voltage of the Zener diode. Therefore, there is a high margin for electrical noise superimposed on the voltage signal supplied to the third control electrode of the MOS field effect transistor element. That is, in this semiconductor device, the malfunction of the MOS field effect transistor element due to the electric noise is suppressed (claims 1 to 10).

In the semiconductor device of the present invention, a Zener diode whose Zener voltage temperature characteristic is complementary to the gate threshold voltage temperature characteristic of the MOS field effect transistor element is selected and used. As a result, the temperature dependency of the ON voltage of the MOS field effect transistor element is suppressed. As a result, in this semiconductor device, the magnitude of the main current that causes conduction of the MOS field effect transistor element does not fluctuate much with a change in temperature.

In the semiconductor device of the present invention, a resistor is used as the current detecting means. When a current flowing through the second insulated gate element flows through the first resistor, a voltage proportional to the current is generated between both ends of the first resistor. This voltage is supplied to the third control electrode of the MOS field effect transistor device. That is, in this semiconductor device, the current detecting means can be simply configured, and the cost required for the configuration of the device is reduced. In addition, the response when converting the current into the voltage is fast. Further, by selecting a resistor having a high accuracy of the resistance value, it is possible to easily set the conversion accuracy to be high (claims 3, 8 to 10).

In the semiconductor device according to the present invention, since a plurality of MOS field effect transistor elements are connected in parallel, the resistance value of the MOS field effect transistor element when the MOS field effect transistor element conducts is low. . In a semiconductor device corresponding to a large main current, the output resistance of the driving means is set low to cut off the first and second insulated gate elements at a high speed. In this semiconductor device, since the resistance value of the MOS field effect transistor element is low, even if the output resistance of the driving means is low, the resistance between the first control electrode and the second current electrode and between the second control electrode and the fourth current electrode can be reduced. Can be sufficiently reduced.
That is, this semiconductor device can adjust a large main current at a high speed and can sufficiently suppress an excessive increase in the main current.

In the semiconductor device of the present invention, a light emitting diode is connected in series to the MOS field effect transistor element. Therefore, when the MOS field effect transistor element is turned on, the current flowing through the MOS field effect transistor element simultaneously flows through the light emitting diode. As a result, the light emitting diode emits light when the MOS field effect transistor element is turned on. That is, in this semiconductor device, whether the semiconductor device is in the normal operation or the abnormal operation can be easily recognized by the light emission of the light emitting diode.

In the semiconductor device according to the present invention, since the gate drive section can output a potential lower than the potential of the second current electrode of the first insulated gate element, the first and second insulated gate elements can be sufficiently provided. And it can be shut off at high speed. Further, since the first diode is provided between the first and second control electrodes and the MOS field-effect transistor element, the first diode is provided from the second current electrode of the first gate insulating element.
Reverse currents flowing toward the first and second control electrodes via the OS-type field effect transistor element are prevented, and the low potential is correctly transmitted to the first and second control electrodes (claims 6 and 7). .

In the semiconductor device according to the present invention, the first diode connected in series with the MOS field effect transistor element is a light emitting diode. Therefore, the light emitting diode emits light when the MOS field effect transistor element is turned on. That is, in the semiconductor device, both the prevention of the reverse current and the notification of the abnormal operation can be realized with a simple configuration.

In the semiconductor device according to the present invention, since the second resistor is provided between the third control electrode of the MOS field effect transistor element and the voltage output terminal of the current detecting means, oscillation of the device is prevented. (Claims 8 to 1)
0).

In the insulated gate semiconductor device according to the present invention, the second diode is connected in parallel with the second resistor. For this reason, the voltage signal sent from the current detecting means to turn on the MOS field effect transistor element is:
To the third control electrode of the MOS field effect transistor element,
It is transmitted with a short delay time. That is, in this semiconductor device, the response of the MOS type field effect transistor element to the excessive main current is fast, so that the excessive main current is suppressed in a short time (claims 9 and 10).

In the semiconductor device according to the present invention, the MOS type field effect transistor element and the circuit portion connected thereto are integrated on one semiconductor chip. Therefore, assembly of the semiconductor device is simple. Also, the MOS field effect transistor element and the Zener diode can be configured with good reproducibility so that the temperature characteristics are complementary. In addition, since the temperature of both of them becomes more uniform, the independence of the ON voltage on the temperature is further improved. Further, the first resistor can be excluded from the integration target. In this case, using the same integrated circuit, the first
It is possible to cope with various designs of the semiconductor device only by appropriately selecting the resistor (claim 10).

In the semiconductor device according to the present invention, a load is connected to the first insulated gate element, and the main current is adjusted by the first insulated gate element. Part of this main current is diverted to the second insulated gate element. The shunted current flows through a series circuit of the first junction field effect transistor element and the first resistor. The first and second junction field effect transistor elements and the first and second resistors constitute a negative feedback type current mirror circuit. Therefore, a current proportional to the shunt current flows through the second junction field effect transistor element. The proportionality constant is determined by the ratio of the resistance values of the first and second resistors, and the fluctuation due to the temperature change is small. Seventh junction type field effect transistor element
The current electrode is coupled to the control electrodes of the first and second insulated gate devices, so that the first and second insulated gate devices have a degree corresponding to the current shunted to the second insulated gate device. Of the control electrode is lowered. That is, in the semiconductor device of the present invention, the function of suppressing the overcurrent is realized with high accuracy corresponding to the accuracy of the resistance values of the two resistors, and the function does not depend much on the temperature (claim 11).

[Brief description of the drawings]

FIG. 1 is a circuit diagram of a device according to a first embodiment.

FIG. 2 is a graph showing actual measurement results of the device according to the first embodiment.

FIG. 3 is a graph showing actual measurement results of a circuit to be compared with the device according to the first embodiment;

FIG. 4 is a circuit diagram showing a configuration of a device according to a second embodiment.

FIG. 5 is a circuit diagram showing a configuration of a device according to a third embodiment.

FIG. 6 is a circuit diagram showing a configuration of a device according to a fourth embodiment.

FIG. 7 is a circuit diagram showing a configuration of a device according to a sixth embodiment.

FIG. 8 is a circuit diagram showing a configuration of a device according to an eighth embodiment.

FIG. 9 is a circuit diagram showing a configuration of an apparatus according to a ninth embodiment.

FIG. 10 is a circuit diagram showing a configuration of an apparatus according to a tenth embodiment.

FIG. 11 is a circuit diagram showing a configuration of an apparatus according to an eleventh embodiment.

FIG. 12 is a circuit diagram showing a configuration of an apparatus according to a twelfth embodiment.

FIG. 13 is a circuit diagram showing a configuration of a device according to a thirteenth embodiment.

FIG. 14 is a circuit diagram showing a configuration of an apparatus according to a fourteenth embodiment.

FIG. 15 is a block diagram showing a configuration of a conventional device.

[Explanation of symbols]

1 IGBT (first insulated gate element), 2 IGBT
(Second insulated gate element), 3 resistor, 5 transistor (transistor element), 6 Schottky barrier diode (first diode), 7 thyristor (thyristor element), 9 gate drive circuit (gate drive means), 1
3 Zener diode, 12 diode (second diode), 14 light emitting diode (notifying means), 10
1 IGBT (first insulated gate element), 102 IG
BT (second insulated gate element), 104 resistance (current detection means, first resistance), 105 MOSFET (MOS field effect transistor element), 105a, 105b M
OSFET (unit MOS field effect transistor element), 106 Zener diode, 108 diode (first diode), 112 resistor (second resistor),
113 diode (second diode), 114 J
FET (first junction field effect transistor element), 1
15 JFET (second junction field effect transistor element), 116 resistor (first resistor), 117 resistor (second resistor), 210 gate drive circuit (gate drive means), 3
03 Light emitting diode.

──────────────────────────────────────────────────続 き Continuation of the front page (72) Inventor Takashi Marumo 1-1-1 Imajukuhigashi, Nishi-ku, Fukuoka City Inside Fukurishi Semicon Engineering Co., Ltd. (56) References JP-A 1-295520 (JP, A) JP JP-A-2-266712 (JP, A) JP-A-4-167813 (JP, A) JP-A-1-227520 (JP, A) JP-A-5-218836 (JP, A) JP-A-5-191240 (JP , A) JP-A-5-267580 (JP, A) (58) Fields investigated (Int. Cl. ⁷ , DB name) H03K 17/00-17/693

Claims (11)

(57) [Claims] 1. An insulated gate semiconductor device, comprising:
(A) a first insulated gate element having a first current electrode, a second current electrode, and a first control electrode insulated from the first and second current electrodes, wherein the first control electrode is A first insulated gate element, in which the larger the first voltage applied between the second current electrodes is, the more the state between the first and second current electrodes becomes conductive in response to the first voltage; (B) a third current electrode, a fourth current electrode, and the third current electrode;
And a second control electrode insulated from the fourth current electrode, wherein the second voltage applied between the second control electrode and the fourth current electrode is larger. A second insulated gate element in which the third and fourth current electrodes become more conductive in response to the second voltage, wherein the third current electrode is connected to the first current electrode. A second insulated gate element in which the second control electrode is connected to the first control electrode, the fourth current electrode is coupled to the second current electrode, and (c) a voltage output terminal. A current detecting means interposed between a second current electrode and the fourth current electrode, wherein the current detection means passes between the third current electrode and the fourth current electrode through the second insulated gate element. A current detecting means for detecting a flowing current, wherein a voltage corresponding to the current is detected. A current detection means for outputting from the voltage output terminal; and (d) a gate drive means having an output terminal, the output terminal being coupled to the first and second control electrodes; (E) a MOS field-effect transistor element having a fifth current electrode, a sixth current electrode, and a third control electrode, wherein the fifth current electrode is the fifth current electrode. The third control electrode is coupled to the voltage output terminal, and the sixth current electrode is coupled to the second control electrode.
A MOS field effect transistor element coupled to a current electrode; and (f) a Zener diode interposed between the sixth current electrode and the second current electrode,
A current flowing in a forward direction between the fifth current electrode and the sixth current electrode through the field-effect transistor element,
An insulated gate semiconductor device comprising: a Zener diode interposed in a direction to provide a reverse current. 2. The insulated gate semiconductor device according to claim 1, wherein a Zener voltage in the Zener diode is determined based on a channel temperature characteristic of a gate-source threshold voltage in the MOS field effect transistor element. An insulated gate semiconductor device having complementary temperature characteristics. 3. The insulated gate semiconductor device according to claim 1, wherein said current detecting means comprises: (c-1) said second current detecting means.
A first resistor interposed between a current electrode and the fourth current electrode, wherein an end of the first resistor coupled to the fourth current electrode has a first resistor functioning as the voltage output terminal; An insulated gate semiconductor device comprising: 4. The insulated gate semiconductor device according to claim 1, wherein said MOS type field effect transistor element is (e-1).
A plurality of unit MOS field-effect transistor elements each having a seventh current electrode, an eighth current electrode, and a fourth control electrode; Each other and fourth
The control electrodes are connected to each other, and the seventh current electrode, the eighth current electrode, and the fourth control electrode are respectively connected to the fifth current electrode, the sixth current electrode, and the third current electrode.
An insulated gate semiconductor device that functions as a control electrode. 5. The insulated gate semiconductor device according to claim 1, wherein (g) a light emitting diode coupled to said MOS field effect transistor element,
A current flowing in a forward direction between the fifth current electrode and the sixth current electrode through the field-effect transistor element,
An insulated gate semiconductor device further comprising: a light emitting diode interposed in a direction of a forward current. 6. The insulated gate semiconductor device according to claim 1, wherein said gate driving means is configured to:
A gate drive unit capable of outputting a voltage corresponding to a potential lower than the potential of the second current electrode as a voltage,
(G) a first diode interposed between the first and second control electrodes and the fifth current electrode, wherein the first diode is
A first diode interposed in a direction in which a current flowing in a forward direction between the fifth current electrode and the sixth current electrode through the S-type field effect transistor element becomes a forward current; Insulated gate type semiconductor device provided. 7. The insulated gate semiconductor device according to claim 6, wherein said first diode is a light emitting diode. 8. The insulated gate type semiconductor device according to claim 3, further comprising: (h) a second resistor interposed between said third control electrode and said voltage output terminal. Semiconductor device. 9. The insulated gate semiconductor device according to claim 8, wherein (i) a second diode connected in parallel to said second resistor, said third control electrode and said voltage output. A second diode interposed between the second diode and a voltage output from the voltage output terminal so that the MOS field-effect transistor element shifts from a cut-off state to a conductive state. Insulated gate semiconductor device further comprising a second diode interposed in a direction that can be transmitted to the third control electrode in a state where is short-circuited. 10. The insulated gate semiconductor device according to claim 9, wherein at least the MOS field effect transistor element, the zener diode, the second resistor, and the second
An insulated gate semiconductor device in which the diode described above is integrated on one semiconductor chip. 11. An insulated gate semiconductor device, comprising:
(A) a first insulated gate element having a first current electrode, a second current electrode, and a first control electrode insulated from the first and second current electrodes, wherein the first control electrode is A first insulated gate element, in which the larger the first voltage applied between the second current electrodes is, the more the state between the first and second current electrodes becomes conductive in response to the first voltage; (B) a third current electrode, a fourth current electrode, and the third current electrode;
And a second control electrode insulated from the fourth current electrode, wherein the second voltage applied between the second control electrode and the fourth current electrode is larger. A second insulated gate element in which the third and fourth current electrodes become more conductive in response to the second voltage, wherein the third current electrode is connected to the first current electrode. A second insulated gate element in which the second control electrode is connected to the first control electrode and the fourth current electrode is coupled to the second current electrode; and (c) the second current electrode and A first junction field effect transistor element interposed between the fourth current electrode and a fifth current electrode;
A first junction field-effect transistor element having a current electrode and a third control electrode, wherein the fifth current electrode is connected to a fourth current electrode, and the sixth current electrode is connected to the second current electrode.
A first junction field effect transistor element coupled to a current electrode, the third control electrode coupled to the fourth current electrode; and (d) between the sixth current electrode and the second current electrode. An interposed first resistor, and (e) an output terminal, the output terminal being coupled to the first and second control electrodes;
(F) a second junction field-effect transistor element having (f) a seventh current electrode, an eighth current electrode, and a fourth control electrode, the gate driving means outputting the adjusted third voltage to the output terminal; A seventh current electrode coupled to the first and second control electrodes, a fourth control electrode coupled to the third control electrode, and an eighth current electrode coupled to the second current electrode. 2. An insulated gate semiconductor device comprising: a junction field-effect transistor element of No. 2; and (g) a second resistor interposed between the eighth current electrode and the second current electrode.