JP3031591B2 - Access arbitration method - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention is applied to an information processing apparatus, a communication exchange, in particular, an ATM exchange, and other systems having a plurality of resources commonly connected by a bus.
Here, the resource refers to a memory device, an output device, a display device, an input device, a printing device, a functional unit, and other facilities including hardware for operating the system.

[0002] The present invention relates to arbitration of a plurality of access requests generated within a system with respect to a plurality of shared resources arranged in one system.

[0003]

2. Description of the Related Art The arbitration of access requests according to the prior art will be described with reference to a model shown in FIG. 5, which is based on a ring arbiter control method. In this model, there are eight access request sources R (1) to R (8) and eight resources S (1) to S (8) for receiving the access requests.
These are connected to the input terminal group and the output terminal group of the matrix switch means, respectively. The matrix switch means may be provided with hardware having a matrix configuration as shown in the figure, or may be a virtual one constituted by a logic circuit having a matrix function as shown and capable of transmitting an access request. The number of access request sources and the number of resources need not necessarily be equal.

The access request sources R (1) to R (8) generate access requests one after another. Since an access request is generated according to the circumstances of the source, a plurality of access requests may simultaneously compete for one resource. The contention is arbitrated by the matrix switch means, and one access request source is transmitted to one request destination resource. At this time, ring arbiter RA
(1) to RA (8) sweep the access request as indicated by the arrows in FIG. 5, and when they hit the corresponding access request, the access request is rejected via the intersection C (n, m). Only one is transmitted to the resource side, and the resource accepts the access request.

When one access request is accepted,
Information indicating that the request has been accepted is sent to the request source that sent the access request. By receiving one access request, another access request sent to the ring arbiter is waited, and the other access request is detected at the next timing or at the next timing. After the access request is accepted, processing such as transfer of necessary data via the matrix switch means or another bus signal line is executed.

FIG. 6 is a conceptual diagram illustrating the operation of the ring arbiter. The number of the resource of the request destination is displayed as an access request one by one from each of the request sources R (1) to R (8). The arbitration control is executed for each resource. Now, the arbitration control is executed for the m-th resource S (m) in FIG. An access request from each request source is searched to see if any of them has issued an access request to the resource S (m). In this example, the second request source R (2) issues an access request to the m-th resource. In the arbitration control, when this is found, this request source is connected to the resource S (m). When one is connected, the other request sources are disconnected.

If there is only one request source that has issued an access request to the m-th resource S (m), the request is immediately accepted. If there is more than one request source, arbitration is performed for contention between them. And select one to accept the request. The arbitration logic can be set variously. Here, the request sources R (1) and R (2)
,..., R (n). This logic performs equally for each request source,
Any other logic can be set to prioritize the request sources.

[0008]

In such arbitration control of access requests, each of the ring arbiters RA (1) to RA (8) for performing arbitration in the case of contention requires each request in one time slot. Only one access request issued from the source can be accepted. Even if a plurality of access requests have already been generated for each request source and they are waiting in a queue as shown in the left end of FIG. 6, only the access request indicated by the diagonal line at the head is subject to contention arbitration. Therefore, the access requests in the second and subsequent queues must wait at least for the next time slot.

In one request source, if the first access request in the queue is the second resource S (2) and the second access request in the queue is the resource S (3), Time slot resource S (2)
Is in a race condition with another request source and cannot be accepted, and if there is no access request from another request source to resource S (3), the access request to resource S (3) is accepted. It should have been good. In other words, the intersection of the request source of the matrix switch means and the resource S (3) is not used in this time slot. This means that although the matrix switch means still has room, it is not used for arbitration control, and the throughput of access requests is substantially suppressed.

An object of the present invention is to provide an access arbitration system which improves the throughput of access requests.

[0011]

According to the present invention, there are provided N (N is an integer of 2 or more) request sources for generating access requests;
M (M is an integer equal to or greater than 2) resources shared by the access request sources, and N × N × request sources where the N request sources are connected to the input terminal and the M resources are connected to the output terminal The present invention is embodied in a device including a matrix switch having a capacity of M and a control circuit for controlling the connection / disconnection of the intersection of the matrix switch. The control circuit is configured to control access requests generated from the N request sources,
The arbitration control is performed once for each time slot, and the connection of a large number (strictly, one or more) of the matrix switch means is simultaneously controlled for each time slot in accordance with the result of the arbitration control.

The access request source is a resource in a broad sense, and may be one of the M resources depending on the device configuration. The matrix switch means may be a matrix switch in which switches configured by hardware are arranged at intersections of a matrix,
Further, a virtual matrix switch in which a circuit for substantially connecting or disconnecting an access request at the intersection is realized by a program control circuit may be used.

Here, the feature of the present invention resides in that a register for holding, as a queue, a resource number of a request destination of an access request generated corresponding to each request source is provided. Then, the control circuit provides N × M logic fields corresponding to each intersection of the matrix switch means, and executes arbitration control using these logic fields. That is, the control circuit includes:
Means for setting an indication of the presence of an access request held up to the set depth of the register for each time slot in the logical field corresponding to the requested resource number of the access request; First arbitration means for executing arbitration control for each of the resources with respect to the display of the presence of the requested access, and for each of the request generation sources with respect to the indication of the presence of the access request of the logical field after execution of the arbitration control by the first arbitration means. And second arbitration means for executing arbitration control.

The set depth may be the entire depth of the register or a part of the register, and the depth may be set to an individual value instead of the same for each request source. Can also.

Further, in the above access arbitration method,
In the control circuit, after the first arbitration means and the second arbitration means are executed, the access request is not accepted after the execution of the first arbitration means, the indication of the presence of the access request remains set in the logical field, the first The arbitration means and the second arbitration means can be repeatedly executed.

This repetition is not limited to two times, but can be executed any number of times as long as there is a display indicating that an access request is left set in the logical field.

[0017]

In the method of the present invention, the control circuit for controlling the matrix switch means executes arbitration control for each time slot when access requests from a plurality of request sources compete with each other over time. Based on the result of the arbitration control, the intersection of the matrix switch means is connected only once in one time slot and an access request is accepted. That is, in one time slot period, the arbitration control is executed first, and then the connection state is made only once for one intersection. Therefore, one request source can make an access request only once in one time slot. One resource can accept an access request only once in one time slot.

According to the method of the present invention, resource numbers of request destinations of access requests generated from the request sources are held in queues in registers provided corresponding to the request sources. Then, different resource numbers are sequentially selected one by one from the head of the queue, and an indication of the presence of an access request is set in the logical field of the corresponding resource number.

In the arbitration control, regarding the display of the presence of the access request set in the logical field, first, as the first arbitration performed by the first arbitration means, the arbitration control is executed corresponding to the resource and one access request is selected. . Next, as the second arbitration performed by the second arbitration means, arbitration control is executed corresponding to the request source.

In this case as well, one request source still accepts one access request in one time slot, but by doing so, it is set in the logical field. Even when one of the plurality of access requests is not accepted due to contention with another request source, another access request may be accepted, so that the throughput is improved.

In the first arbitration means, n resources S (1) to S (S) connected to one matrix switch means
(n) can be executed sequentially or in parallel in time.

After executing the above arbitration control once, if the display indicating that the access request is present still remains in the logical field without receiving the access request,
When the above-described arbitration control is performed again, it may be accepted. This repetition may be performed any number of times as long as the arbitration control within the time slot can be performed. Thereby, the throughput can be further improved.

[0023]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS The configuration of a first embodiment of the present invention will be described with reference to FIG. FIG. 1 is a configuration diagram of the first embodiment of the present invention.

According to the present invention, the four request sources R (1) to R (4) for generating access requests and the four request sources R (1) to R (4) shared by the access request sources are provided. Resources S (1) ~
S (4) and four request generation source R (1) ~R (4) is connected to the input terminal 1 ₁ to 1 _4, four resource S (1) ~S (4)
A matrix switch 3 but having a capacity of 4 × 4, which is connected to the output terminal ₂₁ to _24, four request generation source R (1) ~
A control for performing arbitration control once for each time slot for an access request generated from R (4), and controlling connection / disconnection of one or more intersections of the matrix switch 3 for each time slot in accordance with the result of the arbitration control. An access arbitration system including the circuit 4 is provided.

Here, the feature of the present invention is that the registers 7 ₁ to 7 which hold, as queues, resource numbers of request destinations of access requests generated for each of the request sources R (1) to R (4). comprising a 7 _4, the control circuit 4, corresponding to each intersection of the matrix switch 3 provided 4 × 4 pieces of logical fields F (1,1) ~F (4,4) , register 7 for each of the time slot _{1-7 4} each set are held in depth were to have displayed in the access request Yes REQ (1,1) ~RE
Means for setting Q (4,3) in the logical fields F (1,1) to F (4,4) corresponding to the requested resource number of the access request, and means for setting the logical fields F (1,1) to F (4,4) Indication REQ (1,1) to REQ (4,3) indicating access request set in (4,4)
First arbitration means for executing arbitration control for each of the resources S (1) to S (4), and logical fields F (1,1) to F (4,4) after execution of arbitration control by the first arbitration means. The arbitration unit 5 includes second arbitration means for executing arbitration control for each of the request sources R (1) to R (4) for the indications REQ (1,1) to REQ (4,3) indicating the presence of the access request. It is located with.

Next, the operation of the first embodiment of the present invention will be described. From request sources R (1) to R (4), resources S (1) to
For S (4), access requests are generated in chronological order.
In the first embodiment of the present invention, an access request to be arbitrated at one access opportunity is displayed at a plurality of request sources R (1) to R (4) indicating that there are a plurality of access requests REQ (1,1) to R
It holds among the EQ (4,3) up to three in the register 7 _{1-7 4.} Display RE of available access request is to register 7 ₁
Q (1,1), REQ (1,2), REQ (1,3), register 7 ₂
Indicate that there is an access request REQ (2,1), REQ (2,1)
2), REQ (2,3), the display REQ of there access request to register _{7 3 (3,1), REQ (} 3,2), REQ (3,3), of there access request to register 7 ₄ Display REQ (4,1),
REQ (4,2) and REQ (4,3) are held in a limited number of three, each of which is twelve.

Display REQ indicating that these access requests are present
(1,1) to REQ (4,3) are the logical fields F (1,1), F (1,2), F (1,3) generated from the request source R (1).
, F (1,4) generated from the request source R (2) are logical fields F (2,1), F (2,2), F (2,3), F (2,
To the logical fields F (3,1), F (3,2), F (3,3) and F (3,4). The result from R (4) is the logical field F
The same contents are simultaneously transferred to (4,1), F (4,2), F (4,3), F (4,4).

The contention arbitration for the resource S (1) is performed by a column contention control group composed of logical fields F (1,1), F (2,1), F (3,1) and F (4,1). AB1 (1), contention arbitration for resource S (2) is performed in logical fields F (1,2), F (2,
2), F (3,2) and F (4,2) are performed in the column contention control group AB1 (2), and contention arbitration for the resource S (3) is performed in the logical field F (1,3). , F (2,3), F (3,3), F
The contention arbitration for the resource S (4) is performed in the column contention control group AB1 (3) composed of (4,3).
This is performed independently in the column contention control group AB1 (4) composed of (1,4), F (2,4), F (3,4), and F (4,4). The respective column conflict control groups AB1 (1) to AB1
The contention control performed in (4) can be realized by using the method using the ring orbiter described in the conventional example.

The column contention control groups AB1 (1) to AB
Due to the contention arbitration by 1 (4), the column contention control group AB
In 1 (1), one of the candidates for the request source R (2) was selected from a plurality of access requests to the resource S (1) (indicated by a double circle in the logical field F (2,1)). In the column contention control group AB1 (2), one of the candidates for the request source R (1) is selected from among a plurality of access requests to the resource S (2) (○ in the logical field F (1,2)). mark). In the column contention control group AB1 (3), one of the candidates of the request source R (4) was selected from among a plurality of access requests to the resource S (3) (◎ of the logical field F (4,3)). mark). In the column contention control group AB1 (4), one of the candidates of the request source R (1) among the plurality of access requests to the resource S (4) was selected (in the logical field F (1,4)).
mark). These candidates are called candidate A.

These candidates A are the column contention control groups A
The contention arbitration in B1 (1) to AB1 (4) is independently selected, so that one request source R (1) to
In R (4), a situation occurs in which a plurality of candidates A are simultaneously present. One request source R (1) to R (4) for one access opportunity
In step (1), one candidate (hereinafter referred to as candidate B) is selected from the plurality of candidates A in order to permit access to one candidate.

The contention arbitration to the request source R (1) is performed by a row contention composed of logical fields F (1,1), F (1,2), F (1,3), and F (1,4). The contention arbitration for the request source R (2) is performed in the control group AB2 (1), and the logical fields F (2,1), F
The contention arbitration to the request source R (3) is performed by the row contention control group AB2 (2) composed of (2,2), F (2,3) and F (2,4). (3,1), F (3,2), F (3,3),
The contention arbitration to the request source R (4) is performed by the row contention control group AB2 (3) composed of F (3,4), and the logical fields F (4,1), F (4,2), This is performed independently in the row contention control group AB4 (4) composed of F (4,3) and F (4,4). Each row conflict control group AB2 (1) to A
The contention control performed in B2 (4) can be realized by using the method using the ring orbiter described in the conventional example.

As a result, the request sources R (2) and R (4)
Since the candidate A is initially one, the candidate A becomes the candidate B as it is, and the access permission to the resources S (1) and S (3) is obtained. In the request source R (1), the candidate A of the logical field F (1,2) or the logical field F (1,4) in the row contention control group AB2 (1).
Is selected as the candidate B. Here, the candidate A of the logical field F (1,4) is selected as the candidate B.

The above operation is shown in the flowchart of FIG. FIG. 2 is a flowchart showing the operation of the first embodiment of the present invention. Transferring the display of the logical field F (1,1) ~F (4,4) into register 7 _1-7 a ₄ access request held in the access request issued (S1). Thereby, contention arbitration by the column contention control groups AB1 (1) to AB1 (4) is performed (S2). Subsequently, the row conflict control group AB2 (1) to
Contention arbitration is performed by AB2 (4) (S3). By these procedures, the resources S (1) to R (1) to R (4)
Access contention arbitration for S (4) is performed.

Thus, the indication REQ (1,1) indicating that there are twelve access requests held in the registers 7 _{1 to} 7 ₄
One cycle of contention arbitration of access by REQ (4,3) is completed.

Next, the operation of the second embodiment of the present invention will be described with reference to FIG. FIG. 3 is a configuration diagram of the second embodiment of the present invention. The second embodiment of the present invention aims to further improve the throughput over the first embodiment of the present invention by repeating the column conflict control and the row conflict control already described in the first embodiment of the present invention.

First, the column contention control groups AB1 (1) to A1
B1 (4) and the row conflict control group AB2 (1) to AB2
The contention arbitration according to (4) is performed once, but this is as described in the first embodiment of the present invention. In the logical fields F (1,4) and F (4,3) shown in FIG. 3, an asterisk marked "1" indicates an access determined in the first contention arbitration.

In the second embodiment of the present invention, the request sources R (1) and R (4) related to the first access determined
And resources S (3) and S (4) are excluded and the second competition arbitration is performed. Therefore, in the second contention arbitration, the request sources R (2) and R (3) and the resources S (1) and S (2) are subjected to contention arbitration.

First, the second contention arbitration is performed on the column contention control groups AB1 (1) and AB1 (2) including the resources S (1) and S (2). As a result, the access requests transferred to the logical fields F (2,1) and F (2,2) are selected.

Next, the row contention control groups AB2 (2) and AB2 (3) including the request sources R (2) and R (3)
Will undergo a second competitive arbitration. As a result, the access request transferred to the logical field F (2,2) is selected (◎ marked with “2”), and access from the request source R (3) to the resource S (2) is determined. did.

Here, looking at whether or not there are request sources R (1) to R (4) and resources S (1) to S (4) for which access has not yet been determined, the request source R (3 ) And resource S
(1) is undecided. Indication of the access request transferred to the logical field F (3,1) REQ (3,1), REQ (3,2) R
Since the access request to the resource S (1) of the request source R (3) was included in the EQ (3,3), this access was determined (◎ marked with “3”).

The above operation is shown in a flowchart in FIG. FIG. 4 is a flowchart showing the operation of the second embodiment of the present invention. Transferring logical field F (1, 1) to F is an access request held in (4,4) in the register 7 _{1-7 4} access request there display REQ (1,1) ~REQ (4,3) Do
(S1). As a result, the column contention control groups AB1 (1) to AB
Competition arbitration by 1 (4) is performed (S2). Subsequently, contention arbitration is performed by the row contention control groups AB2 (1) to AB2 (4) (S3). According to these procedures, the request source R (1)
The first access contention arbitration for the resources S (1) to S (4) of .about.R (4) is performed.

At this time, the control circuit 4 detects whether or not the request sources R (1) to R (4) and the resources S (1) to S (4) for which access has not yet been determined exist (S4). , Request sources R (1) to R (4) and access resources S (1) to S
If (4) does not exist, a new contention arbitration is performed, but if the access sources R (1) to R (4) and the resources S (1) to S (4) for which access has not been determined exist, the Request sources R (1) to R (4) and resources S (1) to S for which access is determined
(4) is excluded, and the column conflict control and the row conflict control are repeated again (S5).

Thus, the display REQ (1,1) indicating that there are twelve access requests held in the registers 7 _{1 to} 7 ₄
One cycle of contention arbitration of access by REQ (4,3) is completed.

In the first and second embodiments of the present invention, four request sources R (1) to R (4) and four resources S (1) to S (4) are used. Can be configured as optional.

The resource S which can be accessed at one time
Although the number of (1) to S (4) is one, it can be configured as plural.

[0046]

As described above, according to the present invention, since a plurality of access requests are simultaneously transferred to the logical field and contention arbitration is performed, efficient contention arbitration can be realized.
Therefore, the throughput of the access request can be improved.

[Brief description of the drawings]

FIG. 1 is a configuration diagram of a first embodiment of the present invention.

FIG. 2 is a flowchart showing the operation of the first embodiment of the present invention.

FIG. 3 is a configuration diagram of a second embodiment of the present invention.

FIG. 4 is a flowchart showing the operation of the second embodiment of the present invention.

FIG. 5 is a configuration diagram of a conventional example.

FIG. 6 is a diagram showing contention arbitration by a ring orbiter.

[Explanation of symbols]

1 ₁ to 1 ₄ input terminals 2 ₁ to 2 ₈ output terminals 3 matrix switch 4 control circuit 5 arbitration unit 6 matrix switch disconnection unit 7 _{1 to} 7 ₄ register

──────────────────────────────────────────────────続 き Continued on the front page (58) Field surveyed (Int.Cl. ⁷ , DB name) H04Q 3/52 G06F 13/362 H04L 12/28 H04L 12/56

Claims (2)

(57) [Claims] 1. N (N is an integer of 2 or more) request sources generating access requests, M (M is an integer of 2 or more) resources shared by the access request sources, and N Matrix switch means having a capacity of N × M, wherein N request sources are connected to an input terminal, and the M resources are connected to an output terminal; and for access requests generated from the N request sources, An access arbitration system comprising: a arbitration control that performs one arbitration control for each time slot; and a control circuit that controls disconnection of one or more intersections of the matrix switch means for each time slot in accordance with the result of the arbitration control. A register for holding, as a queue, a resource number of a request destination of an access request generated for each of the request sources, the control circuit comprising: N × M logical fields are provided corresponding to each intersection of the stages, and an indication of the presence of an access request held up to the depth set in the register for each of the time slots is displayed as a request destination resource of the access request. Means for setting the logical field corresponding to the number, first arbitration means for executing arbitration control for each resource with respect to the indication of the presence of the access request set in the logical field, and arbitration control by the first arbitration means. Second arbitration means for executing arbitration control for each of the request sources with respect to the indication of the presence of an access request in the logical field after execution. 2. The access arbitration system according to claim 1, wherein the control circuit sets the logical field without receiving an access request after the first arbitration unit and the second arbitration unit are executed. An access arbitration system comprising means for repeatedly executing the first arbitration unit and the second arbitration unit for a display indicating that an access request is left as it is.