JP3028173B2 - Lead frame and manufacturing method thereof - Google Patents
Lead frame and manufacturing method thereofInfo
- Publication number
- JP3028173B2 JP3028173B2 JP30755893A JP30755893A JP3028173B2 JP 3028173 B2 JP3028173 B2 JP 3028173B2 JP 30755893 A JP30755893 A JP 30755893A JP 30755893 A JP30755893 A JP 30755893A JP 3028173 B2 JP3028173 B2 JP 3028173B2
- Authority
- JP
- Japan
- Prior art keywords
- lead
- tip
- inner lead
- inner leads
- lead frame
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/93—Batch processes
- H01L24/95—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
- H01L24/97—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
- H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
- H01L2224/45001—Core members of the connector
- H01L2224/45099—Material
- H01L2224/451—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
- H01L2224/45117—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 400°C and less than 950°C
- H01L2224/45124—Aluminium (Al) as principal constituent
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
- H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
- H01L2224/45001—Core members of the connector
- H01L2224/45099—Material
- H01L2224/451—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
- H01L2224/45138—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
- H01L2224/45144—Gold (Au) as principal constituent
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
- H01L2224/4826—Connecting between the body and an opposite side of the item with respect to the body
Abstract
Description
【０００１】[0001]
【産業状の利用分野】本願発明は、半導体装置の組立に
用いられるリードフレームの製造方法に関し、さらに詳
しくは、良好なワイヤボンディング性を備えたリードフ
レームの製造方法に関するものである。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a lead frame used for assembling a semiconductor device, and more particularly, to a method for manufacturing a lead frame having good wire bonding properties.
【０００２】[0002]
【従来の技術】例えば通常のＩＣは、リードフレーム１
のダイパッド４に、半導体素子を固着し、この半導体素
子のボンディングパッドとリードフレーム１のインナー
リード３とを金線あるいはアルミニウム線のボンディン
グワイヤ８によって結線し、更にこれらを樹脂で封止す
ることにより製造されている。2. Description of the Related Art For example, a typical IC is a lead frame 1
A semiconductor element is fixed to the die pad 4, and the bonding pad of the semiconductor element and the inner lead 3 of the lead frame 1 are connected by a bonding wire 8 of a gold wire or an aluminum wire, and these are sealed with a resin. Being manufactured.
【０００３】ここで用いられるリードフレーム１は、図
３に示すように、半導体素子を搭載するためのダイパッ
ド４と、先端が該ダイパッド４をとり囲むように延在せ
しめられたインナーリード３と、該インナーリード３と
ほぼ直交する方向に延びこれらインナーリード３を一体
的に支持するタイバー３と、該タイバー３の外側に前記
各インナーリード３に接続するように配設せしめられた
アウターリード２とダイパッド４を支持するサポートバ
ー６とから構成されている。As shown in FIG. 3, the lead frame 1 used here has a die pad 4 for mounting a semiconductor element, an inner lead 3 whose tip extends so as to surround the die pad 4, and A tie bar 3 extending in a direction substantially orthogonal to the inner leads 3 and integrally supporting the inner leads 3; and an outer lead 2 disposed outside the tie bar 3 so as to be connected to each of the inner leads 3. And a support bar 6 for supporting the die pad 4.
【０００４】ところで、半導体装置の高密度化および高
集積化に伴い、リードピン数は増加するものの、パッケ
ージは従来通りかもしくは小型化の傾向にあり、同一面
積内においてインナーリード３の本数が増加すれば、当
然ながらインナーリード３の幅および隣接するインナー
リード３との間隔は狭くなり、このため、搬送中の外力
や熱履歴によって、インナーリード３の変形およびその
変形によるインナーリード間の短絡を生じることがあ
る。Although the number of lead pins increases with the increase in the density and integration of a semiconductor device, the number of inner leads 3 increases as the number of inner leads 3 increases within the same area, although the number of lead pins increases. Naturally, the width of the inner lead 3 and the distance between the adjacent inner lead 3 become narrower, so that the inner lead 3 is deformed and a short circuit between the inner leads due to the deformation is caused by an external force or thermal history during transportation. Sometimes.
【０００５】このような問題を解決するため、インナー
リード側縁部のみの打ち抜きを行い、インナーリード先
端の加工を加工を残すことによって、隣接するインナー
リード３が相互に連結されるように形状加工を行い、こ
の状態でインナーリード先端に貴金属メッキを行った
り、ボンディングエリアを避けるようにポリイミド樹脂
からなる絶縁性テープで連結固定したり、焼鈍を行った
りする方法が提案されている。[0005] In order to solve such a problem, punching is performed only on the side edge of the inner lead, and processing of the tip of the inner lead is left, so that the shape processing is performed so that the adjacent inner leads 3 are connected to each other. In this state, a method has been proposed in which the noble metal plating is performed on the tip of the inner lead, the connection and fixing is performed with an insulating tape made of a polyimide resin so as to avoid a bonding area, or annealing is performed.
【０００６】インナーリード先端が相互に連結された状
態まで形状加工を行い、その後焼鈍工程、メッキ工程、
テーピング工程の順に加工を行い、最後にインナーリー
ド連結状態の開放を行う方法が最良とされていた。The shape processing is performed until the tips of the inner leads are connected to each other, and then the annealing step, the plating step,
It has been considered that the best method is to perform processing in the order of the taping step and finally release the inner lead connection state.
【０００７】[0007]
【発明が解決しようとする課題】しかしながら、インナ
ーリード先端の連結状態を開放する手段としては、プレ
ス加工が簡便な方法として採用されており、プレス加工
によればインナーリード先端に抜きバリが発生する。However, as a means for releasing the connection state of the tip of the inner lead, press working is adopted as a simple method. According to the press working, burrs are generated at the tip of the inner lead. .
【０００８】所定の加工を終えたリードフレーム１は、
半導体装置の組立工程へと送られ、インナーリード先端
と半導体チップをボンディングワイヤ８によって電気的
に接続されるが、ここで図４に示すように、インナーリ
ード先端の抜きバリによってインナーリード先端付近が
ヒートブロック９上面から持ち上げられ、インナーリー
ド４のボンディング領域が充分に加熱されずにボンディ
ング不良となることがあった。[0008] The lead frame 1 which has been subjected to the predetermined processing is
It is sent to the semiconductor device assembling process, and the tip of the inner lead and the semiconductor chip are electrically connected by the bonding wire 8. Here, as shown in FIG. In some cases, the bonding area of the inner lead 4 was not sufficiently heated, resulting in bonding failure due to being lifted from the upper surface of the heat block 9.
【０００９】[0009]
【課題を解決するための手段】本願発明は上記実状に鑑
みてなされたもので、スタンピング法によって形状加工
するリードフレーム１の製造方法において、隣接する前
記インナーリード３の先端が相互に連結されるように形
状加工を行う工程と、前記インナーリード先端にコイニ
ング加工を施す工程と、前記インナーリード３の連結状
態を解放する工程と、前記インナーリード先端を押し潰
す工程とからなるリードフレーム１の製造方法および、
これにより製造されるリードフレームを提供するもので
ある。SUMMARY OF THE INVENTION The present invention has been made in view of the above situation. In a method of manufacturing a lead frame 1 which is shaped by a stamping method, the tips of adjacent inner leads 3 are connected to each other. Manufacturing the lead frame 1 comprising the steps of performing the shape processing as described above, performing the coining processing on the tip of the inner lead, releasing the connection state of the inner lead 3, and crushing the tip of the inner lead. Method and
Accordingly, a lead frame manufactured by the method is provided.
【００１０】[0010]
【作用】本願発明によれば、インナーリード先端の連結
状態を開放する際に発生する抜きバリを押しつぶすこと
によって、ワイヤボンディング時にインナーリード先端
とヒートブロック９との間に生じる隙間をなくし、よっ
てインナーリード３のボンディング領域を確実にヒート
ブロック９と当接させることが可能となり、ボンディン
グ不良の発生を防止することができる。According to the present invention, the gap formed between the tip of the inner lead and the heat block 9 at the time of wire bonding is eliminated by crushing the burrs generated when the connection state of the tip of the inner lead is released. The bonding area of the lead 3 can be reliably brought into contact with the heat block 9, and the occurrence of bonding failure can be prevented.
【００１１】[0011]
【実施例】図面を参照しながら本願発明の実施例につい
て詳細に説明する。Embodiments of the present invention will be described in detail with reference to the drawings.
【００１２】図１は本願発明によって製造されたリード
フレーム１のインナーリード先端部の詳細図で、ワイヤ
ボンディング工程におけるインナーリード４とヒートブ
ロック９の当接状態を示すものである。FIG. 1 is a detailed view of the tip of the inner lead of the lead frame 1 manufactured according to the present invention, and shows the contact state between the inner lead 4 and the heat block 9 in the wire bonding step.
【００１３】図２は本願発明に係るリードフレーム１の
製造方法の一実施例を示すもので、特にインナーリード
先端部の状態が各々の工程によって変化していく過程を
示すものである。FIG. 2 shows one embodiment of the method of manufacturing the lead frame 1 according to the present invention, and particularly shows a process in which the state of the tip of the inner lead changes in each process.
【００１４】鉄ニッケル合金や銅合金を所要幅にスリッ
トしたリードフレーム用素材が、順送り金型装置にセッ
トされ、その両端に所定間隔でパイロット孔が打ち抜か
れた後、アウターリード２、タイバー３、サポートバー
６、インナーリード側面、ダイパッド端面などリードフ
レーム１を構成する個々の部位が打ち抜かれていく。A lead frame material obtained by slitting an iron-nickel alloy or a copper alloy to a required width is set in a progressive die device, and pilot holes are punched at predetermined intervals at both ends thereof. Individual parts constituting the lead frame 1, such as the support bar 6, the inner lead side surface, and the die pad end surface, are punched out.
【００１５】ここでインナーリード４については、その
側縁部だけが打ち抜かれ、かつ先端部の加工を行わない
ことによって、隣接するインナーリード４が相互に連結
された状態となり、その状態で先端にワイヤボンディン
グに必要な有効平坦幅を確保するためのコイニングが施
され、形状加工工程を完了する。Here, the inner leads 4 are punched out only at the side edges and are not processed at the front end, so that the adjacent inner leads 4 are connected to each other. Coining is performed to secure an effective flat width required for wire bonding, and the shape processing step is completed.
【００１６】図２では、半導体チップを搭載するための
ダイパッド５（図示せず）の側縁部も順送り金型内で形
状加工しているため、インナーリード先端は、インナー
リード４とほぼ直交する方向に延びる連結バー７によっ
て、相互に連結されることとなっているが、これに限定
されるものではなく、ダイパッド側縁部の形状加工を行
うことなく、つまりインナーリード先端に位置するリー
ドフレーム１の中央部分が完全に未加工の状態であって
も、結果的にインナーリード先端が相互に連結されてい
る状態であれば、発明の実施に何等支障を来すものでは
ない。In FIG. 2, since the side edge of the die pad 5 (not shown) for mounting the semiconductor chip is also shaped in the progressive die, the tip of the inner lead is substantially perpendicular to the inner lead 4. Are connected to each other by a connecting bar 7 extending in the direction, but the present invention is not limited to this. Even if the center part of the first part is completely unprocessed, as long as the ends of the inner leads are connected to each other, there is no problem in practicing the invention.
【００１７】その後、リードフレーム全面やインナーリ
ード先端、ダイパッド表面など所望の領域に適宜選択さ
れた金属メッキが施され、さらに半導体装置組立工程の
搬送中にインナーリード４が変形しないよう、インナー
リード相互間を固定するポリイミド等の絶縁性テープ
が、インナーリード４のほぼ中央に粘着される。Thereafter, a desired area such as the entire surface of the lead frame, the inner lead tips, and the die pad surface is plated with an appropriate metal plating. An insulating tape of polyimide or the like for fixing the gap is adhered to substantially the center of the inner lead 4.
【００１８】なお、図面ではメッキ工程およびテーピン
グ工程のみ開示したが、形状加工工程の後で、リードフ
レーム１の内部に滞留する残留応力を除去し位置精度を
向上させるための熱処理工程を経由することを妨げるも
のではなく、さらにメッキ工程やテーピング工程を必須
要件とするものでもない。In the drawings, only the plating step and the taping step are disclosed. However, after the shape processing step, a heat treatment step for removing residual stress staying inside the lead frame 1 and improving the positional accuracy is required. This does not impede the plating step and the taping step.
【００１９】テーピング工程を完了した後、インナーリ
ード先端の連結状態を解放するためには金型装置が用い
られ、連結バー７に沿ってインナーリード３と直交する
ように連結バー７が抜き落とされるが、ここでインナー
リード先端面の表面側には抜きダレが、また裏面側には
抜きバリが発生し、前述したようにワイヤボンディング
工程において、この抜きバリがインナーリード先端をヒ
ートブロック９表面から持ち上げることにより、当接面
積を減少させボンディング不良を引き起こしている。After the completion of the taping step, a mold device is used to release the connection state of the tip of the inner lead, and the connection bar 7 is pulled out along the connection bar 7 so as to be orthogonal to the inner lead 3. However, in this case, a dripping sag occurs on the front surface side of the inner lead tip surface, and a punch burr occurs on the back surface side. The lifting reduces the contact area and causes bonding failure.
【００２０】本願発明では、連結状態を解放するための
金型装置内またはこれと独立して、インナーリード３の
最先端部を押し潰すためのダイセットを準備しており、
ワイヤボンディングに支障のないインナーリード最先端
部を押し潰すことによって、裏面に発生した抜きバリを
押し潰している。In the present invention, a die set for crushing the leading end of the inner lead 3 is prepared in the mold device for releasing the connection state or independently of the die device.
The burrs generated on the back surface are crushed by crushing the tip of the inner lead, which does not hinder wire bonding.
【００２１】[0021]
【発明の効果】以上説明したように本願発明によれば、
インナーリード先端の抜きバリが押し潰され、インナー
リード裏面に突出部が存在しないことによって、ワイヤ
ボンディング工程において、インナーリード先端とヒー
トブロック９の当接面積が広がり、インナーリード３に
対するヒートブロック９の加熱効果が減衰することなく
伝導されるため、ボンディング不良が低減され、また半
導体装置の信頼性も向上する。As described above, according to the present invention,
Since the burrs at the tip of the inner lead are crushed and the protrusion does not exist on the back surface of the inner lead, the contact area between the tip of the inner lead and the heat block 9 increases in the wire bonding step, and the heat block 9 Since the heating effect is conducted without attenuating, the bonding failure is reduced, and the reliability of the semiconductor device is also improved.
【００２２】[0022]
【図１】本願発明に係るリードフレームを用いたワイヤ
ボンディングの状態を示す。FIG. 1 shows a state of wire bonding using a lead frame according to the present invention.
【図２】本願発明の一実施例を示すリードフレームの製
造工程を示す。FIG. 2 shows a manufacturing process of a lead frame showing one embodiment of the present invention.
【図３】リードフレームの一般的形状を示す。FIG. 3 shows a general shape of a lead frame.
【図４】従来製法によるリードフレームを用いたワイヤ
ボンディングの状態を示す。FIG. 4 shows a state of wire bonding using a lead frame according to a conventional manufacturing method.
１ リードフレーム ２ アウターリード ３ タイバー ４ インナーリード ５ ダイパッド ６ サポートバー ７ 連結バー ８ ボンディングワイヤ ９ ヒートブロック DESCRIPTION OF SYMBOLS 1 Lead frame 2 Outer lead 3 Tie bar 4 Inner lead 5 Die pad 6 Support bar 7 Connecting bar 8 Bonding wire 9 Heat block
Claims (2)
むように放射状に配置された複数のインナーリードと、
当該インナーリードから延在するアウターリードとを具
備し、スタンピング法によって形状加工するリードフレ
ームの製造方法において、 隣接する前記インナーリードの先端が相互に連結される
ように形状加工を行う工程と、 前記インナーリード先端にコイニング加工を施す工程
と、 前記インナーリードの連結状態を開放する工程と、 前記インナーリード先端を押し潰す工程とを有すること
を特徴とするリードフレームの製造方法。A plurality of inner leads radially arranged so as to surround a die pad for mounting a semiconductor element;
An outer lead extending from the inner lead, wherein the lead frame is formed by a stamping method. The method of manufacturing a lead frame, comprising: forming a shape such that tips of adjacent inner leads are connected to each other; A method for manufacturing a lead frame, comprising: a step of subjecting a tip of an inner lead to a coining process; a step of releasing a connection state of the inner lead; and a step of crushing the tip of the inner lead.
互に連結されるように形状加工を行う工程と、 前記インナーリード先端にコイニング加工を施す工程
と、 メッキ工程または焼鈍工程またはテーピング工程の少な
くともいずれか一つの工程を経由した後、前記インナー
リードの連結状態を開放する工程と、 前記インナーリード先端を押し潰す工程とを有すること
を特徴とする請求項1記載のリードフレームの製造方
法。2. A step of forming a shape so that the tips of the adjacent inner leads are connected to each other; a step of coining the tips of the inner leads; and a plating step, an annealing step, or a taping step. 2. The method for manufacturing a lead frame according to claim 1, further comprising: a step of releasing a connection state of the inner leads after passing through one step; and a step of crushing a tip of the inner leads.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP30755893A JP3028173B2 (en) | 1993-11-12 | 1993-11-12 | Lead frame and manufacturing method thereof |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP30755893A JP3028173B2 (en) | 1993-11-12 | 1993-11-12 | Lead frame and manufacturing method thereof |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH07142661A JPH07142661A (en) | 1995-06-02 |
| JP3028173B2 true JP3028173B2 (en) | 2000-04-04 |
Family
ID=17970538
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP30755893A Expired - Lifetime JP3028173B2 (en) | 1993-11-12 | 1993-11-12 | Lead frame and manufacturing method thereof |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP3028173B2 (en) |
Families Citing this family (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP6549003B2 (en) | 2015-09-18 | 2019-07-24 | エイブリック株式会社 | Semiconductor device |
-
1993
- 1993-11-12 JP JP30755893A patent/JP3028173B2/en not_active Expired - Lifetime
Also Published As
| Publication number | Publication date |
|---|---|
| JPH07142661A (en) | 1995-06-02 |
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