JP3013543B2 - Semiconductor device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device,
In particular, the present invention relates to a structure of a semiconductor device which prevents generation of hillocks in a large-area metal wiring layer provided in the semiconductor device.

[0002]

2. Description of the Related Art Depending on the type of a semiconductor device, a metal wiring layer having a relatively large area may be provided on a semiconductor substrate. When the metal wiring layer has a large area, there is a problem that a protrusion called a hillock is easily generated on the surface of the wiring layer.
The occurrence of hillocks causes a short circuit phenomenon between wirings and an interlayer short circuit phenomenon in multilayer wiring. As means for preventing such hillocks, there is a method in which the metal wiring layer 6 is covered with a protective film 8 of an insulating dielectric as shown in FIG. In this technique, after patterning the metal wiring layer 6, a protection film 8 made of a silicon nitride film (SiN film) is formed by, for example, a plasma CVD method to suppress hillocks. The stress of the metal is not released to the outside.

[0003]

As shown in FIG. 5A, when the hillock preventing protective film 8 completely covers the metal wiring layer 6, the effect of the dielectric coating is obtained. Hillock growth is certainly suppressed. However, the protection film 8 may be partially thinned or a part of the metal wiring layer 8 may be exposed due to a defect in the step wiring flattening process, a variation in the thickness of the protection film 8, or the like. . In such a case, as shown in FIG. 3B, the growth of a huge hillock h is caused instead, which causes the short circuit phenomenon. The reason why the giant hillocks h grow is due to the difference in the coefficient of thermal expansion between the metal forming the metal wiring layer 6 and the dielectric forming the protective film 8, whereby the internal stress generated in the metal is reduced. This is because the metal is extruded outward by concentrating on the thinned portion of the protective film 8 and the like.

As a means for preventing such hillock growth, the metal wiring layer 6 is completely covered with the protective film 8 having a uniform thickness by controlling the conditions for forming the hillock preventing protective film 8. It is also conceivable to do so. However, stricter conditions for forming the protective film are
This leads to an increase in manufacturing cost, which is not preferable. The present inventor has conducted intensive studies to effectively suppress hillocks that may occur particularly in a metal wiring layer having a relatively large area. As a result, a hillock hole of a predetermined size is formed in the metal wiring layer, and this hillock It was found that by actively generating hillocks in the holes and relaxing internal stress generated in the metal constituting the metal wiring layer, the growth of hillocks to the outside in the metal wiring layer can be effectively prevented. The invention has been completed. The present invention has been made in view of such circumstances, and effectively increases hillocks, which may be generated in a metal wiring layer having a relatively large area, to the outside of a protective film without increasing manufacturing costs. It is an object of the present invention to provide a semiconductor device capable of preventing a short circuit between wirings.

[0005]

In order to achieve the above object, according to the present invention, a hillock hole into which a hillock preventing protective film enters with a coverage of a predetermined value or less is formed in a metal wiring layer. By generating hillocks positively in the hillock holes, the hillocks are prevented from growing outward from the protective film.

[0006]

The hillock hole into which the hillock preventing protective film enters with a coverage of a predetermined value or less is formed in the metal wiring layer. Therefore, when the metal wiring layer is covered with the hillock preventing protective film, other holes are formed. A portion where the thickness of the protective film is smaller than that of the covering portion or a portion where a part of the metal wiring layer is exposed is formed in the hillock hole. Then, since the internal stress generated in the metal wiring layer is released toward the hillock hole, the hillock grows in the hole, and as a result,
Hillocks are prevented from growing outside the protective film. Further, such a hillock hole can be formed at the same time as patterning the metal wiring layer, so that the number of manufacturing steps does not increase. In the present invention, the hillock hole is used in a wide concept including a slit, a groove, and the like, regardless of its shape or the like.

[0007]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Hereinafter, a semiconductor device according to one embodiment of the present invention will be described in detail with reference to the drawings. FIG. 1 is a sectional view of a main part of a semiconductor device according to one embodiment of the present invention, and FIG.
FIG. 2A is a perspective view showing the metal wiring layer shown in FIG. 1, and FIG.
FIG. 2B is a sectional view taken along the line II-II shown in FIG. In the semiconductor device 20 of the embodiment shown in FIG. 1, an interlayer insulating film layer 4 is formed on a semiconductor substrate 2 on which some semiconductor circuit is formed, and a relatively large area metal wiring layer is formed on the interlayer insulating film layer 4. 21 are formed. A hillock preventing protective film 32 is formed on the metal wiring layer 21. In the case of multilayer wiring, an interlayer insulating film, a metal wiring layer, a protective film, and the like may be repeatedly formed on the protective film 32. The semiconductor substrate 2 is not particularly limited, and for example, a Si substrate is used. The type of the semiconductor circuit formed on the surface of the semiconductor substrate 2 is not particularly limited.

In this embodiment, the protection film 32 for preventing hillocks is used.
As shown in FIG. 2 (A), small holes 22 as a row of hillock holes are formed in the metal wiring layer 21 covered with. The small holes 22 are arranged at predetermined intervals, and are formed so as to penetrate the metal wiring layer 21 and expose the surface of the lower layer 4 as shown in FIG. .
The small holes 22 are formed simultaneously when the metal wiring layer 21 is patterned in the photolithography process. The hole diameter d of each small hole 22 is not particularly limited, but preferably depends on the thickness t of the protective film 32. That is, the protective film 3
2 is formed on the metal wiring layer 21, the coverage of the protective film (the value obtained by dividing the minimum film thickness of the film by the maximum film thickness, for example, expressed in%) that enters the small hole 22 is equal to or less than a predetermined value. The hole diameter d of the small hole 22 is determined so that In general, the coverage must be good, but in the present invention, the coverage is bad enough to approach 0%. Small hole 2
The hole diameter d of No. 2 is specifically within 1 μm, preferably within 0.7 μm. By setting the dimensions in such a range, a portion where the film thickness of the protective film 32 is thinner than other portions and a part of the surface of the metal constituting the metal wiring layer 21 are formed in each of the small holes 22. The exposed portion, that is, the protective film 32
Are formed so that the coverage of the area is almost 0%.

The width W of the metal wiring layer 21 is, for example, 5 μm or more. Hillocks are more likely to occur as the width W of the metal wiring layer 21 increases. Then, a plurality of rows of small holes 22 are preferably formed in parallel at predetermined intervals. At this time, the interval between adjacent small holes 22 is preferably 5 μm or less. When a plurality of rows of small holes 22 are formed, the small holes 22 may be arranged so as to be staggered in adjacent rows. The metal constituting the metal wiring layer 21 is not particularly limited, but for example, aluminum, copper, gold, platinum, titanium, tungsten, or the like can be used. In particular, the hillock is more likely to occur in a low melting point metal. Therefore, the present invention is effective when the metal wiring layer 21 made of aluminum is formed. The hillock prevention protective film 32 is not particularly limited, but is preferably made of a silicon nitride film formed by a plasma CVD method. As described above, the thickness of the protective film 32 is
The coverage of the film entering the small hole 22 is determined so as to be equal to or less than a predetermined value.

Next, the operation of this embodiment will be described with reference to FIG.
Description will be made based on (B). As shown in FIG.
Since the small holes 22 are formed in the metal wiring layer 21 in a predetermined pattern, when the hillock prevention protective film 32 covering the metal wiring layer 21 is formed, a film thickness t is formed in each small hole 22.
Is thinner than the other parts or the metal wiring layer 21
Is formed, that is, a portion where a part of the surface of the metal constituting the metal film is exposed, that is, a portion 34 where the coverage of the protective film 32 is almost 0%. As a result, as shown in FIG. 2B, the internal stress generated in the metal forming the metal wiring layer 21 is reduced by the protection film 3.
In order to concentrate on the portion 34 where the coverage 2 is almost 0%, the internal stress is released toward the inside of each small hole 22. For this reason, the hillock h grows in each small hole 22, and as a result, it is possible to effectively prevent the hillock h from growing outside the protective film 32. The small holes 22 that can suppress hillock growth outside the metal wiring layer 21 as described above are particularly effective means for a thick metal wiring layer 21 having a large internal compression stress. Furthermore, the internal holes generated in the metal wiring layer 21 are alleviated by the small holes 22, so that the stress from the overcoat film formed on the surface layer can be alleviated.

The small holes 22 can be formed at the same time that the metal wiring layer 21 is patterned by means such as etching , so that the number of manufacturing steps does not increase. As a result, the manufacturing cost does not increase. It is to be noted that moisture and the like may remain in the small holes 22 due to poor coverage in the small holes 22, but these can be driven out by heat treatment. The present invention is not limited to the embodiments described above, and can be variously modified within the scope of the present invention.

For example, the shape of the hillock hole is not limited to the small hole 22 having the shape of the above-described embodiment, and a portion where the coverage of the protective film 32 becomes approximately 0% is intentionally formed inside the hole. Thus, various modifications can be made from the viewpoint of preventing hillocks from growing outside the protective film 32. For example, as shown in FIG. 3, a plurality of slits 36 may be arranged as hillock holes. As shown in the figure, when the width W of the metal wiring layer 31 is large and a plurality of rows of slits 36 are formed in parallel, similarly to the above-described embodiment, the interval A between adjacent slits 36 is 5 μm.
m or less is preferable. Further, the slits 36 may be arranged so as to be alternately arranged in adjacent slit rows. Such a shape of the slit 36 or its pattern shape can be easily realized only by changing a mask pattern for etching the metal wiring layer 31. Also in this embodiment, when the protection film 32 for preventing hillocks covering the metal wiring layer 31 is formed, a portion where the coverage of the protection film 32 becomes almost 0% is formed in the slit 36. The hillock grows in each slit 36, and as a result, it is possible to effectively prevent the hillock from growing outside the protective film. Further, the present invention is applicable to a semiconductor device having a plurality of metal wiring layers.

[0013]

As described above, in the semiconductor device of the present invention, since the hillock hole into which the hillock preventing protective film enters with a coverage of a predetermined value or less is formed in the metal wiring layer. When is coated with a protective film,
A portion where the thickness of the protective film is smaller than that of the other covering portions or a portion where a part of the metal wiring layer is exposed is formed in the hillock hole. Then, since the internal stress generated in the metal wiring layer is released toward the hillock hole, the hillock grows in the hole, and as a result, the hillock grows outside the protective film. It can be effectively prevented. Further, since the internal stress generated in the metal wiring layer is alleviated, the stress from the overcoat film can be alleviated. Further, such a hillock hole can be formed at the same time as patterning the metal wiring layer, so that the number of manufacturing steps does not increase. As a result, the manufacturing cost does not increase.

[Brief description of the drawings]

FIG. 1 is a sectional view of a main part of a semiconductor device according to one embodiment of the present invention.

2A is a perspective view showing a metal wiring layer shown in FIG. 1, and FIG. 2B is a cross-sectional view taken along the line II-II shown in FIG.

FIG. 3 is a perspective view showing a shape of a hillock hole according to another embodiment of the present invention.

FIGS. 4A and 4B are cross-sectional views for explaining the operation of the present invention.

FIG. 5 is a schematic cross-sectional view of a main part of a conventional semiconductor device.

[Explanation of symbols]

DESCRIPTION OF SYMBOLS 2 ... Semiconductor substrate 6,21,31 ... Metal wiring layer 20 ... Semiconductor device 12,32 ... Protective film for hillock prevention 22 ... Small hole 36 ... Slit

Continuation of the front page (58) Field surveyed (Int.Cl. ⁷ , DB name) H01L 21/316 H01L 21/318 H01L 21/3205

Claims (1)

(57) [Claims] In a semiconductor device having at least one metal wiring layer laminated on a semiconductor substrate and having a hillock preventing protective film formed on a surface of the metal wiring layer, the metal wiring layer has a hillock. A hillock hole into which the protective film for prevention enters with a coverage of a predetermined value or less is formed, and hillocks grow outward from the protective film by actively generating hillocks in the hillock holes. A semiconductor device characterized by preventing the above.