JP3011061B2 - High frequency switch circuit - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a high frequency switch circuit, and more particularly to a microwave electronic switch circuit using an FET (field effect transistor).

[0002]

2. Description of the Related Art FIG. 2 shows an example of a two-input one-output (SPDT) high-frequency switch circuit using the FET of the first conventional example.
In FIG. 2, (A), (B), and (C) are signal terminals, and (Q ₇ ), (Q ₉ ), (Q ₈ ), and (Q ₁₀ ) are FEs.
T, (V _A ) and (V _B ) are control bias terminals, and (R _G ) is a resistor. FET (Q ₇ ) and FET (Q ₉ ) that cut off the signal when the switch is off, and F that attenuates the signal that leaks when the switch is on when the switch is off.
ET (Q ₈ ), FET (Q ₁₀ ), and a resistor (R _G ) that connects a voltage application terminal for controlling each FET and a gate of the FET.

For example, the control bias terminal _{(V A)} to below the threshold voltage, the addition of DV to control bias terminal _{(V B), FET (Q} 7), FET (Q 10) is turned off, FET ( Q ₈ ) and the FET (Q ₉ ) are turned on. Therefore, the switch is turned off on the signal terminal (A) side and turned on on the signal terminal (B) side. At this time, FE
T (Q ₈ ) is turned on to attenuate the high frequency signal, so that the signal terminals (A)-(C) (or (A)-
(B) Isolation between 30 dB or more can be secured. At this time, the signal terminal (A) is almost short-circuited (the on-resistance of the FET (Q ₈ ) is visible).

In this circuit, the input impedance of the signal terminal (A) when the signal terminal (A) is turned off is changed to the characteristic impedance Z _o (generally 50Ω, 75
When you align in Ω), it may be the on-resistance of the FET _{(Q 8)} to _{Z o.} However, at this time, FET
Since the on-resistance of (Q ₈ ) is 10 times or more larger than that in the above case, the isolation becomes 2 at 1.5 GHz or more.
There is a drawback that it is significantly deteriorated to 0 dB or less. Further, as a method of improving isolation, there is an example in which switches are provided in multiple stages, but there is a disadvantage that a passage loss increases.

FIG. 3 shows an example of a high-frequency switch circuit according to Conventional Example 2. This is proposed in JP-A-63-142716. In FIG. 3, (A),
(B) and (C) are signal terminals, and (Q ₁₁ ) and (Q
₁₂ ) is an FET, and (V _A ), (V _B ),
( _VSA ) and ( _VSB ) are control bias terminals,
(R ₂ ) is a resistance. In this circuit, a terminal-type switch that performs impedance matching when turned off cannot be configured.

[0006]

The high-frequency switch circuit of the prior art 1 described above has a problem that when a switch circuit that terminates at the time of off is configured, the isolation characteristics are significantly deteriorated. Conversely, there is a problem that the passage loss increases when trying to ensure the isolation. In the circuit disclosed in Japanese Unexamined Patent Application Publication No. 63-142716 of the above-mentioned prior art example, a termination type cannot be formed even if isolation is taken. In addition, the FET (Q ₈ ) and the FET in the high frequency switch circuit shown in FIG.
1.5 GH in the same manner as when the resistance of (Q ₁₀ ) is set to 50Ω.
There is a problem that the isolation is deteriorated at z or more. In recent years, communication in the microwave band has been actively performed, and, for example, devices having a plurality of local oscillators have been manufactured. Since the local oscillator is sensitive to external impedance, a high-isolation termination type is required as a switch for switching between them.

[0007]

SUMMARY OF THE INVENTION The present invention relates to a high-frequency switch circuit having a plurality of input terminals and at least one common output terminal, for selecting one high-frequency signal from a plurality of high-frequency signals and outputting the selected high-frequency signal to a common output terminal. A first FET switch having one end connected to the input terminal; a second FET switch inserted between the other end of the first FET switch and the common output terminal; FE
A third FE inserted between the connection point of the T switch and the ground
A high frequency switch circuit comprising a T switch and a terminating resistor connected in parallel with the first FET switch.

[0008]

The high-frequency switch circuit according to the present invention is connected in series to an input side of a conventional switch circuit having a high isolation of a short-circuit type at the time of off, and an FET which is turned off when the switch is off is connected in parallel with the FET. By providing a resistor having a resistance value substantially equal to the characteristic impedance of the above, high isolation can be maintained.

[0009]

Next, embodiments of the present invention will be described with reference to the drawings. [Embodiment 1] FIG. 1 shows a termination type 2 according to a first embodiment of the present invention.
This is a high frequency switch circuit with one input and one output. In FIG. 1, (Q ₁ ) to (Q ₆ ) are FETs, and (A), (B) and (C)
(D) is a signal terminal, a _{node, (R 1) (R G} ) is the _resistance, which is _(V A) (V _B) is the control bias terminal.

[0010] When the switch is on, F is used to pass a signal.
ET (Q ₁ ), FET (Q ₃ ), FET (Q ₄ ), FE
T (Q ₆ ), and a signal source composed of an FET (Q ₂ ) and an FET (Q ₅ ) for bypassing leak power to the ground when the switch is off, and connected to the signal terminal (A) and the signal terminal (B) A resistor (R
₁ ) is connected in parallel with the FET (Q ₂ ) and the FET (Q ₅ ).

The operation of this circuit when the terminal (A) is off will be described first. At this time, the threshold voltage _VP or lower is applied to the control bias terminal (V _A ), and DV is applied to the control bias terminal (V _B ).
(Q ₁ ), FET (Q ₃ ), FET (Q ₅ ) are off, and FET (Q ₂ ), FET (Q ₄ ), FET
(Q ₆ ) is on. When input to the terminal (A) a signal of amplitude _{v 1,} appears on resistance _{R on} and the amplitude _{v 2} of the signal components determined by the dividing ratio of the resistor _{(R 1)} of the FET _{(Q 2)} is the time (D) .

Here, when the signal source impedance is 50Ω, assuming that R _on = 5Ω, the resistance (R ₁ ) = 45.
If Ω is set, the input impedance of the terminal (A) is (R ₁ ) + R _on = 50Ω, and matching is achieved. In this case, the amplitude _{v 2} the time (D) is a tenth of the amplitude _{v 1.} That is, it is possible to realize a termination type switch that has an isolation improvement effect of 10 dB more than the short-circuit type switch composed of the FET (Q ₁ ) and the FET (Q ₂ ), and matches at the time of off.

FIG. 5 shows simulation results of the isolation of the switch of the prior art and the switch of the present invention. The horizontal axis is freq and the vertical axis is dB. (1) is a conventional terminal switch, and (2) is a terminal switch of the present invention. FIG.
As shown in FIG. 2, the termination type switch (2) of the present invention
10 dB compared to the conventional termination switch (1)
〜12 dB isolation is improved. In addition,
The correspondence between the configuration of the present invention and FIG. 1 of the first embodiment will be described. On the terminal (A) side in FIG. 1, the high-frequency switch having the configuration of the present invention is (Q ₁ ), the first terminal is at point (D), and the first FE
T is (Q ₂ ), and the second FET is (Q ₃ ). Also,
On the terminal (B) side in FIG. 1, the high-frequency switch is (Q ₄ )
The first terminal is a contact of (Q ₄ ) (Q ₅ ) (Q ₆ ), the first FET is (Q ₅ ), and the second FET is (Q ₆ ).

Embodiment 2 FIG. 4 shows a second embodiment of the present invention. In FIG. 4, (A) and (C) are signal terminals, (Q ₁₃ ) to (Q ₁₅ ) are FETs, and (R ₁ )
_{(R G)} are resistors, a _{(V G)} is controlled bias terminal.
While the first embodiment of FIG. 1 described above has two inputs and one output, the second embodiment has one input and one output, so that matching can be achieved even at the output terminal (C) when the switch is off. The resistor (R ₁ ) is also connected in parallel with the FET (Q ₁₃ ). In this embodiment, the T-type attenuator is in the off state, but the isolation amount (attenuation amount) can be secured at 25 dB or more, which is better than the conventional type. The correspondence between the configuration of the present invention and FIG. 4 of the second embodiment is as follows. The high-frequency switch of the configuration of the present invention is (Q ₁₃ ), and the first terminal is (Q ₁₃ ).
_(Q 14) contacts _{(Q 15),} the first FET is _{(Q 14),} the second FET is _{(Q 15).}

[0015]

As described above, according to the present invention, the switch F is connected in series with the conventional off-time short-circuit type FET switch.
ET is added, and a resistor is added in parallel with this FET to match the signal source impedance when the switch is off, so that an off-terminating type FET switch circuit can be configured and high isolation can be secured. It has the effect of.

[Brief description of the drawings]

FIG. 1 is a circuit diagram of a first embodiment of the present invention.

FIG. 2 is a circuit diagram of a conventional FET switch.

FIG. 3 is a circuit diagram of a conventional FET switch.

FIG. 4 is a circuit diagram of a second embodiment of the present invention.

FIG. 5 shows simulation results of the isolation of the switch according to the related art and the present invention.

[Explanation of symbols]

A, B, C, D · · · signal terminal, the node _{Q 1 ~Q 15 ··· FET R 1} , R 2, R G ··· resistance _{V A, V B, V SA} , V SB, V G, isolation circuit of the present invention the V _G ... control bias terminal 1 of the conventional circuit of ... Figure 2 isolation 2 ... Figure 1

──────────────────────────────────────────────────続 き Continued on the front page (58) Field surveyed (Int.Cl. ⁷ , DB name) H03K 17/693 H03K 17/687

Claims (1)

(57) [Claims] 1. A high-frequency switch circuit including a plurality of input terminals and at least one common output terminal, wherein one high-frequency signal is selected from a plurality of high-frequency signals and output to a common output terminal, one end of which is connected to the input terminal. The first F
An ET switch; a second FET switch inserted between the other end of the first FET switch and the common output terminal; and a second FET switch inserted between a connection point of the first and second FET switches and ground. A high-frequency switch circuit, comprising: a third FET switch; and a terminating resistor connected in parallel with the first FET switch.