JPH04105417A - High frequency switching circuit - Google Patents

High frequency switching circuit

Info

Publication number
JPH04105417A
JPH04105417A JP22499790A JP22499790A JPH04105417A JP H04105417 A JPH04105417 A JP H04105417A JP 22499790 A JP22499790 A JP 22499790A JP 22499790 A JP22499790 A JP 22499790A JP H04105417 A JPH04105417 A JP H04105417A
Authority
JP
Japan
Prior art keywords
high frequency
field effect
circuit
effect transistor
switch circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP22499790A
Other languages
Japanese (ja)
Inventor
Sadayoshi Yoshida
吉田 貞義
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP22499790A priority Critical patent/JPH04105417A/en
Publication of JPH04105417A publication Critical patent/JPH04105417A/en
Pending legal-status Critical Current

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  • Electronic Switches (AREA)

Abstract

PURPOSE:To make a high frequency switching circuit small in a semiconductor integrated circuit by employing a resistor causing an insertion loss of a field effect transistor(TR) for a component of an attenuator in the high frequency switching circuit so as to provide a function of a matching circuit to the high frequency switching circuit. CONSTITUTION:A high frequency signal inputted from a high frequency input terminal passes through a field effect TR(FET) Q1 in the on-state and is reflected in a FET Q3 in the OFF-state and outputted to a high frequency output terminal A. On the other hand, since the FET Q2 is in the OFF state, the inputted high frequency signal is reflected entirely by the FET Q2 and not outputted at a high frequency output terminal B. In this case, an insertion loss is caused by an ON resistor R of the FET Q1. The resistor R is regarded as part of the attenuator and a resistor RA is connected in parallel with the high frequency input terminal and the high frequency output terminal respectively so that the impedance when viewing the high frequency input terminal is in matching with a load impedance (50ohms). Thus, when the circuit is realized by the semiconductor integrated circuit, the circuit constitution is made small.

Description

【発明の詳細な説明】 産業上の利用分野 本発明は、高周波スイッチ回路に関し、特に、マイクロ
波用集積回路に関する。
DETAILED DESCRIPTION OF THE INVENTION Field of the Invention The present invention relates to high frequency switching circuits, and in particular to microwave integrated circuits.

従来の技術 従来、この種の高周波スイッチ回路は、第3図で示す様
な電界効果トランジスタQ++〜QI4と、入力側整合
回路1と、出力側整合回路2.3と、制御端子C0NT
II、C0NT12とを有している。この回路は高周波
が高周波入力端から入力されると、埜ず入力側整合回路
1を通過する。入力側整合回路1を通過した高周波は、
制御端子C0NTIIとC0NIT12によって、直列
接続したQ++又はQ12を通過した後、出力側整合回
路2又は3を通過して、任意の高周波出力端に出力され
る回路構成であった。
2. Description of the Related Art Conventionally, this type of high-frequency switch circuit consists of field effect transistors Q++ to QI4 as shown in FIG. 3, an input-side matching circuit 1, an output-side matching circuit 2.3, and a control terminal C0NT.
II, C0NT12. In this circuit, when a high frequency is input from the high frequency input terminal, it passes through the input side matching circuit 1. The high frequency that passed through the input matching circuit 1 is
With the control terminals C0NTII and C0NIT12, the signal passes through Q++ or Q12 connected in series, passes through the output side matching circuit 2 or 3, and is outputted to an arbitrary high frequency output terminal.

発明が解決しようとする課題 しかしながら、この従来の高周波スイッチ回路では、入
出力端に整合をとる目的で整合回路を挿入していた為に
、回路構成が大きくなる。また、整合回路を入出力端に
挿入している為に、それぞれの整合回路で整合を取らな
ければならないという欠点があった。
Problems to be Solved by the Invention However, in this conventional high frequency switch circuit, a matching circuit is inserted at the input and output terminals for the purpose of matching, resulting in a large circuit configuration. Furthermore, since matching circuits are inserted at the input and output terminals, there is a drawback that matching must be achieved using each matching circuit.

本発明は従来の上記実情に鑑みてなされたものであり、
従って本発明の目的は、従来の技術に内在する上記欠点
を解消することを可能とした新規な高周波スイッチ回路
を提供することにある。
The present invention has been made in view of the above-mentioned conventional situation,
SUMMARY OF THE INVENTION Accordingly, an object of the present invention is to provide a novel high-frequency switch circuit that makes it possible to eliminate the above-mentioned drawbacks inherent in the conventional technology.

課題を解決するための手段 上記目的を達成する為に、本発明に係る高周波スイッチ
回路は、高周波スイッチ回路に並列に抵抗を接続するこ
とで高周波スイッチを構成する電界効果トランジスタの
挿入損失を減衰器の構成要素とみなし、高周波スイッチ
回路が整合回路の機能を有している。
Means for Solving the Problems In order to achieve the above object, the high frequency switch circuit according to the present invention has an attenuator for the insertion loss of the field effect transistor constituting the high frequency switch by connecting a resistor in parallel to the high frequency switch circuit. The high frequency switch circuit has the function of a matching circuit.

実施例 次に本発明をその好ましい一実施例について図面を参照
して具体的に説明する。
Embodiment Next, a preferred embodiment of the present invention will be specifically explained with reference to the drawings.

第1図は本発明の一実施例を示す回路構成図である。FIG. 1 is a circuit diagram showing an embodiment of the present invention.

第1図を参照するに、本発明の一実施例においては、高
周波入力端及び高周波出力端A=Hにはそれぞれ抵抗R
Aが接続されている。ここで、電界効果トランジスタの
制御端子C0NTlによって電界効果トランジスタQ2
、Q3は°OFF’状態、制御端子C0NT2によって
電界効果トランジスタQ1、Q4は°ON°状態にある
ものとする。
Referring to FIG. 1, in one embodiment of the present invention, a high frequency input terminal and a high frequency output terminal A=H each have a resistor R.
A is connected. Here, the field effect transistor Q2 is controlled by the control terminal C0NTl of the field effect transistor.
, Q3 are in the OFF' state, and the field effect transistors Q1 and Q4 are in the OFF state by the control terminal C0NT2.

高周波入力端から入力した高周波は、°ON°状態にあ
る電界効果トランジスタQlを通過し、’OFF’状態
にある電界効果トランジスタQ3では反射されて高周波
出力端Aに出力される。
The high frequency input from the high frequency input terminal passes through the field effect transistor Ql which is in the ON degree state, is reflected by the field effect transistor Q3 which is in the 'OFF' state, and is output to the high frequency output terminal A.

一方、電界効果トランジスタQ2は“OFF”状態であ
るので、入力した高周波はトランジスタQ2ですべて反
射されて高周波出力端Bには出力されない。
On the other hand, since the field effect transistor Q2 is in the "OFF" state, all of the input high frequency is reflected by the transistor Q2 and is not output to the high frequency output terminal B.

この時、高周波は電界効果トランジスタQ1の°ON°
抵抗Rにより挿入損が生じる。この抵抗Rを減衰器の一
部とみなし、高周波入力側から見たインピーダンスが負
荷インピーダンス(50Ω)と整合がとれる様に、高周
波入力端と高周波出力端にそれぞれ並列に抵抗RAを接
続し、第2図に示すπ型減衰器と等価回路にする。
At this time, the high frequency is ON° of the field effect transistor Q1.
Resistance R causes insertion loss. Regarding this resistor R as a part of the attenuator, a resistor RA is connected in parallel to the high frequency input end and the high frequency output end, respectively, so that the impedance seen from the high frequency input side matches the load impedance (50Ω). Make an equivalent circuit to the π-type attenuator shown in Figure 2.

以上の回路構成を半導体集積回路上で実現した場合、回
路構成が小型化されるだけでなく、整合が十分にとれて
いない場合でも、抵抗RAの値を配線で変化する様にし
ておけば、整合を十分にとることができ自由度は大きい
、また、プロセス上、配線で整合をとることができ、プ
ロセス期間の短縮などかなり有益である。
If the above circuit configuration is realized on a semiconductor integrated circuit, not only will the circuit configuration be made smaller, but even if matching is not achieved, the value of the resistor RA can be changed by wiring. It is possible to achieve sufficient matching and has a large degree of freedom.Also, in terms of process, matching can be achieved with wiring, which is quite beneficial, such as shortening the process period.

以上説明した本実施例では、電界効果トランジスタQ1
.Q4を“ON”状態、電界効果トランジスタQ2. 
Q3を“OFF”状態としたが、代わりにトランジスタ
Q2、Q3を“ON”状態、トランジスタQ3、Q4を
’OFF’ 状態としても同様に説明することができる
In this embodiment described above, the field effect transistor Q1
.. Q4 is in the "ON" state, field effect transistor Q2.
Although Q3 is set in the "OFF" state, the same explanation can be made by setting the transistors Q2 and Q3 in the "ON" state and the transistors Q3 and Q4 in the 'OFF' state.

また、゛本発明は、第1図に示された直列トランジスタ
Ql又はQ2、並列トランジスタQ、又はQ4を含む回
路を3個又はn個とすれば1入力3出力又はn出力(多
出力)のスイッチ回路に拡張することもてきるし、また
、入力側を2以上にすれば、多入力、多出力のスイッチ
回路に拡張することも可能である。
In addition, the present invention provides 1-input, 3-output or n-output (multi-output) circuits when there are three or n circuits including the series transistor Ql or Q2 and the parallel transistor Q or Q4 shown in FIG. It can be expanded to a switch circuit, and if the number of inputs is two or more, it can also be expanded to a multi-input, multi-output switch circuit.

発明の詳細 な説明したように、本発明によれば、高周波スイッチ回
路において電界効果トランジスタの挿入損失を減衰器の
構成要素とすることで、高周波スイッチ回路をスイッチ
本来の機能に整合回路の機能をもたせ、半導体集積回路
上、高周波スイッチ回路を小型化できるという効果が得
られる。
As described in detail, according to the present invention, by using the insertion loss of a field effect transistor in a high frequency switch circuit as a component of an attenuator, the high frequency switch circuit can perform the function of a matching circuit in addition to the original function of a switch. Additionally, it is possible to reduce the size of the high frequency switch circuit on the semiconductor integrated circuit.

また、本発明によれば、整合をとる自由度が高いために
、プロセス期間の短縮という効果が得られる。
Further, according to the present invention, since there is a high degree of freedom in matching, it is possible to obtain the effect of shortening the process period.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本発明に係る高周波スイッチ回路の一実施例を
示す回路構成図、第2図は第1図で高周波を入力した時
の等価回路図、第3図は従来の高周波スイッチ回路の構
成図である。 Qr 、Q2.Ql、Q4.Ql + 、Ql2.Ql
3.Ql4・・・電界効果トランジスタ、Rg・・・電
界効果トランジスタのゲートバイアス用抵抗、C0NT
l 、C0NT2、C0NTl 1 、 C0NT12
・・・電界効果トランジスタの制御端子、RA・・・減
衰器構成用挿入抵抗、R・・・電界効果トランジスタの
“ON”状態での抵抗、1.2.3・・・整合回路Q1
〜Q、a : を界効呆トランジスタRg:li界妨果
トランジスタのゲートバイアス用Fa抗C0NTl 、
C0NT2 :電界効果トランジスタの制御端子第1図 特許出願人  日本電気株式会社 代 理 人  弁理士 熊谷 雄太部 RA 、遮艮器構成用神入柩抗 R:電界マカ累トランジスタのON状龍での担抗第2図
Figure 1 is a circuit configuration diagram showing an embodiment of the high frequency switch circuit according to the present invention, Figure 2 is an equivalent circuit diagram when high frequency is input in Figure 1, and Figure 3 is the configuration of a conventional high frequency switch circuit. It is a diagram. Qr, Q2. Ql, Q4. Ql + , Ql2. Ql
3. Ql4...Field effect transistor, Rg...Resistance for gate bias of field effect transistor, C0NT
l , C0NT2, C0NTl 1 , C0NT12
... Control terminal of field effect transistor, RA ... Insert resistance for attenuator configuration, R ... Resistance in "ON" state of field effect transistor, 1.2.3 ... Matching circuit Q1
~Q, a: Field effect transistor Rg: Li field effect transistor gate bias Fa anti-C0NTl,
C0NT2: Control terminal of field effect transistor Fig. 1 Patent applicant: NEC Co., Ltd. Representative Patent attorney: Yutabe Kumagai RA, Kaminari coffin for constructing a shield R: Responsible for ON-state dragon of electric field effect transistor anti-diagram 2

Claims (2)

【特許請求の範囲】[Claims] (1)、第1、第2の電界効果トランジスタのドレイン
を接続して1つの高周波入力端子とし、前記第1、第2
の電界効果トランジスタのソースにそれぞれ第3、第4
の電界効果トランジスタのドレインを並列接続して2つ
の高周波出力端子を構成し、前記第1と第4の電界効果
トランジスタのゲートに共通に電圧を印加する第1の制
御端と、前記第2と第3の電界効果トランジスタのゲー
トに共通に電圧を印加する第2の制御端をもつ1入力2
出力端の高周波スイッチ回路において、前記第1の電界
効果トランジスタを“ON”状態にし、入力端から入力
した高周波が該第1の電界効果トランジスタのドレイン
・ソース間を通過した時の挿入損を減衰器の構成要素と
みなし、高周波入力端に並列接続した第1の抵抗と、高
周波出力端に並列接続した第2の抵抗とによりπ型減衰
器を構成し、高周波スイッチ回路に整合回路を含むこと
を特徴とする高周波スイッチ回路。
(1) The drains of the first and second field effect transistors are connected to form one high frequency input terminal, and
The third and fourth transistors are connected to the sources of the field effect transistors, respectively.
a first control terminal that connects the drains of the field effect transistors in parallel to form two high frequency output terminals, and applies a voltage in common to the gates of the first and fourth field effect transistors; 1 input 2 with a second control terminal that commonly applies a voltage to the gates of the third field effect transistors;
In the high frequency switch circuit at the output end, the first field effect transistor is turned on, and the insertion loss when the high frequency input from the input end passes between the drain and source of the first field effect transistor is attenuated. A first resistor connected in parallel to the high-frequency input terminal and a second resistor connected in parallel to the high-frequency output terminal constitute a π-type attenuator, and a matching circuit is included in the high-frequency switch circuit. A high frequency switch circuit featuring:
(2)、前記第1の電界効果トランジスタの代わりに前
記第2の電界効果トランジスタを“ON”状態にし、入
力端から入力した高周波が該第2の電界効果トランジス
タのドレイン・ソース間を通過した時の挿入損を減衰器
の構成要素とみなし、高周波入力端に並列に接続した前
記第1の抵抗と、高周波出力端に並列接続した第3の抵
抗とによりπ型減衰器を構成し、高周波スイッチ回路に
整合回路を含むことを更に特徴とする請求項(1)に記
載の高周波スイッチ回路。
(2) The second field effect transistor is turned on instead of the first field effect transistor, and the high frequency input from the input terminal passes between the drain and source of the second field effect transistor. Considering the insertion loss at the time as a component of the attenuator, the first resistor connected in parallel to the high frequency input terminal and the third resistor connected in parallel to the high frequency output terminal constitute a π-type attenuator, and the high frequency The high frequency switch circuit according to claim 1, further comprising a matching circuit in the switch circuit.
JP22499790A 1990-08-27 1990-08-27 High frequency switching circuit Pending JPH04105417A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP22499790A JPH04105417A (en) 1990-08-27 1990-08-27 High frequency switching circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP22499790A JPH04105417A (en) 1990-08-27 1990-08-27 High frequency switching circuit

Publications (1)

Publication Number Publication Date
JPH04105417A true JPH04105417A (en) 1992-04-07

Family

ID=16822471

Family Applications (1)

Application Number Title Priority Date Filing Date
JP22499790A Pending JPH04105417A (en) 1990-08-27 1990-08-27 High frequency switching circuit

Country Status (1)

Country Link
JP (1) JPH04105417A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH08335865A (en) * 1995-06-08 1996-12-17 Nec Corp High frequency switch circuit
JP2005086738A (en) * 2003-09-11 2005-03-31 Sony Ericsson Mobilecommunications Japan Inc Power amplifier and transmitter

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH08335865A (en) * 1995-06-08 1996-12-17 Nec Corp High frequency switch circuit
JP2005086738A (en) * 2003-09-11 2005-03-31 Sony Ericsson Mobilecommunications Japan Inc Power amplifier and transmitter
JP4521806B2 (en) * 2003-09-11 2010-08-11 ソニー・エリクソン・モバイルコミュニケーションズ株式会社 Power amplification device and transmission device

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