JP3000593B2 - Etching method - Google Patents

Etching method

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Publication number
JP3000593B2
JP3000593B2 JP1197552A JP19755289A JP3000593B2 JP 3000593 B2 JP3000593 B2 JP 3000593B2 JP 1197552 A JP1197552 A JP 1197552A JP 19755289 A JP19755289 A JP 19755289A JP 3000593 B2 JP3000593 B2 JP 3000593B2
Authority
JP
Japan
Prior art keywords
etching
chlorine
freon
present
mixed gas
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
JP1197552A
Other languages
Japanese (ja)
Other versions
JPH0362518A (en
Inventor
真一 竹城
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP1197552A priority Critical patent/JP3000593B2/en
Publication of JPH0362518A publication Critical patent/JPH0362518A/en
Application granted granted Critical
Publication of JP3000593B2 publication Critical patent/JP3000593B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

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Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明は半導体装置の製造方法に関し、特に反応性イ
オンエッチングの方法に関する。Description: TECHNICAL FIELD The present invention relates to a method for manufacturing a semiconductor device, and more particularly to a method for reactive ion etching.

〔従来の技術〕 従来、多結晶シリコンおよびタングステンシリサイド
の反応性イオンエッチングでは、エッチングに使用する
ガスとして六弗化硫黄（SF6）とフロン113（C2Cl3F3）
又は、六弗化硫黄（SF6）とフロン115（C2ClF5）の混合
ガスを使用していた。2. Description of the Related Art Conventionally, in reactive ion etching of polycrystalline silicon and tungsten silicide, sulfur hexafluoride (SF 6 ) and Freon 113 (C 2 Cl 3 F 3 ) are used as etching gases.
Alternatively, a mixed gas of sulfur hexafluoride (SF 6 ) and Freon 115 (C 2 ClF 5 ) has been used.

〔発明が解決しようとする課題〕[Problems to be solved by the invention]

上述した従来のエッチング方法は、オゾン層を破壊す
るフロン113又はフロン115を使用しているため、フロン
規制により、今後使用できなくなるという欠点がある。The above-described conventional etching method has a drawback that it cannot be used in the future due to the restriction of the chlorofluorocarbon, since it uses fluorocarbon 113 or fluorocarbon 115 that destroys the ozone layer.

〔発明の従来技術に対する相違点〕[Differences of the Invention from the Prior Art]

上述した従来のエッチング方法に対し、本発明は塩素
（Cl2），三塩化硼素（BCl3），フロン14（CF4）および
酸素（O2）を使用するという相違点を有する。Compared to the conventional etching method described above, the present invention has a difference in using chlorine (Cl 2 ), boron trichloride (BCl 3 ), Freon 14 (CF 4 ) and oxygen (O 2 ).

〔課題を解決するための手段〕[Means for solving the problem]

酸化膜上に設けられた多結晶シリコンまたはタングス
テンシリサイドを高周波電力を用いた反応性イオンエッ
チングによりエッチングする方法において、塩素（C
l2）、三塩化硼素（BCl3）、フロン14（CF4）および酸
素（O2）の混合ガスを用いることを特徴としている。In the method of etching polycrystalline silicon or tungsten silicide provided on an oxide film by reactive ion etching using high frequency power, chlorine (C
l 2 ), a mixed gas of boron trichloride (BCl 3 ), Freon 14 (CF 4 ) and oxygen (O 2 ).

〔実施例〕〔Example〕

次に、本発明について図面を参照して説明する。 Next, the present invention will be described with reference to the drawings.

第１図は本発明の第１の実施例のエッチング前の半導
体チップ（ウェハー）の縦断面図である。シリコン基板
４の表面に酸化膜３を形成し、さらに被エッチング膜で
ある多結晶シリコン膜２を形成した後にフォトレジスト
１によってパターンを形成する。この半導体基板を塩素
（Cl2），三塩化硼素（BCl3），フロン14（CF4），酸素
（O2）の混合ガスを用いた反応性イオンエッチングによ
りエッチングを行なう。FIG. 1 is a longitudinal sectional view of a semiconductor chip (wafer) before etching according to a first embodiment of the present invention. An oxide film 3 is formed on the surface of a silicon substrate 4, a polycrystalline silicon film 2 as a film to be etched is formed, and then a pattern is formed with a photoresist 1. This semiconductor substrate is etched by reactive ion etching using a mixed gas of chlorine (Cl 2 ), boron trichloride (BCl 3 ), Freon 14 (CF 4 ), and oxygen (O 2 ).

第２図は、本発明の第１の実施例のエッチング後の半
導体チップの縦断面図である。多結晶シリコン膜２は、
フォトレジスト１に対して、垂直にエッチングされる。FIG. 2 is a longitudinal sectional view of the semiconductor chip after etching according to the first embodiment of the present invention. The polycrystalline silicon film 2
The photoresist 1 is etched perpendicularly.

第３図は本発明の第１の実施例のエッチング特性図で
ある。混合ガス中のBCl3流量を120SCCM,CF4流量を10
SCCM,O2流量を10SCCMとし、高周波電力を1300Wとした場
合、圧力25mTorrから40mTorrの範囲で塩素流量20SCCM21
ではエッチング速度は375Å/mimから430Å/mimとなり、
塩素流量30SCCM22ではエッチング速度は475Å/mimから5
30Å/mimとなる。FIG. 3 is an etching characteristic diagram of the first embodiment of the present invention. BCl 3 flow rate in mixed gas is 120 SCCM , CF 4 flow rate is 10
When the SCCM and O 2 flow rates are set to 10 SCCM and the high frequency power is set to 1300 W, the chlorine flow rate 20 SCCM 21 in the pressure range of 25 mTorr to 40 mTorr.
Then the etching rate goes from 375Å / mim to 430Å / mim,
At a chlorine flow rate of 30 SCCM 22, the etching rate is from 475Å / mim to 5
30Å / mim.

第４図は本発明の第２の実施例のエッチング前の半導
体チップの縦断面図である。シリコン基板４の上に酸化
膜３を形成し、この上に電極材料となるタングステンシ
リサイド膜５を形成した後にフォトレジスト１によって
パターンを形成し、塩素，三塩化硼素，フロン14,酸素
の混合ガスによってエッチングを行なう。この実施例で
は、電極材料にタングステンシリサイドを使用している
ため、抵抗値をポリシリコンに比べ低くできる利点があ
る。FIG. 4 is a longitudinal sectional view of a semiconductor chip before etching according to a second embodiment of the present invention. An oxide film 3 is formed on a silicon substrate 4, a tungsten silicide film 5 serving as an electrode material is formed thereon, and then a pattern is formed using a photoresist 1, and a mixed gas of chlorine, boron trichloride, Freon 14, and oxygen Etching is performed. In this embodiment, since tungsten silicide is used as the electrode material, there is an advantage that the resistance value can be lower than that of polysilicon.

〔発明の効果〕〔The invention's effect〕

以上説明したように、本発明は、塩素，三塩化硼素，
フロント14,酸素の混合ガスにより多結晶シリコン膜あ
るいはタングステンシリサイド膜をエッチングすること
によりオゾン層を破壊するフロン113,フロン115を使用
する必要がなくなるという効果がある。As explained above, the present invention relates to chlorine, boron trichloride,
There is an effect that it is not necessary to use Freon 113 and Freon 115, which destroy the ozone layer by etching the polycrystalline silicon film or the tungsten silicide film with the front 14 and the mixed gas of oxygen.

【図面の簡単な説明】[Brief description of the drawings]

第１図は本発明の第１の実施例のエッチング前の半導体
チップの縦断面図、第２図は本発明の第１の実施例のエ
ッチング後の半導体チップの縦断面図、第３図は本発明
の第１の実施例のエッチング特性図、第４図は本発明の
第２の実施例のエッチング前の半導体チップの縦断面図
である。 １……フォトレジスト、２……多結晶シリコン膜、３…
…酸化膜、４……シリコン基板、５……タングステンシ
リサイド膜、21……塩素流量20SCCMでのエッチング特
性、22……塩素流量30SCCMでのエッチング特性。FIG. 1 is a longitudinal sectional view of a semiconductor chip before etching according to a first embodiment of the present invention, FIG. 2 is a longitudinal sectional view of a semiconductor chip after etching according to the first embodiment of the present invention, and FIG. FIG. 4 is a longitudinal sectional view of a semiconductor chip before etching according to a second embodiment of the present invention. 1 ... photoresist, 2 ... polycrystalline silicon film, 3 ...
... Oxide film, 4 ... Silicon substrate, 5 ... Tungsten silicide film, 21 ... Etching characteristic at chlorine flow rate of 20 SCCM , 22 ... Etching characteristic at chlorine flow rate of 30 SCCM .

Claims (2)

(57)【特許請求の範囲】(57) [Claims] 【請求項１】酸化膜上に設けられた多結晶シリコンまた
はタングステンシリサイドを高周波電力を用いた反応性
イオンエッチングによりエッチングする方法において、
塩素（Cl2）、三塩化硼素（BCl3）、フロン14（CF4）お
よび酸素（O2）の混合ガスを用いることを特徴とするエ
ッチング方法。A method for etching polycrystalline silicon or tungsten silicide provided on an oxide film by reactive ion etching using high frequency power,
An etching method using a mixed gas of chlorine (Cl 2 ), boron trichloride (BCl 3 ), Freon 14 (CF 4 ) and oxygen (O 2 ). 【請求項２】前記エッチングは基板に対して垂直に行わ
れることを特徴とする特許請求の範囲第（１）項記載の
エッチング方法。2. The etching method according to claim 1, wherein said etching is performed perpendicular to the substrate.
JP1197552A 1989-07-28 1989-07-28 Etching method Expired - Fee Related JP3000593B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1197552A JP3000593B2 (en) 1989-07-28 1989-07-28 Etching method

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1197552A JP3000593B2 (en) 1989-07-28 1989-07-28 Etching method

Publications (2)

Publication Number Publication Date
JPH0362518A JPH0362518A (en) 1991-03-18
JP3000593B2 true JP3000593B2 (en) 2000-01-17

Family

ID=16376388

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1197552A Expired - Fee Related JP3000593B2 (en) 1989-07-28 1989-07-28 Etching method

Country Status (1)

Country Link
JP (1) JP3000593B2 (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR101447434B1 (en) 2008-09-09 2014-10-13 주성엔지니어링(주) Solar cell, method and apparatus for fabrication of the solar cell

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6613682B1 (en) * 1999-10-21 2003-09-02 Applied Materials Inc. Method for in situ removal of a dielectric antireflective coating during a gate etch process

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR101447434B1 (en) 2008-09-09 2014-10-13 주성엔지니어링(주) Solar cell, method and apparatus for fabrication of the solar cell

Also Published As

Publication number Publication date
JPH0362518A (en) 1991-03-18

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