JP3000174B2 - Driving method of display device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an active display device, and more particularly to an active liquid crystal display device. Two P-channel and N-channel thin-film insulated gate field effect transistors are complementary to each pixel. The present invention relates to a method for driving a display device in which pixels are provided with TFTs (hereinafter referred to as TFTs).

[0002]

2. Description of the Related Art Conventionally, an effective display device has been
2. Description of the Related Art An active liquid crystal display device using an FT is known. In this case, a semiconductor having an amorphous or polycrystalline structure is used for the TFT, and a TFT having only one of the P and N conductivity types is used for one pixel. That is, generally, an N-channel TFT (referred to as NTFT) is connected in series to the pixel. FIG. 8 shows a typical example.

In general, an active matrix type liquid crystal display device has a very large number of pixels of 480 × 640 or 1260 × 960. FIG. 8 shows the same meaning as above, and is shown in a 2 × 2 matrix arrangement for simplicity of explanation. A plurality of gate lines G ₁ , G ₂ and a plurality of data lines D ₁ , D ₂ are arranged orthogonally, and pixel display elements are provided at intersections of the matrix. This pixel display element includes a liquid crystal unit 102 and a TFT unit 101. Peripheral circuits 106, 10 for each pixel
7, a signal is added, and a predetermined pixel is selectively turned on or off to perform display.

However, when these liquid crystal display devices are actually manufactured and displayed, the output of the TFT, that is, the voltage _VLC 100 of the input to the liquid crystal (referred to as the liquid crystal potential) is:
Often, when “1” (High) should be “1” (H
i), and conversely, when it should be “0” (Low), it does not become “0” (Low). This occurs because there is no symmetry in the characteristics of the switching element that applies a signal to the pixel, that is, the TFT. In other words, this is because the state of charge and the state of discharge to the pixel electrode have a difference in electrical characteristics. The liquid crystal 102 is inherently insulative in its operation, and the liquid crystal potential (V _LC ) floats when the TFT is off. Since the liquid crystal 102 is equivalently a capacitor, _VLC is determined by the electric charge stored therein. This charge is a relatively small resistance in the _RLC of the liquid crystal, leaks due to the presence of dust or ionic impurities, and when the _RGS 105 is generated by a pinhole in the gate insulating film of the TFT, the charge is generated therefrom. Leakage occurs, and _VLC is in an incomplete state. For this reason, a liquid crystal display device having 200,000 to 5,000,000 pixels in one panel has a problem that a high yield cannot be achieved.

As the liquid crystal 102, a TN (twisted nematic) liquid crystal is generally used. A rubbed alignment film is provided on each electrode to align the liquid crystal.
A weak dielectric breakdown occurs due to static electricity generated by the rubbing process, and leakage occurs between adjacent pixels or adjacent conductors, or the gate insulating film is weak and leaks.

[0006]

In an active type liquid crystal display device, it is extremely important to keep the liquid crystal potential at the same level as the initial value for one frame and to maintain a predetermined level. However, in practice, there are many defective active elements, and in reality, the liquid crystal potential cannot always be kept at the same level as the initial value and maintained at a predetermined level during one frame. Further, in driving a liquid crystal or the like, if a voltage applied to the liquid crystal is biased to either + or-due to a signal to be applied, electrolysis or the like occurs, and the liquid crystal material is decomposed and denatured, so that sufficient display cannot be performed. That happens. In this case, the applied signal is converted into an alternating current to prevent the voltage applied to the liquid crystal material from being biased. However, the alternating signal is very complicated.

[0007] The present invention solves the above-mentioned problems and increases the current margin, that is, increases the response speed. Further, the potential of the pixel in each pixel, that is, the liquid crystal potential V _LC
Are fixed to "1" and "0" with sufficient stability so that the level does not drift during one frame.

[0008]

According to the present invention, an NTFT and a PTFT are provided for a pixel in a complementary configuration,
A source (drain) portion of the FT is connected to a first signal line of the pair of signal lines, a source (drain) portion of the NTFT is connected to a second signal line of the pair of signal lines,
A method for driving a display device, wherein a gate electrode of the NTFT and a PTFT is commonly connected to a third signal line, and a drain (source) portion of the NTFT and a PTFT is connected to a pixel electrode. The pair of first and second
By applying a signal waveform to the third signal line during a period in which the signal waveform is applied to the signal line, the complementary thin film transistor (hereinafter referred to as C / TF) is applied.
T) to drive the display device to turn on or off the pixel display.

As a configuration of a display device to which the driving method of the present invention can be applied, two or more C / Cs are provided for one pixel.
One pixel may be formed by connecting TFTs. Further, one pixel may be divided into two or more, and one or more C / TFTs may be connected to each.

FIGS. 2, 3 and 4 are circuit diagrams showing typical examples of the configuration of a display device to which the driving method of the present invention can be applied.
FIGS. 5, 6, and 7 show examples of actual pattern layouts (arrangement diagrams), respectively. For the sake of simplicity, a description will be given of a 2 × 2 matrix configuration as an example. In the example of the 2 × 2 matrix of FIG.
The gates of the TFT and PTFT are connected to each other.
Connected to the third axial signal line 3 or 4 and
The common output terminal of the FT is connected to the liquid crystal 15. PTFT
Of the pair of signal lines in the X-axis direction is connected to the first signal line 5 or 6 of the pair of signal lines in the X-axis direction, and the input terminal (20 side) of the NTFT is connected to the first signal line 5 in the X-axis direction. Are connected to the second signal line 8 or 7.

In such a configuration, as shown in FIG. 1, the third signal is applied during the period in which the ON signal waveform is applied between the pair of the first signal line 5 and the second signal line 8. When an ON signal waveform is applied to the line 3, the liquid crystal potential (V _LC )
14 is the voltage V _DD applied to the first signal line. Further, when the off signal waveform is applied to the third signal line 3 during the period when the off signal waveform is applied between the pair of the first signal line 5 and the second signal line 8, the liquid crystal potential (V _LC ) 14 has no potential. Furthermore, when the ON signal waveform is not applied to the third signal line 3 during the period when the OFF signal waveform is applied between the pair of the first signal line 5 and the second signal line 8, the liquid crystal potential _(V LC) 14 is the voltage _{V SS} which is applied to the second signal line. As described above, the liquid crystal potential (V _LC ) 1
4 because capable of fixing to _{V DD} or _{V SS,} never become floating.

The counter electrode 16 has an offset voltage V
_{The OFFSET} is applied, and the voltage actually applied to the liquid crystal 15 has three values of V _DD + V _OFFSET , V _OFFSET or V _SS + V _OFFSET . In the driving method of the present invention, the offset voltage V applied to the counter electrode
By changing _OFFSET , it is possible to arbitrarily change ON and OFF of the liquid crystal drive. Also, since the threshold value for actually driving the liquid crystal differs depending on the liquid crystal material, the offset voltage V is adjusted to match the value of the liquid crystal.
An arbitrary threshold can be adjusted only by changing the _OFFSET .

In driving a liquid crystal or the like, when a voltage applied to the liquid crystal is biased to either + or-by an applied signal, electrolysis or the like occurs, and the liquid crystal material is decomposed and denatured to display. In this case where things do n’t work well,
According to the driving method of the present invention, the polarity of the offset voltage V _OFFSET applied to the counter electrode and the logic of the selection signal applied to the data signal line are controlled by _converting the applied signal into an alternating current so as not to cause a bias in the voltage applied to the liquid crystal material. Has the characteristic that an AC signal can be generated very easily only by inverting.

In the example shown in FIG. 3, PTFT 13, NTFT 22 and second C / TFT constituting the first C / TFT
Are connected in common to the third signal line 3 in the Y direction by using the four gate electrodes PTFT 24 and NTFT 25
The PTFT 13 and PTFT 24 input terminals are shared, and the NTFT 22 and NTFT 25 input terminals are shared with the first signal line 5 in the X direction and connected to the second signal line 8 in the X direction. The outputs of the two C / TFTs are shared and connected to a pixel electrode 17 which is one electrode of one liquid crystal 15. Thus, two NTFTs or two PTFTs
Even if either one of them leaks somewhat, the pixel can be driven because it is in phase.

FIG. 4 shows that in one pixel 23, two pixel electrodes 17, 26 and a C / T
In this example, two FTs are provided. The gate electrode of the two C / TFTs is made common, and the first input is performed. The input of each NTFT and each PTFT of each C / TFT is connected to the first signal line 5 and the second signal line 8.
It is connected to. Thus, one of the two pixels in one pixel does not become inoperable due to a defect such as a TFT leak. Further, even if the operation is delayed, the other operates normally, so that a defect is less noticeable in the matrix configuration operation.

[0016]

[Embodiment 1] This embodiment will be described using a liquid crystal display device having a circuit configuration as shown in FIG. FIG. 5 shows an actual arrangement of electrodes and the like corresponding to this circuit configuration. For simplification of description, only portions corresponding to 2 × 2 are described. FIG. 9 shows an actual drive signal waveform.
For the sake of simplicity, the description will be made using signal waveforms in the case of a 4 × 4 matrix configuration.

First, a method for manufacturing a liquid crystal display device used in this embodiment will be described with reference to FIGS. In FIG. 13A, a silicon oxide film as a blocking layer 51 is formed on a glass 50 such as quartz glass which can withstand heat treatment at an inexpensive temperature of 700 ° C. or less, for example, about 600 ° C. by using a magnetron RF (high frequency) sputtering method. It is made to a thickness of 3000 mm. The process conditions are an atmosphere of 100% oxygen, a film formation temperature of 15 ° C., an output of 400 to 800 W, and a pressure of 0.5 Pa.
And The deposition rate using quartz or single crystal silicon as the target was 30 to 100 ° / min.

A silicon film was formed thereon by an LPCVD (low pressure gas phase) method, a sputtering method or a plasma CVD method. When formed by the reduced pressure gas phase method, the temperature is 1
450-550 ° C lower by 00-200 ° C, for example 530 ° C
With disilane (Si ₂ H ₆ ) or trisilane (Si ₃ H
₈ ) was supplied to a CVD apparatus to form a film. The pressure in the reactor was 30 to 300 Pa. The deposition rate is 50-250 ° /
Minutes. In order to control the threshold voltage (Vth) of the NTFT and PTFT to be substantially the same, boron is used to diborane to 1 × 10 ¹⁵ to 1 × 10 ¹⁸ cm ^−3.
May be added during the film formation.

When the sputtering method is used, the back pressure before the sputtering is set to 1 × 10 ⁻⁵ Pa or less, and a single crystal silicon is used as a target in an atmosphere in which hydrogen is mixed with 20 to 80% of argon. For example, argon was 20% and hydrogen was 80%. The deposition temperature is 150 ° C., the frequency is 13.56 MHz,
The sputter output was 400-800 W and the pressure was 0.5 Pa.

When a silicon film is formed by a plasma CVD method, the temperature is set to, for example, 300 ° C., and monosilane (SiH
₄ ) or disilane (Si ₂ H ₆ ) was used. These were introduced into a PCVD apparatus, and a high-frequency power of 13.56 MHz was applied to form a film.

The coatings formed by these methods are:
It is preferable that oxygen is 5 × 10 ²¹ cm ⁻³ or less. If the oxygen concentration is high, crystallization is difficult, and the thermal annealing temperature must be increased or the thermal annealing time must be increased. If the amount is too small, the leakage current in the off state increases due to the backlight. Therefore 4 × 10
The range was ¹⁹ to 4 × 10 ²¹ cm ⁻³ . Hydrogen is 4x
It was 10 ²⁰ cm ⁻³ , which was 1 atomic% as compared with silicon 4 × 10 ²² cm ⁻³ . In order to further promote crystallization of the source and the drain, the oxygen concentration is set to 7 × 10 ¹⁹ cm ⁻³ or less, preferably 1 × 10 ¹⁹ c.
m ⁻³ or less, and oxygen is ion-implanted only into a channel formation region of a TFT constituting a pixel to form 5 × 10 ²⁰ to
You may add so that it may become 5 * 10 < ²¹ > cm <^-3> . At this time, since light is not irradiated to the TFTs constituting the peripheral circuit, it is effective to reduce the mixing of oxygen and to have a higher carrier mobility for high-frequency operation.

Next, the silicon film in an amorphous state is
After fabrication to a thickness of ~ 5000mm, for example 1500mm, 4
Medium-temperature heat treatment in a non-oxide atmosphere at a temperature of 50 to 700 ° C. for 12 to 70 hours, for example, 600 hours in a hydrogen atmosphere
It was kept at a temperature of ° C. Since a silicon oxide film having an amorphous structure is formed on the substrate surface below the silicon film, no specific nucleus is present in this heat treatment, and the whole is uniformly heat-annealed. That is, it has an amorphous structure at the time of film formation, and hydrogen is simply mixed therein.

By the annealing, the silicon film shifts from an amorphous structure to a highly ordered state, and a part of the silicon film exhibits a crystalline state. In particular, a region having a relatively high order in a state after the formation of silicon is particularly likely to be crystallized to be in a crystalline state. However, since the silicon existing between these regions is bonded to each other, silicon mutually pulls each other. Single crystal silicon peak 522 measured by laser Raman spectroscopy
A peak shifted to a lower frequency side than cm ⁻¹ is observed. Its apparent particle size, calculated from the half width, is 5
Although it is like a microcrystal having a size of 0 to 500 °, there are actually a large number of regions having high crystallinity and a cluster structure, and a semi-amorphous structure in which each cluster is bonded to each other by silicon (anchoring). Could be formed.

As a result, the coating exhibits a state substantially free of grain boundaries (hereinafter referred to as GB). Carriers can easily move from one cluster to another through the anchored locations between the clusters, so-called GB
Carrier mobility higher than that of polycrystalline silicon that clearly exists. That is, hole mobility (μh) = 10 to 200 cm
² / VSec, electron mobility (μe) = 15-300 cm
² / VSec is obtained.

On the other hand, when the film is polycrystallized by high-temperature annealing at 900 to 1200 ° C. instead of annealing at the above-mentioned medium temperature, segregation of impurities in the film occurs due to solid phase growth from nuclei. Impurities such as oxygen, carbon, and nitrogen increase, and the mobility in the crystal is large. However, a barrier (barrier) is formed in GB to hinder the movement of carriers there. As a result, a mobility of 10 cm ² / Vsec or more cannot be easily obtained. That is, in this embodiment, a silicon semiconductor having a semi-amorphous or semi-crystalline structure is used for such a reason.

In FIG. 13A, a silicon film is subjected to photoetching using a first photomask, and a PTFT region 13 (channel width 20 μm) is formed on the right side of the drawing.
A TFT region 22 was formed on the left side.

On top of this, a silicon oxide film was formed as a gate insulating film to a thickness of 500 to 2000 {for example, 1000}. This was made under the same conditions as those for forming the silicon oxide film as the blocking layer. During the film formation, a small amount of fluorine may be added to fix the sodium ions.

Thereafter, 1 to 5 × 10
A silicon film having a concentration of ²¹ cm ⁻³ or a multilayer film of the silicon film and molybdenum (Mo), tungsten (W), MoSi ₂ or WSi ₂ was formed thereon. This was patterned using a second photomask to obtain FIG. Gate electrode 55 for PTFT, N
A gate electrode 56 for a TFT was formed. For example, a channel length of 10 μm and a gate electrode of phosphorus-doped silicon of 0.2
μm, and molybdenum was formed thereon to a thickness of 0.3 μm. In FIG. 13C, a photoresist 57 is formed using a photomask, and a PTFT source 59 is formed.
1-5 × 10 ¹⁵ cm of boron for drain 58
A dose of ^-2 was added by ion implantation. Next, as shown in FIG. 13D, a photoresist 61 was formed using a photomask. Phosphorus was added by ion implantation at a dose of 1 to 5 × 10 ¹⁵ cm ⁻² as a source 64 and a drain 62 for NTFT.

These steps were performed through the gate insulating film 54. However, in FIG. 13B, the gate electrodes 55, 5
6 may be used as a mask to remove silicon oxide on the silicon film, and then boron and phosphorus may be directly ion-implanted into the silicon film.

Next, heat annealing was performed again at 600 ° C. for 10 to 50 hours. PTFT source 59 drain 5
The source 64 and the drain 62 of the 8NTFT were manufactured as P ⁺ and N ⁺ by activating impurities. Gate electrode 5
Channel formation regions 60 and 63 are formed below 5 and 56 as semi-amorphous semiconductors.

In this way, a C / TFT can be manufactured without applying a temperature to 700 ° C. or more in all steps, even though it is a self-aligned system. Therefore, it is not necessary to use an expensive substrate such as quartz as a substrate material, and this is a process very suitable for the large pixel liquid crystal display device of the present invention.

In this embodiment, the thermal annealing is performed as shown in FIG.
(D) was performed twice. However, the annealing in FIG. 13A may be omitted depending on the required characteristics, and both may be omitted by the annealing in FIG. 13D to shorten the manufacturing time. FIG.
In (E), a silicon oxide film was formed on the interlayer insulator 65 by the above-described sputtering method. This silicon oxide film may be formed by an LPCVD method, a photo CVD method, or a normal pressure CVD method. For example, it was formed to a thickness of 0.2 to 0.6 μm, and then a window 66 for an electrode was formed using a photomask. Further, aluminum is formed on the entire surface by sputtering, and leads 71 and 72 and contacts 67 and 68 are formed using a photomask. After that, the surface is flattened with an organic resin 69 for flattening, for example, a translucent polyimide resin. Then, the electrode drilling was performed again using a photomask.

As shown in FIG. 13 (F), the two TFTs have a complementary structure, and their output terminals are connected to the electrodes of one pixel of the liquid crystal device as transparent electrodes. (A tin oxide film). It is etched using a photomask and the electrodes 7
0 was configured. This ITO film was formed at room temperature to 150 ° C. and achieved by annealing at 200 to 400 ° C. in oxygen or atmosphere. Thus, PTFT 22 and NTF
The same glass substrate 50 as T13 and the electrode 70 of the transparent conductive film
Made above. The obtained TFT electrical characteristics are PTF
At T, the mobility is 20 (cm ² / Vs), and Vth is −5.9.
(V), the mobility of NTFT is 40 (cm ² / Vs),
Vth was 5.0 (V).

A transparent electrode is provided on the entire surface of one of the substrates for the liquid crystal device and the other glass substrate manufactured according to the method described above, and these substrates are bonded to form a liquid crystal cell.
A TN liquid crystal material was injected therein. FIG. 6 shows the arrangement of the electrodes and the like of the liquid crystal display device. PTFT1
3 is provided at the intersection of the first scanning line 5 and the data line 3, and the PTFT for other pixels is similarly provided at the intersection of the first scanning line 5 and the data line 4. On the other hand, NTFT
Are provided at intersections between the scanning lines 8 and the data lines 3.
An NTFT for another pixel is provided at the intersection of the adjacent first scanning line 6 and data line 3. A matrix configuration using such a C / TFT is provided. The PTFT 13 is connected to the first scanning line 5 via a contact at the input end of the drain 10, and the gate 9 is connected to the data line 3 on which a multilayer wiring is formed. The output terminal of the source 12 is connected to the pixel electrode 17 via a contact.

On the other hand, the NTFT 22 has an input terminal of the drain 20 connected to the second scanning line 8 via a contact, a gate 21 connected to the data line 3, and an output terminal of the source 18 connected to the pixel via a contact like the PTFT. It is connected to the electrode 17. Thus, between the pair of scanning lines 5 and 8 (inside), one pixel was constituted by the pixel 23 made of the transparent conductive film and the C / TFT. By repeating such a structure left, right, up and down, a liquid crystal display device having a large pixel of 640 × 480 or 1280 × 960 obtained by enlarging a 2 × 2 matrix can be obtained.

The feature here is that one pixel has two TFs.
Since T is provided in a complementary configuration, the pixel electrode 17 is fixed at three values of the liquid crystal potential _VLC . The operation will be described with reference to FIGS.
FIG. 9 shows a circuit diagram of the present invention when performing a 4 × 4 matrix liquid crystal display, and FIG. 10 shows a timing chart of drive signal waveforms.

In the case of this embodiment, X _1a X _1b , X _2a X
_{2b, X 3a X 3b, X} 4a X 4b are each functions as a pair of the scanning signal lines. Y ₁ , Y ₂ , Y ₃ , and Y ₄ function as data lines. AA, A in FIG.
B ... DD means the address of the pixel at the corresponding position.

In such a 4 × 4 display, a timing chart of the signal waveform, the liquid crystal potential, and the potential difference actually applied to the liquid crystal corresponding to the four pixels at the addresses AA, AB, BA, and BB is shown. Shown in 10. In FIG. 10, the horizontal axis indicates time. One frame at time T
The interval between 1 and T2 is divided into four, and four pairs of scanning lines are sequentially scanned to apply a scanning signal. In the figure, only X _1a , X _2a , X _3a , and X _4a are described, but X _1b , X _2b , X _3b , and X _4b are actually X
_{1a, X} 2a, _X 3a, the _{X 4a} and a different polarity the same waveform is applied. A data signal as shown in FIG. 10 is applied to the lines Y ₁ , Y ₂ , Y ₃ , and Y ₄ and the time T
From 1 to T2, only the AA pixel is selected and turned on or off. That is, the data signal is applied to the data lines Y ₁ to between T ₁ of the t _1, the liquid crystal voltage exceeding the threshold value to the liquid crystal of the AA of the pixel in this time is applied is driven. At this time, the offset voltage is applied to the opposing electrode of the liquid crystal display device. In FIG. 10, from the next time T2 to T
Exactly the same signal waveform is applied to No. 3 to display AA.

Next, at times T3 to T4 and T4 to T5, a signal that does not select any of the four pixels is applied.
Further, from time T5 to T6, a signal for selecting the AA pixel is applied again.

Next, from time T6 to T8, a signal obtained by inverting the logic of the signal applied to the data line is applied, and the counter electrode has an offset having a polarity different from that of the signal applied during time T1 to T6. A voltage is applied and an alternating signal is applied to the liquid crystal. With this alternating signal, the charges that have been positively biased between times T1 and T6 can be canceled. That is, of the signal which has been applied from time T2 to _{T4, Y 1, Y 2,} Y 3, inverts the logic of _{Y 4-wire,} i.e. interchanged selection signal and a non-selection signal,
By exchanging the positive and negative of the offset voltage of the counter electrode, the AA pixel is selected in the first frame of the time T2 to T4, and an AC signal that does not select the four pixels is applied in the second frame of the second time, thereby driving the liquid crystal. It became possible. This makes it possible to easily cancel the charge remaining in the pixel.

As described above, according to the driving of the present invention, liquid crystal display can be performed only by applying a very simple pulse signal to the data line and the pair of scanning lines.

In this embodiment, when one screen is displayed by applying drive signals of a plurality of frames to the liquid crystal for one display screen, the number of selection signals to be applied to a specific pixel is reduced from the total number of frames. Thus, gradation display can be easily performed.

If TN liquid crystal is used as the liquid crystal material in this embodiment, it is necessary to set the distance between the substrates of the liquid crystal container to about 10 μm, provide an alignment film on both transparent conductive films, and rub it.

When an FLC (ferroelectric) liquid crystal is used as the liquid crystal material, the operating voltage is ± 20 V, the cell interval is 1.5 to 3.5 μm, for example, 2.3 μm, and the opposing electrode 1
It is sufficient that an alignment film is provided only on 6 and rubbing treatment is performed.

When a dispersion type liquid crystal or a polymer liquid crystal is used, an alignment film is not necessary, and in order to increase the switching speed, the operating voltage is set to ± 10 ± 15 V and the cell interval is set to be as thin as 1 to 10 μm.

In particular, when a dispersion type liquid crystal is used, since a polarizing plate is not necessary, the amount of light can be increased both in a reflection type and in a transmission type. Since the liquid crystal does not have a threshold, a C / TFT type in which a clear threshold voltage is defined as in the present invention eliminates large contrast and crosstalk (bad interference with adjacent pixels). I was able to.

Further, as the semiconductor of the TFT used in this embodiment, materials other than those used in this embodiment can be used.

[0048]

[Embodiment 2] In this embodiment, the present embodiment was carried out using a liquid crystal display having the structure shown in FIGS. As is apparent from this drawing, the scanning line 3 of the Y line is disposed at the center, and a portion of the pair of data lines sandwiched between the first data line 5 and the second data line 8 is defined as one pixel 23. . One pixel is one pixel of one transparent conductive film
7 and two PTFTs 13, 24 and two NTFTs
22 and 25 are connected to two C / TFTs. The gate electrodes are all connected to scan line 3 and two P
The TFT is connected to the first data line 3 and the two NTFTs are connected to the second data line 8. These two C / T
Even when one of the FTs is defective due to leakage between the gate electrode and the channel formation region, the pixel can operate as a pixel.

The feature here is that one pixel has two C / Ts.
By providing the FT, the pixel electrode 17 is fixed at three values of the liquid crystal potential _VLC . The operation will be described with reference to FIGS. FIG. 9 shows a circuit diagram of the present invention when a liquid crystal display of a 4 × 4 matrix configuration is performed, and FIG. 11 shows a timing chart of drive signal waveforms.

In the case of this embodiment, X _1a X _1b , X _2a X
_{2b, X 3a X 3b, X} 4a X 4b are each functions as a pair of data lines. Y ₁ , Y ₂ , Y ₃ , and Y ₄ function as scanning lines. Also, AA, AB,
.. DD means the address of the pixel at the corresponding position.

In such a 4 × 4 display, a timing chart of the signal waveform, the liquid crystal potential and the potential difference actually applied to the liquid crystal corresponding to the four pixels of the addresses AA, AB, BA, and BB is shown. Shown in Figure 11. In FIG. 11, the horizontal axis indicates time. One frame at time T
The interval is divided into four from 1 to T2, and scanning signals are applied to the scanning lines Y ₁ , Y ₂ , Y ₃ , and Y ₄ sequentially by scanning. Further, data signals as shown in FIG. 11 are applied to the lines X ₁ , X ₂ , X ₃ , and X ₄ . In the figure, X
_{1a, X} 2a, _X 3a, describes only the _{X 4a} but in practice _{X 1b, X 2b, X 3b} , the _{X 4b X} 1a, _{X
2a, X 3a, X 4a} and different same waveform are applied polarities, between time T1 T2 is turned on or off is selected only the pixels of AA. That is, applying data signals to the pair of data lines X ₁ between t ₁ from T _1, the liquid crystal this is the liquid crystal of the pixels in AA in time will be a voltage exceeding the threshold value is applied Is driven. At this time, the offset voltage is applied to the opposing electrode of the liquid crystal display device. In FIG. 11, the same signal waveform is applied from the next time T2 to T3, and AA is displayed.

Next, at times T3 to T4 and T4 to T5, a signal is applied which does not select any of the four pixels.
Further, from time T5 to T6, a signal for selecting the AA pixel is applied again.

Next, from time T6 to T8, a signal obtained by inverting the logic of the signal applied to the pair of data lines is applied, and the counter electrode has a polarity opposite to that of the signal applied during time T1 to T6. Different offset voltages are applied and an alternating signal is applied to the liquid crystal. With this alternating signal, the charges that have been positively biased between times T1 and T6 can be canceled. Actually, from time T2 to T4
, X ₁ , X ₂ ,
By inverting the logic of the X ₃ and X ₄ lines, that is, exchanging the selection signal and the non-selection signal and exchanging the positive and negative of the offset voltage of the counter electrode, the AA pixel is selected in the first half frame, and 4 A in the second half frame. An AC signal that does not select one pixel can be applied, and the liquid crystal can be driven.

As described above, according to the driving of the present invention, liquid crystal display can be performed only by applying a very simple pulse signal to the data line and the pair of scanning lines.

[0055]

Embodiment 3 In this embodiment, the present embodiment was carried out using a liquid crystal display having the structure shown in FIGS. As is apparent from this drawing, the data line 3 of the Y line
Is disposed at the center, and the first scanning line 5 and the second scanning line 5
The portion between the scanning lines 8 is defined as one pixel 23. One pixel has two transparent conductive pixel electrodes 1
7 and 26, and the pixel 17 includes the PTFT 13 and the NT
An FT 22 is connected, and a PTFT 24 and an N
TFTs 25 are connected in a C / TFT configuration. All the gate electrodes are connected to the data line 3, two PTFTs are connected to the first scanning line 3, and two NTFTs are connected to the second scanning line 8. These two C / T
Even when one of the FTs is defective due to leakage between the gate electrode and the channel formation region, the pixel can operate as a pixel. In this way, even if one of the pixels operates only halfway, the other pixel operates normally, and when colorized, the degree of gray scale deterioration can be reduced.

The operation will be described with reference to FIGS. 9 and 12. FIG. 9 shows a circuit diagram of the present invention when a liquid crystal display of a 4 × 4 matrix configuration is performed, and FIG. 12 shows a timing chart of drive signal waveforms.

In the case of this embodiment, X _1a X _1b , X _2a X
_{2b, X 3a X 3b, X} 4a X 4b are each functions as a pair of the scanning signal lines. Y ₁ , Y ₂ , Y ₃ , and Y ₄ function as data lines. AA, A in FIG.
B ... DD means the address of the pixel at the corresponding position.

In such a 4 × 4 display, a timing chart of the signal waveform, the liquid crystal potential, and the potential difference actually applied to the liquid crystal, corresponding to the four pixels at the addresses AA, AB, BA, and BB. Shown in Figure 12. In FIG. 12, the horizontal axis indicates time. One frame at time T
The interval between 1 and T2 is divided into 16 portions, and four pairs of scanning lines are sequentially scanned to apply a scanning signal. In the figure, only X _1a , X _2a , X _3a , and X _4a are described, but X _1b , X _2b , X _3b , and X _4b are actually X
_{1a, X} 2a, _X 3a, the _{X 4a} and a different polarity the same waveform is applied. A data signal as shown in FIG. 12 is applied to the lines Y ₁ , Y ₂ , Y ₃ , and Y ₄ , and the timing thereof is set at a specific time divided into 16 in one frame by the address of the pixel to be selected. During the time T1 to T2 when the data signal is applied to the data line, only the AA pixel is selected and turned on or off. In other words, from _{T 1} t
By applying a data signal to the data lines Y ₁ during _1,
During this time, a voltage exceeding the threshold is applied to the liquid crystal of the AA pixel, and the liquid crystal is driven. At this time, the offset voltage is applied to the opposing electrode of the liquid crystal display device. Next, from time T2 to T3, a signal that does not select any of the four pixels is applied.

Next, from time T3 to T4, a signal obtained by inverting the logic of the signal applied to the data line is applied, and the counter electrode has an offset having a polarity different from that of the signal applied between time T1 and T3. A voltage is applied and an alternating signal is applied to the liquid crystal. With this alternating signal, charges that have been positively biased between times T1 and T3 can be canceled. That is, of the signal which has been added to T2 from the time _{T1, Y 1, Y 2,} Y 3, inverts the logic of _{Y 4-wire,} i.e. interchanged selection signal and a non-selection signal,
By exchanging the offset voltage of the opposing electrode, it is possible to drive the liquid crystal by applying an AC signal that selects the AA pixel in the first frame and does not select four pixels in the second frame.

As described above, according to the driving of the present invention, liquid crystal display can be performed only by applying a very simple pulse signal to the data line and the pair of scanning lines. In this embodiment,
Scanning was performed using the Y-line as the scanning side, but the present invention is not particularly limited to this configuration, and the scanning side may be the X-ray side. Further, it is also possible to apply a data signal to each data line at random and select pixels at random. In addition, what is not described here is the same as that described in Examples 1 and 2.

[0061]

As described above, according to the driving method of the present invention, since the liquid crystal potential does not float, stable display can be performed. Further, since the driving capability of the C / TFT as the active element is high, the operation margin can be expanded, and the peripheral driving circuit can be further simplified, which is effective in reducing the size of the display device and reducing the manufacturing cost. . In addition, high driving capability can be exhibited with very simple signals to the three signal lines and the counter electrode.

Even if some of the defective TFTs are in-phase output, it can be compensated to some extent.

Further, in order to prevent the liquid crystal material from being electrolyzed, an AC signal driving which is indispensable for driving the liquid crystal is performed by C / TF.
This was achieved simply by inverting the logic of the signal applied to the T gate signal line and inverting the polarity of the offset voltage applied to the counter electrode.

The display medium of the present invention can be used as a transmission type liquid crystal display device or a reflection type liquid crystal display device. As a usable liquid crystal material, a TN liquid crystal, an FLC liquid crystal, a dispersion liquid crystal, or a polymer liquid crystal as described above can be used. In addition, by adding an ionic dopant to a guest-host type or dielectric anisotropic type nematic liquid crystal and applying an electric field, an electric field is applied to a mixture of the cholesteric liquid crystal and the nematic liquid crystal, and the nematic phase and the cholesteric phase are mixed. A phase change liquid crystal that causes a phase change between the two and realizes a transparent or opaque display can also be used. In addition to the liquid crystal, for example, a so-called electrophoretic display dispersion system in which pigment particles having different colors are dispersed in an organic solvent colored with a dye can be used.

In the present invention, when a liquid crystal is used as a display medium, the output of the C / TFT is a liquid crystal potential. In some cases, a medium other than liquid crystal is used.
What is necessary is just to replace with the output voltage of the TFT.

[Brief description of the drawings]

FIG. 1 shows a driving waveform of the present invention.

FIG. 2 is a circuit diagram of an active display device using complementary TFTs.

FIG. 3 is a circuit diagram of an active display device using complementary TFTs.

FIG. 4 is a circuit diagram of an active display device using complementary TFTs.

FIG. 5 shows a circuit diagram of a conventional active liquid crystal device.

6 is a plan view of one substrate of the liquid crystal display device corresponding to FIG.

7 is a plan view of one substrate of the liquid crystal display device corresponding to FIG.

8 is a plan view of one substrate of the liquid crystal display device corresponding to FIG.

FIG. 9 is a circuit diagram of a 4 × 4 active liquid crystal device using complementary TFTs.

FIG. 10 shows an example of a drive signal waveform of the present invention and a timing chart thereof.

FIG. 11 shows an example of a drive signal waveform of the present invention and a timing chart thereof.

FIG. 12 shows an example of a drive signal waveform of the present invention and a timing chart thereof.

FIG. 13 shows a manufacturing process diagram of the C / TFT used in the present invention.

[Explanation of reference numerals] ... Process using photomask 1, 2 ... Peripheral circuit 3, 4 ... Third signal line 5, 6 ... First signal line 7, 8, ... · Second signal line 13 ··· PTFT 16 ··· Counter electrode 17 ··· Pixel electrode 22 ··· NTFT 23 ··· Pixel

──────────────────────────────────────────────────続 き Continuation of the front page (56) References JP-A-63-96636 (JP, A) JP-A-4-190329 (JP, A) JP-A-49-77537 (JP, A) 5633 (JP, A) JP-A-4-177326 (JP, A) JP-A-4-177327 (JP, A) JP-A-4-190330 (JP, A) JP-A-4-196171 (JP, A) JP-A-4-220627 (JP, A) JP-A-10-171373 (JP, A) (58) Fields investigated (Int. Cl. ⁷ , DB name) G02F 1/133 550 G02F 1/136 500

Claims (7)

(57) [Claims] 1. An N-channel type thin film transistor and a P-type thin film transistor.
Complementary transistor consisting of channel type thin film transistor
And a source (drain ) of the P-channel thin film transistor is electrically connected to a first signal line, and a source (drain ) of the N-channel thin film transistor is connected to a second signal line. Electrically connecting the gate electrodes of the n-channel thin film transistor and the p-channel thin film transistor to a third signal line ;
Connected to, the N-channel type thin film transistor and P in the driving method of channel thin film transistor of the drain (source) display device connected to the pixel electrode electrically the previous SL first and second signal lines on signal by adding an oN signal to the third signal line on the period <br/> you have made,
A method for driving a display device, comprising applying a voltage to a pixel electrode . 2. An N-channel type thin film transistor and a P-type thin film transistor.
Complementary transistor consisting of channel type thin film transistor
And a source (drain ) of the P-channel type thin film transistor is electrically connected to a first scanning line, and a source (drain ) of the N-channel type thin film transistor is connected to a second scanning line. and electrically connected to the scan line, the electrical contacts <br/> to continue the gate electrode of the N-channel type thin film transistor and P-channel type thin film transistor in data line, the N-channel type thin film transistor and P-channel type thin film transistor drain (source) of the pixel electrode and the conductive
A method of driving a display device which is gas-connected, by adding on-signal before Symbol the data lines on the period <br/> that adding-on signal to the first and second scan lines, Pixel
A method for driving a display device, comprising applying a voltage to an electrode . 3. An N-channel type thin film transistor and a P-type thin film transistor.
Complementary transistor consisting of channel type thin film transistor
And a source (drain ) of the P-channel thin film transistor is electrically connected to a first data line, and a source (drain ) of the N-channel thin film transistor is connected to a second data line. electrically connected to the data lines, the electrically connected to査線run the gate electrode of the N-channel type thin film transistor and P-channel thin film transistor, the pixel drain (source) of the N-channel type thin film transistor and P-channel type thin film transistor Electrodes and electrodes
In a method for driving a display device which is connected to a pixel, by applying an ON signal to the first and second data lines during a period when an ON signal is applied to the scanning line,
A method for driving a display device, comprising applying a voltage to an electrode . 4. An N-channel type thin film transistor and a P-type thin film transistor.
Complementary transistor consisting of channel type thin film transistor
And a source (drain ) of the P-channel thin film transistor is electrically connected to a first signal line, and a source (drain ) of the N-channel thin film transistor is connected to a second signal line. Electrically connecting the gate electrodes of the n-channel thin film transistor and the p-channel thin film transistor to a third signal line ;
Connected to, the N-channel type thin film transistor and P-channel type pixel electrode and the conductive drain (source) of the thin film transistor
A method of driving a display device which is gas-connected, the paired counter electrodes offset voltage is applied, on the period and adding an ON signal <br/> that before Symbol first and second signal lines a By applying an ON signal to the signal line 3
A method for driving a display device, comprising applying a voltage to a pixel electrode . 5. An N-channel thin film transistor and a P-channel thin film transistor.
Complementary transistor consisting of channel type thin film transistor
And a source (drain ) of the P-channel thin film transistor is electrically connected to a first signal line, and a source (drain ) of the N-channel thin film transistor is connected to a second signal line. Electrically connecting the gate electrodes of the n-channel thin film transistor and the p-channel thin film transistor to a third signal line ;
Connected to, the N-channel type thin film transistor and P-channel type pixel electrode and the conductive drain (source) of the thin film transistor
A method of driving a display device which is gas-connected, first and adding an ON signal before Symbol first and second signal lines
The first time period, an ON signal is applied to the third signal line, the offset voltage is applied to the counter electrode, the second <br/> period applying an ON signal to the first and second signal lines An on signal obtained by inverting the logic of the third signal line is
In addition, a voltage having a polarity different from the offset voltage is applied to the counter electrode.
Is applied to apply AC to the pixel electrode.
A method for driving a display device, comprising applying pressure . 6. The pixel according to claim 1 , wherein each pixel has two or more pixel electrodes, and the pixel electrodes include an N-channel thin film transistor and
And complementary P-channel thin film transistors
A method for driving a display device, including a transistor. 7. The thin film transistor according to claim 1, wherein two or more N-channel thin film transistors are provided on the pixel electrode.
Phase consisting of a transistor and a P-channel thin film transistor
A method for driving a display device, comprising a complementary transistor .