JP2998773B2 - High frequency doubler circuit - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

In the present invention, a high frequency band source signal is applied to the base of a transistor, and the collector of the transistor has
The present invention relates to a high-frequency doubling circuit to which a tuning circuit that resonates at twice the frequency of the source signal is connected.

[0002]

2. Description of the Related Art One of conventional techniques for doubling a signal in a high frequency band is a PLL circuit comprising a phase comparator, a loop filter, a charge pump, and a VCO.
The LL circuit is expensive due to its complicated circuit configuration. Further, when the signal to be handled is an analog signal, it is necessary to shape the analog signal having a sufficient amplitude and convert it into a digital signal, which further complicates the circuit configuration. Therefore, the PLL circuit is rarely used for multiplying the analog signal unless the phase relationship between the source signal and the multiplied signal is made strict.

[0003] As a conventional technique used exclusively for multiplication of an analog signal, a signal containing a large number of harmonics is generated by operating a transistor in class C, and the frequency of a tuning circuit connected to a collector is adjusted to a desired frequency. Thus, there is a circuit that doubles the source signal. Also, a diode that performs doubling by removing a half-wave component of the guided signal to generate a signal including many even-numbered harmonics, and setting a tuning circuit provided at a subsequent stage to a desired frequency. There is a multiplier circuit.

[0004]

However, in a circuit for operating a transistor in a class C operation, it is necessary to set the level of a source signal applied to the base to a sufficiently large level because of setting the operating point to the class C operation. For this reason, the level of the harmonic signal generated in the collector is extremely large. This means
When used in devices that handle small signals, such as receivers or receivers, we do not want unwanted signals to be spiked inside, so we have sufficient shielding for the multiplier circuit (especially the coil that constitutes the tuning circuit). Has to be performed.

[0005] In the diode multiplying circuit, since the diode is a passive element, signal attenuation at the time of multiplication is large. For this reason, it is necessary to provide an amplifier circuit in the preceding stage and provide a source signal having a sufficient level to the diode multiplier circuit, or to provide an amplifier circuit for amplifying the multiplied signal in the subsequent stage. Therefore, there has been a problem that the circuit configuration for performing the doubling becomes complicated.

SUMMARY OF THE INVENTION The present invention has been made to solve the above problems, and an object of the present invention is to perform doubling with a simple circuit configuration while maintaining a very low level of a signal. It is an object of the present invention to provide a high-frequency doubler circuit that can perform the above-mentioned operations.

Another object of the present invention is to provide a high-frequency doubling circuit capable of accurately setting an operating point to a predetermined operating point even when the hfe of the transistor varies.

[0008]

According to a first aspect of the present invention, there is provided a high frequency doubling circuit according to the first aspect of the present invention, wherein a source signal in a high frequency band is provided to a base of a transistor, and a source signal is provided to a collector of the transistor. Is applied to a high-frequency doubling circuit connected to a tuning circuit that resonates at a frequency twice as high as that of the base voltage of the transistor. The operating point of the transistor is set near the maximum value of the second derivative of the curve indicating the relationship with the collector current.

According to a second aspect of the present invention, in the high frequency doubler circuit, a base of the transistor is connected to a power supply for applying a potential to the collector of the transistor via a base resistor, and a collector corresponding to a desired operating point of the transistor is provided. The current value is set by the resistance value of the emitter resistor connected to the emitter.

[0010]

The operation of the first aspect of the invention will be described below. The first derivative of the curve showing the relationship between the base voltage and the collector current means that when the coefficient is constant, the linearity of amplification is good, and the coefficient indicates the amplification factor. The fact that the first derivative is constant means that the second derivative is zero. From the opposite point of view, the operating point at which the second derivative is the maximum means that the operating point gives the maximum distortion. Further, when the base voltage increases, the collector current of the transistor uniquely increases in response to the increase. Therefore, the operating point at which the second derivative is the maximum means that the operating point at which the most asymmetrical distortion is obtained. In other words, it is an operating point where more even harmonics can be obtained. Further, since this operating point is a class A operating region, a signal having a predetermined distortion can be obtained without being affected by the level of the input signal level.

The operation of the invention described in claim 2 will be described below.
The transistor may be an NPN type or a PNP type, but for simplicity of description, a case where the transistor is an NPN type will be described below. The base of the transistor is connected via a base resistor to a power supply for applying a potential to the collector of the transistor.
For this reason, when the hfe of the transistor varies to the larger side, the base current decreases, and the base potential is displaced in a higher direction. If hfe varies to a smaller side, the base current increases and the base potential shifts to a lower side. However, since the operating point of the transistor is an operating point at which the collector current becomes very small, the resistance value of the emitter resistor that sets the collector current is large. For this reason, the potential of the emitter is largely displaced by a slight displacement of the emitter current.
Therefore, even when the base current corresponding to the desired collector current is slightly displaced from the desired current value, the potential of the emitter is displaced so as to follow the variation of the base potential.
At this time, the influence of the displacement of the base current on the collector current is very small. For this reason, the base-emitter voltage, which is the base voltage of the transistor, is set to a voltage corresponding to the collector current with small variations. That is, even when hfe varies, the operating point of the transistor is set near the desired operating point.

[0012]

An embodiment of the present invention will be described below with reference to the drawings. FIG. 1 is a circuit diagram showing the electrical connection of one embodiment of the high frequency doubler circuit according to the present invention.

The present embodiment is an apparatus in which a television receiver, a video tape recorder, or a video tape recorder and a television receiver are integrated, and an image based on a received video signal and a numeral or character indicating a channel are used. Is displayed on the screen in parallel with the above information. That is, in the present embodiment, broadly speaking, the high-frequency signal source 1 that outputs, as a source signal, a signal that is phase-synchronized with the received video signal (phase synchronization in which a constant phase difference is maintained).
1, four capacitors C1 to C4, three resistors R1 to
A high frequency doubling circuit comprising R3, a coil L, and a transistor Q for doubling a source signal, and a signal doubled by the high frequency doubling circuit as a reference clock are displayed in parallel with a received video signal. And an on-screen circuit 12 for generating a video signal such as a character.

In FIG. 1, a high-frequency signal source 11 is a block provided in a chroma circuit for reproducing a color signal from a received video signal. A sub-carrier and a source signal having a phase-synchronous relationship whose frequency is twice the frequency of the color sub-carrier are generated. Then, the generated source signal is sent to the base of the transistor Q via the capacitor C1. Further, the generated color subcarrier is sent to the chroma circuit main body (the color subcarrier and the chroma circuit main body are not shown).

The transistor Q is an element that generates an even-numbered harmonic by giving asymmetrical distortion to the source signal transmitted from the high-frequency signal source 11. One terminal of a tuning circuit 13 including a capacitor C2 and a coil L is connected to the collector of the transistor Q. The other terminal of the tuning circuit 13 is
It is connected to a plus power supply P + which is a 5V power supply. The tuning frequency of the tuning circuit 13 is set to be twice the frequency of the source signal.

The base of the transistor Q has a base resistance R
1 is connected to a positive power supply P + for applying a potential to the collector. The emitter of the transistor Q is grounded via an emitter resistor R2 for setting the collector current of the transistor Q to a predetermined value. The emitter of the transistor Q is grounded via a series circuit of a capacitor C4 and a resistor R3.

The capacitor C4 has such a value that the impedance becomes sufficiently small in a predetermined band which is equal to or higher than the frequency of the source signal. Therefore, in a predetermined band, the emitter is grounded via the resistor R3.
As a result, the transistor Q has a resistance R in a predetermined band.
3 will only be provided. In terms of DC, current feedback is provided by the resistor R2. The resistor R3 is a resistor for reducing the variation in amplification factor caused by the variation in hfe of the transistor Q, and gives a small amount of current feedback to the transistor Q in a predetermined band. Therefore, a small value is adopted as the resistance value of the resistor R3.

The on-screen circuit 12, to which the collector of the transistor Q is connected via the capacitor C3,
It operates in phase synchronization with the color subcarrier and uses a signal having a frequency four times the frequency of the color subcarrier as a reference clock. The block is a block for generating a signal for displaying characters, symbols, and the like in parallel with the display of the received video signal. In addition,
The content displayed by the generated signal includes a number indicating the channel at the time of remote control, a symbol indicating the volume,
Alternatively, it is a character or the like indicated by character data received during the flyback period.

FIG. 2 is an explanatory diagram showing a method of determining the operating point of the transistor Q. A curve a shown in the figure is a curve showing the characteristics of the transistor Q shown on a plane having the base voltage on the horizontal axis and the collector current on the vertical axis. A curve b indicates a change in the first derivative of the curve a.
Curve c shows a change in the second derivative of curve a.

The first derivative represented by the curve b indicates that the region where the coefficient is constant is a region where the linearity of amplification is good, and the value of the coefficient indicates the amplification factor in the corresponding region. The fact that the first derivative is constant means that the second derivative has a value near 0 as shown by the curve c. From the opposite point of view, the operating point 21 (the base voltage is V1 and the collector current is I1) at which the second derivative is the maximum means that the operating point gives the maximum distortion.

As shown by the curve a, the collector current of the transistor univocally increases as the base voltage increases. Therefore, the operating point 21 at which the second derivative is the maximum means that the operating point at which the most asymmetric distortion is obtained is obtained. In other words, it is an operating point where more even harmonics can be obtained. Further, since this operating point 21 is a class A operating region, there is no lower limit in the input signal level, and a signal with a predetermined distortion can be obtained at an arbitrary input level of the source signal.

As a method of setting the operating point of the transistor Q to the above-mentioned operating point 21, the present embodiment employs a method of setting the collector current by the resistance value of the emitter resistor R2. That is, the transistor Q shown in FIG.
Of the collector current I1 corresponding to the operating point 21 of FIG.
Since the voltage of the positive power supply P + is 5 V and the collector-emitter voltage at the operating point 21 is about 0.5 V, the value of the emitter resistor R2 is set to 15 KΩ in order to set the collector current to 300 μA. .

The value of the base resistor R1 connecting the base of the transistor Q to the positive power supply P + is the emitter resistor R
Since a large amount of current feedback is given to the second resistor, it is possible to adopt one value from a relatively wide range. In this embodiment, the value of the base resistor R1 is changed to the value of the emitter resistor R2. Is the same as the value of 15 KΩ. The value of the resistor R3 for reducing the variation in the amplification factor caused by the variation in the hfe of the transistor Q is 100
Ω is adopted.

The operation of the embodiment having the above configuration will be described.
This will be described below. The base of the transistor Q is connected to a positive power supply P + via a base resistor R1. For this reason, when the hfe of the transistor Q fluctuates to the large side,
The base current decreases, and the base potential is displaced in a direction to increase. If hfe varies to a smaller side, the base current increases and the base potential shifts to a lower side.
However, since the operating point of the transistor Q is the operating point 21 at which the collector current becomes very small, the resistance value of the emitter resistor R2 for setting the collector current is as large as 15 KΩ. For this reason, the potential of the emitter is largely displaced by a slight displacement of the emitter current.

Now, the potential of the emitter of the transistor Q becomes
Assuming that the potential corresponds to the standard value of hfe, hfe
Is larger than the standard value, the base current becomes the desired current value (300/300 / A) corresponding to the desired collector current of 300 μA.
hfe). However, even when the base current is slightly increased slightly from the desired current value, the value of the emitter resistor R2 is large, so that the potential of the emitter greatly increases. As a result, feedback occurs in which an increase in the base current is suppressed by an increase in the emitter potential, and the potential of the emitter is displaced so as to follow a variation in the base potential.

For this reason, the base-emitter voltage, which is the base voltage of the transistor Q, is set to a voltage corresponding to the collector current with small variations. That is, hfe
Also, the operating point of the transistor is set near the desired operating point 21, and the collector current has a value near 300 μA. This is the same when hfe is smaller than the standard value. That is, even when the hfe of the transistor Q varies, the operating point of the transistor Q is set near the desired operating point 21.

FIG. 3 is an explanatory diagram showing a source signal waveform applied to the base of the transistor Q and a signal waveform appearing at the collector.

The operating point of the transistor Q is set near the operating point 21 as described above. The source signal which is a sine wave transmitted from the high-frequency signal source 11 has a peak-to-peak value of about 0.4 to 0.5 V as shown by a waveform d in order to avoid unnecessary injection of unnecessary signals into the device. Signal of a very low level. Then, the source signal d, which is a minute level, is transferred by a curve a indicating the characteristics of the base voltage and the collector current of the transistor Q, and appears at the collector. Therefore, the signal waveform appearing at the collector is the waveform e
As shown in FIG.
The signal contains a large number of even-numbered harmonics. Further, the signal level is a very low level signal having a pp value of about 1V.

On the other hand, a tuning circuit 13 that resonates at twice the frequency of the source signal is connected to the collector of the transistor Q. The tuning circuit 13 has the maximum impedance at twice the frequency of the source signal. Therefore, the tuning circuit 13 emphasizes only the signal level (voltage) of the double harmonic component from the signal indicated by the waveform e. As a result, a signal obtained by doubling the source signal is output from the collector of the transistor Q. Then, the doubled signal is guided to the on-screen circuit 12 and used as a basic clock signal.

As described above, the television receiver, the video tape recorder, or the apparatus in which the video tape recorder and the television receiver are integrated with each other in this embodiment are phase-synchronized with the color sub-carrier and And a high frequency signal source 11 that outputs a signal having a frequency twice as high as a source signal. A high-frequency doubling circuit for doubling the source signal is provided.
Uses the signal doubled by the high frequency doubler circuit as a basic clock.

Therefore, the signal supplied to the on-screen circuit 12 is a signal that is phase-synchronized with a certain phase difference from the color signal of the image signal. This means that it is not necessary to generate a basic clock (clock that is phase-synchronized with the color signal of the image signal) that is indispensable for on-screen display for displaying characters and the like together with the received image. Therefore, in the on-screen circuit 12, a circuit block for performing phase synchronization, such as a PLL circuit, is not required, so that the configuration of the on-screen circuit 12 is simplified.

Since the voltage applied to the coil L constituting the tuning circuit 13 has a very small pp value of about 1 V, the level of the signal radiated from the coil L is low. As a result, the influence of the unnecessary signal which is incident on the image signal path becomes small, and the effect of preventing the occurrence of the stripe pattern of the image caused by the unnecessary signal being injected into the apparatus is obtained. ing.

[0033]

In the high frequency doubler according to the first aspect of the present invention, a source signal in a high frequency band is given to the base of the transistor, and the collector of the transistor resonates at twice the frequency of the source signal. It is applied to a high frequency doubler circuit to which a tuning circuit is connected. Then, on a plane having the base voltage as the horizontal axis and the collector current as the vertical axis, the operating point of the transistor is set near the maximum value of the second derivative of the curve indicating the relationship between the base voltage of the transistor and the collector current of the transistor. ing. Therefore, even when the input signal is at a very low level, an asymmetrically distorted waveform appears at the collector, so that it is possible to perform doubling with a simple circuit configuration while maintaining the low level of the signal. Has become.

According to a second aspect of the present invention, in the high frequency doubler circuit, the base of the transistor is connected to a power supply for applying a potential to the collector of the transistor via a base resistor, and the collector corresponding to a desired operating point of the transistor is provided. The current value is set by the resistance value of the emitter resistor connected to the emitter. Therefore, the resistance value of the emitter resistor increases, and the amount of current feedback increases. This large amount of current feedback reduces the effect of the variation in hfe of the transistor on the operating point.
Even when e varies, the operating point can be accurately set to a predetermined operating point.

[Brief description of the drawings]

FIG. 1 is a circuit diagram showing an electrical connection of one embodiment of a high frequency doubler circuit according to the present invention.

FIG. 2 is an explanatory diagram showing a method for determining an operating point of the high frequency doubler circuit according to the present invention.

FIG. 3 is an explanatory diagram showing a base signal waveform and a collector signal waveform of the high frequency doubler circuit according to the present invention.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 11 High frequency signal source 12 On-screen circuit 13 Tuning circuit Q transistor R1 Base resistance R2 Emitter resistance a Curve showing relation between base voltage and collector current b Primary differential coefficient c Secondary differential coefficient

Claims (2)

(57) [Claims] 1. A high frequency doubler circuit in which a base signal of a transistor is supplied with a source signal in a high frequency band, and a collector of the transistor is connected to a tuning circuit that resonates at twice the frequency of the source signal. On a plane having the base voltage as the horizontal axis and the collector current as the vertical axis, the operating point of the transistor is set near the maximum value of the second derivative of the curve indicating the relationship between the base voltage of the transistor and the collector current of the transistor. A high-frequency doubling circuit characterized by being set. 2. The transistor according to claim 1, wherein a base of the transistor is connected to a power supply for applying a potential to a collector of the transistor via a base resistor, and a collector current value corresponding to a desired operating point of the transistor is adjusted by an emitter resistor connected to the emitter. 2. The high frequency doubling circuit according to claim 1, wherein the high frequency doubling circuit is set by a resistance value.